JP3035984B2 - Digital video signal recording device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a recording apparatus for digital video signals, and more particularly to a recording apparatus capable of searching and reproducing.

[Conventional technology]

In the digital VTR, in addition to normal reproduction in which the tape speed is the same as that during recording, search reproduction is possible in which the tape speed is several times to several tens times that in recording.

FIG. 5 shows a triple search in which the tape speed is, for example, three times that of the normal tape, and T1, T2,... Indicate tracks formed on the magnetic tape. For example, one frame of a digital video signal is recorded on each track. At the time of triple search, as shown by S1,
The rotating head scans the magnetic taper over the tracks T1, T2 and T3. Next, a scanning trajectory S2 is formed similarly over the tracks T4, T5 and T6.

At the time of a search, a memory for storing a reproduced digital video signal is provided, and this memory is rewritten with correctly reproduced video data or data with an error corrected.

At the time of the above-described search reproduction, an error is likely to occur at the boundary of a plurality of tracks in the scanning track. For example, in the case of the scanning locus S1, the boundary between the tracks T1 and T2, the track T2
An error occurs at the boundary of T3. The location where this error is likely to occur is the same for other scanning trajectories S2 and the like.

[Problems to be solved by the invention]

In general, a digital VTR employs shuffling for rearranging the order of data in order to disperse errors occurring during the recording / reproducing process when recording a digital video signal on a magnetic tape. Even when searching, shuffling is performed, but as described above, since the locations where errors are likely to occur are substantially the same in each scan, deshuffling, which is the reverse of shuffling, is performed in the reproduction circuit. Even so, an error in the playback screen occurs at a substantially fixed place. As a result, there is a problem that it is not possible to correct an error with correct data one frame before in the same spatial position. This temporal modification is particularly effective for still images.

Furthermore, in order to enable recording / reproducing of a digital video signal having a very large amount of information with a relatively simple configuration, the redundancy of the digital video signal is removed to reduce the amount of recorded / reproduced information. It is thought that. In order to reduce the amount of information of the digital video signal, high efficiency coding is employed. As one of the high-efficiency codings, there is known one in which a screen of one frame is subdivided into blocks of (4 × 4), (8 × 8), and the like, and coding is performed in block units.

In such a block coding, an error easily occurs in a block unit, and it is difficult to satisfactorily modify the data of the error block with surrounding correct data. If the position of the block where the error occurs is fixed at the time of the search, there is a problem that the image quality deteriorates conspicuously even after the modification.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a digital video signal recording apparatus in which errors during a search can be made inconspicuous by shuffling during recording.

[Means for solving the problem]

The present invention relates to a digital video signal recording apparatus which records a digital video signal as a track on a magnetic tape, wherein the input digital video signal is shuffled by periodically changing a shuffling method. A shuffling circuit that outputs the data as recording data for recording on the magnetic tape, wherein the shuffling circuit changes the shuffling method at a cycle corresponding to a maximum search speed of a reproducing device having a plurality of search speeds. Which is a digital video signal recording device.

[Action]

Since the shuffling method is periodically changed according to the search speed, the position of an error that occurs during search reproduction is not fixed, and it is possible to correct the error in the time direction. Further, since the position where the error is corrected is not fixed, the error is less noticeable. Therefore, the image quality of the reproduced image at the time of the search can be improved.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, an analog video signal is supplied to an input terminal indicated by 1. A digital video signal from the A / D converter 2 is supplied to a blocking circuit 3. In the blocking circuit 3, the arrangement of the digital video signals is changed from the scanning order to the block order.

As shown in FIG. 2, an image F of one frame is divided into blocks B of (4 lines × 4 pixels = 16 pixels), for example. In the block unit, starting from the upper left block of one frame, the blocks of the first row are sequentially output from the blocking circuit 3, and then the blocks of the second row are sequentially output. Are output in order, and the lower right block is output last. In each block, the data of the first row is sequentially output from the pixel data of the upper left, the data of the second row, the third row, and the fourth row are sequentially output, and finally, the image data of the lower right is output.

The output of the blocking circuit 3 is supplied to the ADRC encoder 4. ADRC (Adaptive Dynamic-Range Codin
This is an abbreviation of g), and is one of high-efficiency coding methods for reducing the amount of transmission data by reducing the redundancy in the level direction of image data.

FIG. 3 shows an example of the ADRC encoder 4. The output signal of the blocking circuit 3 is supplied to a maximum value / minimum value detection circuit 21 and a delay circuit 22. The detection circuit 21
The maximum value MAX and the minimum value MIN are detected from the values of the 16 pixel data. The delay circuit 22 delays data for a time for detecting the maximum value MAX and the minimum value MIN. In the subtraction circuit 23 (MA
X−MIN), and the dynamic range DR is obtained from the subtraction circuit 23.

In the subtraction circuit 24, the minimum value MIN is subtracted from the video data from the delay circuit 22, and video data from which the minimum value has been removed is obtained from the subtraction circuit 24. The output data of the subtraction circuit 24 and the dynamic range DR are supplied to the quantization circuit 25. From the quantization circuit 25, a code signal DT having a bit number smaller than the original bit number (8 bits), for example, 4 bits is obtained. The quantization circuit 25 performs quantization adapted to the dynamic range DR. In other words, the dynamic range DR is (2 ⁴ =
16) In the equally divided quantization step Δ, the video data from which the minimum value has been removed is divided, and the value obtained by rounding down the quotient and converting it to an integer is used as the code signal DT. The quantization circuit 25 can be constituted by a division circuit or a ROM.

Not only the above-mentioned fixed-length coding ADRC of a two-dimensional block, but also a three-dimensional block ADRC in which a block is formed over two frames, and a variable-length ADRC that changes the number of coding bits of pixels according to the dynamic range DR of the block Can be used.

The dynamic range DR, the minimum value MIN, and the code signal DT from the ADRC encoder 4 are combined into data of 8 bits (bytes) and supplied to the shuffling circuit 5. The shuffling circuit 5 changes the order of data on a byte-by-byte basis, for example. The shuffling circuit 5 can be realized by a configuration having two memory banks capable of storing encoded data for one frame. That is, during a frame period in which data is written to one memory bank, data is read from the other memory bank, and during the next frame period, data is read from one memory bank and transferred to the other memory bank. Data is written. Shuffling can be performed by making the address at the time of reading different from the order of the write addresses. In this example,
Writing of data in the shuffling circuit 5 is performed at a write address to be incremented, and reading of the data is performed based on an address or control data stored in a shuffling table.

Shuffling is not limited to byte units, but may be performed in units of several bytes or in units of blocks for ADRC. Further, the shuffling circuit can be provided in a stage before the blocking circuit 3 or in a stage subsequent thereto.

The address or control data from the shuffling table selected by the switching circuit 6 is supplied to the shuffling circuit 5. The shuffling table 9a is connected to one input terminal 7a of the switching circuit 6, and the shuffling table 9b is connected to the other input terminal 7b. These shuffling tables 9a and 9b are configured by a memory, and the shuffling tables 9a and 9b are configured by a read address of data of one frame or control data for generating a read address. By providing two shuffling tables 9a and 9b, different shuffling can be performed.

The switching circuit 6 is periodically switched by a control pulse from the terminal 8, so that the shuffling method (mode) is periodically switched. As an example, the switching circuit 6 every three frames corresponding to a triple search
Is switched.

The output of the shuffling circuit 5 is supplied to the framing circuit 10. The framing circuit 10 performs processing such as addition of a synchronization signal and encoding of an error detection code or an error correction code. The recording data obtained at the output terminal 11 of the framing circuit 10 is recorded on a magnetic tape by a rotary head via a channel encoding circuit as necessary. For example, one frame of recording data is recorded as one track. 180
Two rotating heads attached to the rotating drum at the opposing interval of ゜ can be used. In this case, a multi-channel head in which one rotating head simultaneously forms a plurality of tracks may be used. Also, by increasing the rotation speed of the drum,
Field recording data may be recorded as one track, or a segment obtained by dividing one field may be recorded as one track.

The magnetic tape recorded as described above is reproduced by the rotating head, and a reproduced video signal is obtained by processing in the reverse order of the recording circuit shown in FIG. At the time of normal reproduction, the speed of the magnetic tape is made equal to that at the time of recording, and the rotary head is formed on the magnetic tape and scans an oblique track. As an example, at the time of a search in which the speed of the magnetic tape is three times that of the normal reproduction, as shown in FIG. 4A, a scanning trajectory S1 of the rotary head is formed over the tracks T1, T2, and T3,
The next scanning locus S2 is formed over the tracks T4, T5, and T6. Further, the subsequent scan trajectory S3 and thereafter are similarly formed over three tracks.

In the shuffling circuit 5 of the recording circuit shown in FIG. 1, shuffling of data recorded on each of the tracks T1, T2, and T3 is performed based on the shuffling table 9a, and recording on the next tracks T4, T5, and T6, respectively. The shuffling of the data to be performed is performed based on the shuffling table 9b. Furthermore,
The shuffling of data recorded on the next tracks T7, T8, T9 is performed based on the shuffling table 9a. As described above, the shuffling mode is changed in a cycle of three tracks (three frames).

Reproduction data at the time of search reproduction is deshuffled, decoded by ADRC, and decomposed into frames. The error data is corrected by spatial interpolation corrected by surrounding correct data and time-direction interpolation by which correct data of the previous frame is interpolated. If the block is a block of a moving image, interpolation in space is performed. If the block is a still image, interpolation in the time direction is performed. The reproduced data with the error corrected is written to a memory, and a reproduced image is constituted by the image data read from the memory.

In this reproduced image, the error occurring near the track boundary is the fourth in the case of the scanning trajectories S1, S3,.
In FIG. B, the scanning locus S2,...
In the case of, it is indicated by a cross in FIG. 4C. That is, in each of the scanning trajectories S1, S2,..., Although the boundary of the track where the error occurs is substantially at the same position, the shuffling mode is different for every three tracks. The position of an error in an image of one frame obtained by reproduction is different for each scanning locus. Therefore, interpolation in the time direction can be performed, and the image quality of the reproduced image can be improved.

The present invention can be applied even when the search speed is other than three times, and the shuffling method may be changed at a cycle corresponding to this ratio. Further, the search speed can be changed in a plurality of ways. In this case, a possible search speed is determined according to the maximum search speed. For example, if the maximum speed is 30
In the case of double, the shuffling method is changed every 30 frames. (30 = 2 × 3 × 5), so 2, 3,
5, 6, 10, 15, and 30 are possible search speeds.

It should be noted that the block coding is not limited to ADRC, but DCT (D
An orthogonal transform code such as iscrete cosine transform may be used.

〔The invention's effect〕

According to the present invention, it is possible to prevent an error from occurring at the same position in a reproduced image by periodically changing the shuffling method according to the search speed. Therefore, it is possible to perform interpolation in the time direction using the past correct pixel data, to make errors less noticeable, and to improve the image quality of the reproduced image at the time of search.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of one embodiment of the present invention, FIG. 2 is a schematic diagram used for explaining block formation, FIG. 3 is a block diagram of an example of an ADRC encoder, FIG. Is a schematic diagram used for explaining a search operation according to an embodiment of the present invention, and FIG. 5 is a schematic diagram used for explaining a conventional technique. Explanation of main symbols in the drawings 3: Blocking circuit, 4: ADRC encoder, 5: Shuffling circuit, 6: Switching circuit, 9a, 9b: Shuffling table.

Claims (1)

(57) [Claims] 1. A digital video signal recording apparatus for recording a digital video signal as a track on a magnetic tape, wherein an input digital video signal is shuffled by periodically changing a shuffling method. A shuffling circuit for outputting as recording data for recording on the magnetic tape, wherein the shuffling circuit changes the shuffling method at a cycle corresponding to a maximum search speed of a reproducing apparatus having a plurality of search speeds. A digital video signal recording device.