JPH1023371A - Digital image signal recorder - Google Patents

Abstract

PROBLEM TO BE SOLVED: To record a moving image signal and a still image signal with higher definition by dividing a still image signal into 1/n (n>2) and converting it into a moving image signal with lower definition, applying prescribed processing to the converted signal and providing the output of the result. SOLUTION: A received still image signal (HDS signal) is fed to an HD frame memory 15 and an address control circuit 18 and the HDS signal by one HD frame is stored in the memory 15. The circuit 18 controls a read address of the memory 15 to rearrange picture elements of the HDS signal. In the rearrangement, the input HDS signals are stored in the memory 15, in which the signals are divided into 1/4 in an image area and converted in a way that the image signal of each divided area corresponds to a moving image signal (SD signal) of one frame. The HDS signal read from the memory 15 is given to a dummy insert circuit 17, where dummy data of the same value are inserted to a blank area of a frame of the SD signal and the resulting signal is fed to a switch circuit 13. The circuit 13 selects the SD signal or the HDS signal whose picture elements are rearranged and gives the selected signal to an image signal recording and reproducing section 2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a digital image signal recording device and a recording / reproducing device, and more particularly to a device for recording / reproducing a high-definition still image signal.

[0002]

2. Description of the Related Art A standard called "DVC" (hereinafter referred to as "DVC standard") has been proposed as a standard of a digital VTR (video tape recorder) for compressing and recording image data.
eport Vol. 41 No.2 Apr. 1995 pages 48 to 55
page). The DVC standard includes a standard for recording an image signal (SD signal) having a normal resolution at a current broadcast level and a standard for recording an image signal (HD signal) having a high definition. The outline of the standard for recording the information is described below.

[0003] In the so-called 525/60 system (the NTSC system or the like corresponds to this), the video signal is (4:
1: 1). As for the luminance (Y) signal, the number of effective pixels in the horizontal direction is 720 pixels, the number of effective lines in the vertical direction is 480 in the frame, and the color difference (Cb, Cb).
r) For the signal, the number of effective pixels in the horizontal direction is 180 pixels, and the number of effective lines in the vertical direction is 480, which is the same as the luminance signal.

[0004] DCT (Discrete Cosine Transform) operation is performed by blocking these effective pixel data. A block for DCT operation (hereinafter, referred to as “DCT block”) is
Specifically, each of the luminance (Y) signal and the color difference (Cb, Cr) signal is configured by dividing one frame pixel into eight horizontal pixels × eight vertical pixels. Then, as shown in FIG. 8, Y corresponding to the same area at the same position on the screen
A 6 DCT block including four DCT blocks of a signal and one DCT block of a Cb signal and a Cr signal is called a “macro block”. Further, the screen of one frame is divided in units of 27 macro blocks to form a super block as shown in FIG. Then, one superblock is selected from each column in FIG. 9, one macroblock is extracted from each superblock, and one video segment is composed of five macroblocks. At the time of compression, control is performed so that the data amount is within a predetermined amount in video segment units.

The DCT operation includes a mode in which 8 × 8 DCT is performed with 8 horizontal pixels × 8 vertical pixels in frame units,
8 × 4 D with 8 horizontal pixels × 4 vertical pixels in field units
A mode is provided in which an 8 × 8 block is formed by performing CT and taking the sum and difference of DCT coefficients of two fields, and can be adaptively switched at the time of encoding. The DCT coefficient obtained by the DCT operation is selected by selecting a quantization table so that the data amount after the quantization and the variable length coding is equal to or less than a predetermined value and the value closest to the predetermined value. Be transformed into

The data after quantization and variable length coding are formatted in macroblock units as shown in FIG. 10, and further, as shown in FIG.
It is recorded on a magnetic tape in the form of a sync block to which a D code and a parity word for error correction are added. One frame of image data is recorded by being divided into ten tracks. That is, image data for one row in the super block of FIG. 9 is recorded on one track. FIG. 12 is a diagram showing an arrangement of data on one track.

The data formatted as shown in FIG. 10 also includes various parameters required for decoding (error and concealment information STA, selected quantization table number QNO, etc.). Here, data of one video segment is stored in five sync blocks. At this time, the DC component data is in the DC area (DC0 to DC5) in the figure.
And the AC component is stored in the AC area. The AC component is the corresponding DCT in the same sync block as the DC component.
Basically, the data is stored in the AC area of the block. However, if the amount of data becomes larger than the capacity of the allocated area, a vacant AC area in the same sync block or a vacant area in the same video segment is used. The existing AC area is diverted.

[0010] The ID code shown in FIG. 11 includes a track pair number indicating a sync block of a track of all 10 tracks constituting image data of one frame, and a number of tracks in one track. A sync block number indicating whether the block is the third sync block is stored. Further, the ID code of the sync block storing the image data includes a sequence number (SE
Q. No. ) Is stored. This is a series of 12
Numbers from 0 to 11 are assigned to frames.

In FIG. 12, ITI is ITI (Ins
ert and Track Information
n) A sector in which information mainly for facilitating tracking control during insert editing is recorded. AUDI
O is an audio sector, which is composed of nine sync blocks storing audio data and five sync blocks storing outer parity. VIDEO is a video sector, which is composed of 135 sync blocks storing video data, three sync blocks storing auxiliary data called video AUX, and 11 sync blocks storing outer parity. SUBC
ODE is a subcode sector, and is an area where time code information and the like are recorded. In FIG. 12, the portions other than those described above are portions called gaps, and serve as margins for preventing other sectors from being destroyed during insert editing in sector units.

[0010]

The DVC standard includes a standard for recording and reproducing an HD signal, which is a high-definition moving image signal, in addition to the standard for recording and reproducing the SD signal described above. No standard has been defined for recording and reproducing still image signals with higher definition than SD signals.

The present invention has been made in view of this point. A digital image recording apparatus capable of recording a moving image signal and a higher definition still image signal, and a moving image signal and a higher definition still image signal. It is an object of the present invention to provide a digital image recording / reproducing apparatus capable of recording and reproducing an image signal.

[0012]

According to a first aspect of the present invention, there is provided a digital image signal recording apparatus for recording an image signal having a first definition.
A still image signal of a second definition higher than the definition of n (2
A division conversion unit that converts the image signal into the first definition image signal by division and outputs the divided image signal as a division conversion signal, and a recording unit that performs predetermined processing on the division conversion signal and records it on a recording medium And characterized in that:

According to a second aspect of the present invention, in the digital image signal recording apparatus according to the first aspect, the recording means compresses the image information by performing an orthogonal transformation for each predetermined pixel block. And the conversion unit performs the conversion in units of the predetermined pixel block.

According to a third aspect of the present invention, in the digital image signal recording apparatus according to the second aspect, the first definition image signal and the second definition still image signal are a luminance signal and a second definition image signal. Wherein the recording means comprises:
The luminance signal and a chrominance signal corresponding to the luminance signal are recorded on the recording medium in units of macroblocks composed of a plurality of the predetermined pixel blocks, and the division conversion unit performs conversion in units of the macroblocks. It is characterized by performing.

The invention according to claim 4 is the invention according to claim 2 or 3.
In the digital image signal recording device described in the above, the division conversion means converts the divided conversion signal so as to have a blank area that does not include the pixel of the still image signal of the second definition, at least in the blank area A dummy data insertion unit for inserting dummy data having the same value in the range of the predetermined pixel block is provided.

[0016] The invention according to claim 5 provides the invention according to claims 1 to 4.
In the digital image signal recording device according to any one of the above, the division conversion means may include one of the n divided parts.
It is characterized in that the divided frame conversion signal is output two or more predetermined times. According to a sixth aspect of the present invention, in the digital image signal recording apparatus according to any one of the first to fourth aspects, the division conversion unit is configured to perform the division conversion according to an input time interval of the second definition still image signal. , And outputs one or more divided conversion signals of one frame formed by n divisions.

[0017] The invention according to claim 7 is the invention according to claims 1 to 6.
In the digital image signal recording device according to any one of the above, the recording means, when recording the divided conversion signal on the recording medium, the auxiliary information indicating the number of the n divided signals. It is characterized by having auxiliary information adding means for adding.

[0018] The invention according to claim 8 is the invention according to claims 1 to 6.
In the digital image signal recording apparatus according to any one of the above, the pixels of the second definition still image signal are thinned out to convert the pixels into the first definition image signal, and output as a thinning conversion signal. Means, wherein the recording means records the thinned-out converted signal together with the divided converted signal on the recording medium.

According to the ninth aspect of the present invention, there are provided the first to eighth aspects.
In the digital image signal recording device described in any one of the above, the division conversion means divides the second definition still image signal into n in a screen area. According to a tenth aspect of the present invention, in the digital image signal recording apparatus according to the third aspect, the division conversion section thins out the second definition still image signal into n types of macroblock units. , The n division is performed.

According to an eleventh aspect of the present invention, in the digital image signal recording apparatus according to any one of the first to eighth aspects, the division conversion means converts the still image signal of the second definition into pixel units. The above-mentioned division is performed by thinning out in n ways. According to a twelfth aspect of the present invention, in the digital image signal recording apparatus according to the third aspect, the number of pixels of two color difference signals of the second definition still image signal is larger than the number of pixels of the luminance signal. The first predetermined number s in the horizontal direction and the second predetermined number t in the vertical direction.
And the number of pixels of the two color difference signals of the image signal of the first definition is the second in the horizontal direction with respect to the number of pixels of the luminance signal.
The predetermined number t is 1 / the first predetermined number 1 / s in the vertical direction, and the division converting means includes a horizontal direction s luminance signal of the second definition still image signal and a vertical direction t And a block set conversion means for converting a block set including the predetermined pixel blocks into a block set including t predetermined pixel blocks in the horizontal direction and s predetermined pixel blocks in the vertical direction.

According to a thirteenth aspect of the present invention, in the digital image signal recording apparatus according to the fifth aspect, the division conversion means converts the divided conversion signal of one frame formed by dividing the n into two or more predetermined times. In the case where m is output, i (<m) times of the predetermined number m is output by changing the pixel arrangement in the frame.

According to a fourteenth aspect of the present invention, in the digital image signal recording apparatus according to any one of the first to thirteenth aspects, when the recording means records the divided conversion signal on the recording medium, A sequence number adding unit for adding a sequence number indicating an order of a group of data on the recording medium, wherein the sequence number adding unit is adapted to correspond to each frame of the n-divided and converted signal. It is characterized in that the sequence number is added.

According to a fifteenth aspect of the present invention, in the digital image signal recording / reproducing apparatus for recording / reproducing a first definition image signal, a still image signal having a second definition higher than the first definition is converted. division conversion means for converting the image signal into the first definition image signal by dividing the image signal into n (an integer of 2 or more) and outputting the divided image signal as a divided conversion signal; Recording means for reproducing a signal recorded on the recording medium, and reproduction conversion means for converting the reproduced signal into the still image signal of the second definition and outputting the same. And

According to a sixteenth aspect of the present invention, in a digital image signal reproducing apparatus for reproducing an image signal having a first definition recorded on a recording medium, a digital image signal having a second definition higher than the first definition is provided. Converting a still image signal into an image signal of the first definition by dividing it into n (integer of 2 or more);
Reproduction means for reproducing a signal recorded on a recording medium on which the converted signal is recorded; and reproduction conversion means for converting the reproduced signal into the second definition still image signal and outputting the same. It is characterized by.

According to a seventeenth aspect of the present invention, there is provided an image signal processing apparatus connected to a digital image signal recording apparatus for recording an image signal having a first definition, wherein the second definition is higher than the first definition. Dividing the still image signal into n (an integer of 2 or more) to convert the still image signal into the first definition image signal and outputting the divided image signal as a divided conversion signal. The signal is input to a signal recording device.

According to the first aspect of the present invention, the still image signal of the second definition higher than the first definition is divided into n (integer of 2 or more), whereby the image of the first definition is divided. The signal is converted into a signal, subjected to predetermined processing, and recorded on a recording medium. According to the sixteenth aspect, a still image signal having a second definition higher than the first definition is divided into n (an integer of 2 or more) to be converted into an image signal having the first definition. A signal recorded on a recording medium on which the converted signal is recorded is reproduced, and the reproduced signal is converted into a second definition still image signal and output.

According to the seventeenth aspect of the present invention, the still image signal of the second definition higher than the first definition is divided into n (integer of 2 or more), whereby the image of the first definition is divided. The signal is converted into a signal, output as a divided conversion signal, and the divided conversion signal is input to a digital image signal recording device.

[0028]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 is a block diagram showing the configuration of a digital image signal recording / reproducing apparatus according to an embodiment of the present invention.
And an image signal recording / reproducing unit 2.

The image signal switching processor 1 has an input terminal 11 to which a digitized SD signal is input, and an input to which a digitized high-definition still image signal (hereinafter referred to as "HDS signal") is input. Terminal 12 and the reproduced HDS
An output terminal 19 for outputting a signal, an output terminal 20 for outputting a reproduced SD signal, and first and second switch circuits 13 and 1 for switching between the SD signal and the HDS signal.
4, first and second HD frame memories 15 and 16 for storing HDS signals in frame units, and a dummy data insertion circuit 17 for inserting dummy data described later,
Address control circuit 18 for controlling read / write addresses of the first and second HD frame memories 15 and 16
Are the main components. In the present embodiment, the Y signal of the HDS signal has 1280 effective pixels in the horizontal direction and the number of effective lines in the vertical direction is a frame (hereinafter, the HDS signal frame is referred to as “HD frame”, and the SD signal frame is referred to as “HD frame”. SD frame ”), and C
The r and Cb signals are 320 pixels in the horizontal direction (the number of pixels obtained by thinning out the pixels of the Y signal to 1/4), and the vertical direction is the same as the Y signal in 1000 lines.

The input HDS signal is supplied to the first HD frame memory 15 and the address control circuit 18,
HDS signals for HD frames are stored in the first HD frame memory 15. The address control circuit 18 controls the read address of the HD frame memory 15 as described later, rearranges the pixels of the HDS signal, and outputs the HDS signal read from the HD frame memory 15 to the dummy data insertion circuit 17. The first switch circuit 13 switches between the SD signal and the HDS signal in which the pixels are rearranged, and supplies the switched signal to the blocking circuit 21 of the image signal recording / reproducing unit 2.

In the present embodiment, the image signal recording / reproducing section 2 is constituted by a VTR conforming to the DVC standard, and is hereinafter referred to as "VTR section 2". The image signal recording system of the VTR unit 2 includes a blocking circuit 21 that performs blocking for DCT operation,
A DCT circuit 22 for performing a CT operation, a quantization circuit 23 for performing a quantization, and a VLC (Variable Len) for performing a variable length encoding.
gth Coding) circuit 24, an auxiliary information writing circuit 25 for writing information to subcode sectors, adding video AUX data, and the like; an error correction encoding circuit 26 for adding parity bits for error correction; A sync block synthesis recording and modulation circuit 27 for performing modulation for recording on a magnetic tape while synthesizing blocks and a magnetic head 28 for recording on a magnetic tape 41 are main components. A magnetic head 28 for reproducing from the magnetic tape 41, a SYNC detection / reproduction / demodulation circuit 29 for detecting and demodulating a sync block, an error correction decoding circuit 30 for performing error correction based on parity bit information, Sector data, video A
Auxiliary information reading circuit 3 for reading UX data etc.
1 and VLD (Variable Length Decode) for performing variable length decoding.
coding) circuit 32 and an inverse quantization circuit 33 for performing inverse quantization
And an inverse DCT circuit 34 for performing an inverse DCT operation and a pixel rearranging circuit 35 for rearranging pixels as main components.

The output signal of the pixel rearranging circuit 35 of the VTR unit 2 is input to the second switch 14 of the image signal switching processing unit 1. The second switch 14 is switched to the SD signal output terminal 20 when the reproduction signal is an SD signal, and is switched to the second HD frame memory 16 when the reproduction signal is an HDS signal. When reproducing the HDS signal, the address control circuit 18 controls the write address of the HD frame memory 16 so that the arrangement of the pixels rearranged at the time of recording is restored, and also controls the write address of one HD frame in the order inputted at the time of recording. The read address is controlled so that the data is output.

Next, a method of rearranging pixels when recording an HDS signal will be described. The input HDS signal is
Stored in the D frame memory 15 and divided into four in the screen area,
The image signal of the divided area is one frame (1
(SD frame) image signal.
Input to VTR unit 2.

FIG. 2 is a diagram for explaining a method of dividing the Y signal into four parts. One HD frame is divided into two parts in both the horizontal and vertical directions, and the divided areas A, B, C and D are respectively shown. It consists of 640 horizontal pixels × 500 vertical pixels. 1SD
Since the frame is composed of 720 horizontal pixels × 480 vertical pixels, each of the areas A to D does not correspond to a 1SD frame as it is, so the following pixel movement is performed.

First, as for the areas A and B, as shown in FIG. 2B, the lower ends of the areas A and B coincide with the lower ends of the SD frames, and are located substantially at the center of the SD frames in the horizontal direction. To correspond to. Then, the pixels of the upper protruding region R1 (640 horizontal pixels × 20 vertical pixels) are converted to SD
Left peripheral area R2 of the frame (32 horizontal pixels × 40 vertical pixels)
0 pixel). At this time, the horizontal unit is moved as much as possible with the minimum unit of 8 horizontal pixels × 8 vertical pixels.
Further, as for the Y signal, as shown in FIG. 8, since a macroblock is composed of 32 horizontal pixels × 8 vertical pixels, it is moved in this unit as much as possible.

In this embodiment, the region R1 (640 × 20
(Pixels), the image data is cut out by 32 horizontal pixels × 16 vertical pixels, and sequentially stored in the region R2. In this case, horizontal 64
0 pixels x 4 vertical pixels remain, so the horizontal 8 pixels x
Four vertical pixels are arranged vertically to form a block of 8 horizontal pixels × 8 vertical pixels, and 4 blocks are collected and sequentially stored in the region R2 in units of 32 horizontal pixels × 8 vertical pixels.

Further, in the areas R3 (horizontal 32 pixels × direct 80 pixels) and R4 (horizontal 48 pixels × vertical 480 pixels) in the SD frame, which are hatched to the lower right,
All data having the value “16” are stored as dummy data. On the other hand, as for the areas C and D, as shown in FIG. 2C, the upper ends of the areas C and D coincide with the upper ends of the SD frames.
In addition, the horizontal direction is set so as to be located substantially at the center of the SD frame. Then, the pixels in the region R5 are moved to the region R6, and the dummy data having the value “16” is stored in all the regions R7 and R8. The method of moving the pixels in the region R5 to the region R6 is the same as in the case of FIG.

The Cr and Cb signals are also divided into four in the same manner as the Y signal, and converted into data for one SD frame of 180 horizontal pixels × 480 vertical pixels. Also in this case, in the regions corresponding to the regions R3 and R7 (horizontal 8 pixels × vertical 80 pixels) and the regions corresponding to the regions R4 and R8 (horizontal 12 pixels × vertical 480 pixels), all the dummy values of “128” are set. Store the data.

As described above, the pixel data of 1/4 frame of the HDS signal is sequentially converted into the pixel data of one frame of the SD signal, and the image signal corresponding to one HD frame is converted into the image signal of 4SD frame. VTR part 2
Is input to In the recording system of the VTR unit 2, special processing for HDS signals described below is performed together with signal processing such as DCT operation, quantization, and variable-length coding in accordance with the DVC standard as described above. The image information is recorded in the. Here, according to the DVC standard, image data of one SD frame is divided into ten tracks and recorded, and thus these ten tracks are referred to as one track frame.

In this embodiment, the image data corresponding to each of the divided areas A, B, C, and D as shown in FIG. 2A is continuously over three track frames (30 tracks). Record. Therefore, image data of one HD frame is recorded over 12 track frames.
This process is performed by controlling the address control circuit 18 of the image signal switching processing unit 1 to repeatedly read image data for one SD frame three times. This processing may be performed by the sync block synthesis recording modulation circuit 27 at the time of sync block synthesis.

In a subcode sector, which is an auxiliary information recording area of each track frame, information indicating that a certain portion of a 1 HD frame divided into four is recorded in the track frame, and which portion is recorded. Is recorded. In addition, as video AUX data as auxiliary data, information indicating a still image,
Information indicating whether the data is different from the image data of the previous track frame and information indicating the aspect ratio of one HD frame are recorded. This processing is performed by the auxiliary information writing circuit 25.

Next, processing in the reproduction system of the VTR unit 2 will be described. The data recorded on the magnetic tape is reproduced and demodulated to form a digital data string. From this data string
The YNC word (see FIG. 11) is detected, and data of one sync block is obtained. Error detection / correction processing using inner parity is performed on the reproduced data thus obtained in the sync block, and error detection / correction processing using outer parity is further performed on video data and the like. . Thereafter, reading of auxiliary information, variable-length decoding (reverse processing of variable-length encoding), inverse quantization, and inverse DCT operation are sequentially performed, and the pixels are rearranged in the original pixel arrangement, and image signal switching is performed. The second of the processing unit 1
Is output to the switch circuit 14.

The above is the processing common to the SD signal and the HDS signal. Further, at the time of reproducing the HDS signal, the auxiliary information reading circuit 31 reads the data of the subcode sector and the video AUX data, and outputs necessary information such as information indicating which portion of the 1HD frame is recorded in the track frame. Get. And that HD
Information about the S signal is supplied to the image signal switching processing unit 1.

The address control circuit 18 controls the address when the reproduced data is stored in the second HD frame memory 16 based on the information on the HDS signal supplied from the VTR section 2. At this time, since the image data divided into four parts is recorded continuously over three track frames, the same data is obtained over three frames during reproduction. The data of the third frame is stored in a predetermined location of the HD frame memory 16. 3
The data of the frame is recognized by referring to information recorded as video AUX data, which is a still image, and information indicating whether the data is different from the image data of the previous track frame.

Similarly, the data of all the four divided areas is stored in the HD
The data is read from the HD frame memory 16 as frame data. The aspect ratio and the like of the read image are determined with reference to information recorded as video AUX data.
Thus, a reproduced HDS signal is obtained.

In this embodiment, the first switch circuit 13 shown in FIG. 1 is switched when the user selects the recording of the SD signal or the recording of the HDS signal. Then, information indicating whether the signal recording is the SD signal recording or the HDS signal recording is supplied to a control unit (not shown), and the control unit performs switching control in each unit at the time of recording of the VTR unit 2. At the time of reproduction, the control section determines whether the signal is an SD signal or an HDS signal from the auxiliary information read by the auxiliary information reading circuit 31, and performs switching control of the second switch 14 and the like.

As described above, in the present embodiment, a 1 HD frame still image signal is divided into four areas and converted into a 1 SD frame image signal, and the VTR unit 2 conforming to the DVC standard is used.
Recording and reproducing using a digital video signal, a digital image signal recording and reproducing apparatus capable of recording and reproducing both a moving image signal (SD signal) with a normal resolution and a still image with a high definition at a low cost. Can be.

Further, when moving a pixel in order to divide an image signal of a 1 HD frame into four in a region to obtain an image signal of a normal resolution 1 SD frame, a horizontal unit of 8 pixels × 8 vertical pixels is used as a minimum unit. Even if it is less than 8 horizontal pixels × 8 vertical pixels, nearby pixels are collected and moved in a unit of 8 horizontal pixels × 8 vertical pixels.
When performing the T operation, the correlation between pixels in the DCT block is high, and image information can be efficiently compressed.

Also, a macro block composed of 8 horizontal pixels × 8 vertical pixels of the color difference signal of the HDS signal and 32 horizontal pixels × 8 vertical pixels of the Y signal corresponding to the color difference signal corresponds to the macro block at the time of compression in the VTR section 2. Since the pixels are moved so as to match as much as possible, good concealment can be performed during reproduction.

In addition, dummy data of a constant value (16 or 128) is put in all areas (areas R3, R4, R7, and R8 in FIG. 2) which are margins of image signals of one SD frame. When the DCT operation is performed on the data in the area, the coefficients of the AC component are all “0”, and only the coefficients of the DC component and the EOB code are obtained when the variable-length coding is performed. Therefore, in a video segment including a DCT block (a unit in which the number of bits after variable-length encoding is reduced to a certain amount or less), the number of bits can be assigned to another DCT block. It can be a small value, and the quantization noise can be reduced. As a result, a high-quality reproduced image can be obtained.

When moving a pixel in order to divide an image signal of a 1 HD frame into four by a region to obtain an image signal of a 1 SD frame, the original pixel arrangement is preserved as much as possible, and a region protruding in the vertical direction (FIG. The pixels in the regions R1 and R5 of the normal resolution are placed in the peripheral region of the frame of the normal resolution (the region R in FIG.
(2, R6), it is possible to reduce the sense of discomfort even when the recorded data is reproduced as normal resolution data.

Further, since the image data divided into four parts is recorded continuously by three track frames (30 tracks), a case where a part of the recorded data is lost due to an uncorrectable error during reproduction. However, relatively good image data can be obtained by concealment. That is, even if there is a sync block in which the recording data is lost due to an uncorrectable error in each track frame among the data continuously recorded in the three track frames, the data of the same sync block is lost in all the three track frames. Since the probability is very small,
When the last track frame of the three track frames is played back, concealment is performed using the playback data of the preceding two track frames, whereby good concealment can be performed.

Also, in the subcode sector of each track frame, information indicating that a certain portion of a four-divided still image of one HD frame is recorded in the track frame, and which portion is recorded. Since information is recorded, data can be read even during fast-forward reproduction, and image data can be searched for by fast-forward.

The number of pixels of the HDS signal is not limited to 1280 horizontal pixels × 1000 vertical pixels in the Y signal, but may be, for example, 1344 horizontal pixels × 1024 vertical pixels. In that case, as in the case shown in FIG.
1 HD frame divided into 4 parts, horizontal 672 pixels x vertical 51
Of the two pixels, a portion exceeding the vertical 480 pixels (horizontal 672 pixels)
(Pixel × 32 vertical pixels) is moved to the peripheral area of the 1SD frame. In this case, in an area of horizontal 32 pixels × vertical 480 pixels in the left peripheral portion of the SD frame, a horizontal 32 pixels × vertical 32 pixels are cut out from the HD frame and stored.
Further, the remaining pixels of the HD frame are cut out by 16 horizontal pixels × 32 vertical pixels at a time, and stored in an area of 16 horizontal pixels × 480 vertical pixels in the right peripheral portion of the SD frame. Then, dummy data having a value of "16" is stored in the remaining area of the area at the right peripheral portion.

Also, one HD frame is not necessarily
There is no need to divide, for example, horizontal 1280 pixels × vertical 1
000 pixels may be divided into two regions of 640 horizontal pixels × 504 vertical pixels and two regions of 640 horizontal pixels × 496 vertical pixels. Further, it is not always necessary to divide the image signal into four. For example, an image signal of one HD frame composed of 1920 horizontal pixels × 1036 vertical pixels may be substantially divided into six.

The value of the dummy data stored in the margin of one SD frame is not limited to “16” or “128”, but is the value of a DCT block (8 horizontal pixels × 8 vertical pixels) as a unit for performing the DCT operation. Data having the same value in the range may be used. In the above-described embodiment, the VTR unit 2 conforming to the standard of the SD signal is used to record and reproduce a still image signal with higher definition than the SD signal. Using HD
Still images with higher definition than signals (for example, horizontal 200
0 pixels x 2000 pixels vertically)
It goes without saying that the above-described method can be applied.

(Second Embodiment) In the present embodiment, the 1 HD frame is divided into four by the processing shown in the first embodiment, and the number of pixels of the HDS signal is reduced to 1/4 together with the image data of the 4 SD frame. The processed image data is recorded.

FIG. 3 is a diagram for explaining the process of thinning out the number of pixels to 1/4, where a, b, c and d represent pixels. As shown in the figure, in this embodiment, pixels are thinned out every other pixel both horizontally and vertically (that is, pixels a,
c and d are thinned out), and the number of pixels is reduced to 1/4. Input HDS
The signal is horizontal 1280 pixels × vertical 10 for the Y signal.
If the Cb signal and the Cr signal are 320 horizontal pixels × 1000 vertical pixels, the above-described thinning process results in a Y signal of 640 horizontal pixels ×
There are 500 vertical pixels, and the Cb and Cr signals are 160 horizontal pixels × 500 vertical pixels.

As for the Y signal, as shown in FIG. 4, a region R11 (640 horizontal pixels × 10 vertical pixels) in the upper part of the frame and a region R12 (64 horizontal parts) in the lower part of the frame are provided.
(640 pixels × vertical 480 pixels) excluding data of (0 pixel × 10 vertical pixels), the horizontal 720
Correspondence is made so as to be located substantially at the center of pixel × vertical 480 pixels. Then, the left and right peripheral regions R1 of the SD frame
3, R14 (horizontal 40 pixels x vertical 480 pixels)
Stores dummy data whose value is "16".
Similarly, the Cr signal and the Cb signal are also set so as to be located substantially at the center of 180 horizontal pixels × 480 vertical pixels as 160 horizontal pixels × 480 vertical pixels excluding the upper and lower 10 vertical pixels. Then, the left and right peripheral areas where there is no corresponding pixel (each of 10 horizontal pixels × 48 vertical pixels)
Dummy data having a value of “128” is stored in all (0 pixels).

As described above, the image signal switching processing section 1
Configures the image data of one SD frame, and inputs it to the VTR unit 2. Then, as shown in the first embodiment, 1H
The image data of the D frame is divided into four in the screen area to form the data of the SD frame, and is input to the VTR unit 2. In this manner, the image data constituted by thinning out the number of pixels to 1/4 on the magnetic tape is recorded over three track frames, and the image data constituted by four divisions are respectively successively recorded on three track frames. Record over time. Thereby, the image data of one HD frame is recorded over 15 track frames.

A sub-code sector of a track frame in which image data formed by thinning out the number of pixels is recorded
The number of pixels of one HD frame is 1 for the track frame.
In addition to recording information indicating that image data formed by thinning to / 4 has been recorded, information indicating a still image, information indicating whether the data is different from the previous track frame, and HD as video AUX data. Information indicating the frame aspect ratio is recorded.

The processing at the time of reproduction is the same as that of the first embodiment for data divided into four parts. For image data recorded by performing the thinning process, the playback HD
It is not used as data for restoring one HD frame of the S signal. However, the pixel data may be interpolated into image data of one HD frame by using the image data formed by the thinning process, and output as a reproduced HDS signal.

The image data formed by the thinning process is as follows.
This is used when fast forward reproduction is performed and the recorded content is searched on the monitor for the SD signal. That is, the information of the sub-code sector is read while the magnetic tape is fast-forwarded, the thinning process is performed, and the reproduction process is performed only on the track frame in which the information indicating that the recording is performed is output. The recorded contents of the HDS signal can be confirmed on the monitor.

As described above, in the present embodiment, the image signal of one HD frame is divided into four by the screen area to form and record the image data of the SD frame, and the number of pixels of the one HD frame is thinned to ４. Thus, the image data of the SD frame is configured and recorded, so that the recorded content can be easily searched on the monitor for the SD signal.

In the above-described embodiment, no special processing is performed when thinning out the number of pixels. However, a band limiting filter in a plane may be applied before the thinning-out processing. Thereby, it is possible to prevent the occurrence of aliasing distortion due to the thinning process. In the above-described embodiment, the image data of the SD frame is configured by simply thinning out the pixels. However, the rate of 1280 pixels in the horizontal direction may be converted to 9:16 to 720 pixels.

(Third Embodiment) In this embodiment, HDS signals of different color systems can be recorded and reproduced in the first and second embodiments. The input HDS signal in this embodiment is a digital signal of 1280 horizontal pixels × 1008 vertical pixels for the Y signal, and a digital signal of 640 horizontal pixels × 504 vertical pixels for the Cb and Cr signals. It is assumed that the digital signal has half the number of pixels.

In this embodiment, as shown in FIG. 5A, one HD frame is divided into four in the horizontal direction in the screen area. Each of the divided areas A, B, C, and D is a horizontal 32
It consists of 0 pixels x 1008 pixels vertically. The Cb and Cr signals are also divided into four in the horizontal direction, and each divided area is defined as 160 horizontal pixels × 504 vertical pixels. Further, as for the Y signal, as shown in FIG.
Each block is taken out of 6 pixels and divided into blocks of 8 horizontal pixels × 8 vertical pixels, and two blocks arranged vertically are arranged horizontally. As a result, horizontal 3
20 pixels x 1008 pixels are horizontal 640 pixels x 5 vertical
This is an arrangement of 04 pixels. As shown in FIG. 5 (c), this is done by, as shown in FIG.
A region of 640 horizontal × 480 vertical pixels excluding (pixel × 8 vertical pixels) is 720 horizontal pixels × 48 vertical pixels of the SD frame.
Correspondence is made so as to be located substantially at the center of 0 pixel. Then, the pixels of the regions R21 and R22 are moved to the left peripheral region R23 (horizontal 32 pixels × vertical 480 pixels) of the SD frame with a horizontal unit of 32 pixels × eight pixels as a minimum unit, and the right peripheral region R24 of the SD frame ( Horizontal 4
Dummy data is stored in all 16 pixels (8 pixels × 480 pixels) with a value of “16”.

Similarly, for the Cr signal and the Cb signal,
An area of 160 horizontal pixels × 480 vertical pixels excluding an area of 160 horizontal pixels × 16 vertical pixels at the top of the frame and an area of 160 horizontal pixels × 8 vertical pixels at the bottom of the frame is SD.
Correspondence is made so as to be located substantially at the center of horizontal 180 pixels × vertical 480 pixels of the frame. The horizontal 160 pixels × vertical 16 pixels at the top of the frame and the horizontal 1 at the bottom of the frame
The 60 pixels × 8 vertical pixels are moved to the left peripheral area of the SD frame (8 horizontal pixels × 480 vertical pixels) with the horizontal 8 × 8 vertical pixels as a minimum unit, and the right peripheral area of the SD frame (12 horizontal pixels). (* Vertical 480 pixels), dummy data is stored with a value of "128".

Thus, the image data of one HD frame is converted into the image data of 4SD frames. Except for the above points, it is the same as the first embodiment. When the image data of one SD frame is also recorded by thinning out the number of pixels to 1/4 as in the second embodiment, the following is performed. As for the Y signal, as in the second embodiment, the pixels of one HD frame are
The process of thinning out every pixel and the process of thinning out the Cr and Cb signals by 1/4 only in the horizontal direction are performed. As a result, the Y signal has 640 horizontal pixels × 504 vertical pixels, and
For the Cr and Cb signals, horizontal 160 pixels × vertical 5
04 pixels. Other processes are the same as in the second embodiment.

As described above, in the present embodiment, Cr
And the number of pixels of the Cb signal is Y in both the horizontal and vertical directions.
When an HDS signal that is a half of the signal is recorded by the VTR unit 2 conforming to the 4: 1: 1 color system, the horizontal 16 bits of the Y signal corresponding to 8 horizontal pixels × 8 vertical pixels of the color difference signal are used.
Pixels × vertical 16 pixels are rearranged in units of a block composed of horizontal 8 pixels × vertical 8 pixels, and horizontal 32 pixels × vertical 8
Since the pixel is a pixel, a set of horizontal 8 pixels × vertical 8 pixels of the color difference signal of the HDS signal and horizontal 16 pixels × vertical 16 pixels of the corresponding Y signal matches the macroblock at the time of compression in the VTR unit 2. And good concealment can be performed.

(Fourth Embodiment) In this embodiment, the method of dividing one HD frame in the first embodiment is changed to another method. In the present embodiment, as shown in FIG. 6, one HD frame is divided into macro blocks (Ma, Mb, M).
(c, Md) is taken as a unit, and every other horizontal and vertical is taken out to form image data of a 4SD frame.
As shown in FIG. 8, the macro block is composed of four DCT blocks for the Y signal and one DCT block for the Cr and Cb signals, for a total of 6 DCT blocks. That is, for the Y signal, a unit of 32 horizontal pixels × 8 vertical pixels is used as a unit.
The Cr and Cb signals are divided into units of 8 horizontal pixels × 8 vertical pixels.

The other points are the same as in the first embodiment. This division has the advantage that when searching for recorded content on a monitor for SD signals, the image content can be confirmed by fast-forward playback. This is because the boundaries of the macroblocks constituting each SD frame are not continuous, but include the entire screen area within the range of the number of pixels of the SD signal.

Also, since the macroblock is used as a unit, the compression processing in the VTR unit 2 can advantageously use the high correlation of the pixels in the macroblock as it is. (Fifth Embodiment) In the present embodiment, the S is configured by dividing one HD frame into four parts in the first to fourth embodiments.
When recording a D frame, the data of the SD frame and the sequence number S in the ID code of the sync block are used.
EQ. No. Is made to correspond.

For example, the correspondence is made as follows. Of the SD frames obtained by dividing into four, the first SD frame is described in SEQ. No. = 0 or 4 or 8, and for the second SD frame, SEQ. No. = 1 or 5 or 9, and for the third SD frame, SE
Q. No. = 2 or 6 or 10, and for the fourth SD frame, SEQ. No. = 3 or 7 or 11. Since each SD frame is recorded over three track frames, the sequence number recorded on the magnetic tape is, for example, 0, 0, 0,
1,1,1,2,2,2,3,3,3.

In general, when data is reproduced at a tape feed speed higher than that at the time of recording, the magnetic head crosses tracks on the tape diagonally, so that data of a plurality of track frames is mixed in a reproduced signal in units of sync blocks. . In this embodiment, even in such a case, by reading the sequence number in the ID code, it is possible to determine the order of the SD frame among the SD frames obtained by dividing the sync block into four. Become. In the ID code, information indicating the number of the track in the one track frame to which the sync block belongs (track pair number), and a sync number indicating the number of the sync block in the one track. The block number is stored. As described above, since a sync block corresponds to a macroblock, by reading such information, it is possible to reproduce macroblock data at a specific location of the HDS signal. Therefore, even at the time of fast-forward playback, it is possible to restore the HD frame and view a relatively good playback image on the monitor for the HD signal.

As described above, in the present embodiment, when recording an SD frame formed by dividing one HD frame into four parts on a magnetic tape, the data of the SD frame and the sequence number in the ID code of the sync block are used. Since the correspondence is established, a relatively good reproduced image can be viewed on the high-definition image monitor (HD signal monitor) even during fast-forward reproduction.

The method of associating the data of the SD frame with the sequence number is not limited to the one described above, but may be as follows. Since the sequence number is limited to 0 to 11 in the DVC standard, 12 to 15 that can be recorded with 4 bits for the sequence number are not used. Therefore, the first SD frame formed by dividing the HD frame into four is described in SEQ. No. = 1
2 for the second SD frame, and SEQ. N
o. = 13, and for the third SD frame, S
EQ. No. = 14, and for the fourth SD frame, SEQ. No. = 15. In this case, at the time of fast forward reproduction, SEQ. No.
= 12 to 15, the information indicating the data of the sync block is data of a part of the HD frame, and information indicating to which frame of the SD frame which is divided into four, the data belongs. Obtainable. Therefore, even when fast-forwarding and reproducing a tape on which an HDS signal and an SD signal are mixedly recorded, only the HDS signal can be viewed relatively well on a high-definition image monitor.

(Sixth Embodiment) In this embodiment, the method of dividing one HD frame in the first embodiment is changed to another method. In the present embodiment, as shown in FIG. 7, each of the Y, Cr, and Cb signals of one HD frame is extracted every other pixel both horizontally and vertically to form image data of a 4SD frame. In FIG. 7, a, b,
c and d indicate pixels. Except for this, it is the same as the first embodiment.

By dividing in this way, the same effect as in the fourth embodiment described above, that is, when searching for recorded contents on the monitor for the SD signal, the contents of the image can be determined by fast-forward reproduction. The effect described above can be obtained. Further, an image at the time of normal reproduction can be viewed on the monitor for the SD signal without much discomfort. this is,
Each SD frame is composed of pixels thinned out,
This is because the area of the entire screen is included within the range of the number of pixels of the SD frame. Also, since pixels are simply thinned out, aliasing distortion may occur due to sampling.
Does not cause major visual impairment.

As described above, in the present embodiment, the image data of the 4SD frame is formed by taking out every other pixel in both the horizontal and vertical directions of the HD frame. The recorded content can be searched by normal reproduction or fast forward reproduction on an SD signal monitor.

(Seventh Embodiment) This embodiment is different from the first to sixth embodiments in that the HD frame is divided into SD frames.
This is a modification of the method of forming a frame and the method of recording on a magnetic tape. In this embodiment, 1
Each of the SD frames formed by dividing the HD frame into four
Record over track frame. Therefore, four identical SD frames are successively input from the image signal switching processing unit 1 to the VTR unit 2. At this time, the former 2SD frame is the same as the above-described embodiment, and the latter 2SD frame is , A process of exchanging the upper 48 pixels and the lower 48 pixels for every 96 pixels in the vertical direction of the SD frame. The 48 pixels are the number of pixels in the vertical direction of the super block shown in FIG. 9, and the above-described replacement processing corresponds to a process of alternating super blocks vertically adjacent to each other.

As described above, according to the DVC standard, one horizontal row of a super block is recorded on one track.
Data recorded on each track alternates between adjacent tracks. Since the adjacent tracks are recorded and reproduced by the magnetic heads having different azimuths, the following effects can be obtained.

If one of the magnetic heads is clogged during recording or reproduction and the error rate of reproduced data increases, almost all data in one row of the super block may be lost. In such a case, since the alternation process is not performed on the first two track frames of the four track frames, the relationship between the super block and the magnetic head is the same, and the same super block can be recorded or reproduced in the two track frames. Disappears. On the other hand, in the latter two-track frame subjected to the alternation processing, the relationship between the super block and the magnetic head is different from the former two-track frame. Recording / reproduction is possible.

As described above, in the present embodiment, the pixel data of the same super block is recorded by the different azimuth magnetic heads in the first two track frames and the second two track frames of the four track frames corresponding to one SD frame. Therefore, even when one of the magnetic heads is clogged, a good reproduced HDS signal can be obtained.

(Eighth Embodiment) The present embodiment differs from the first to seventh embodiments in that the number of track frames for recording one SD frame obtained by dividing one HD frame is variable. In the first embodiment, 1HD
The image data of one SD frame constituted by dividing the frame into four is recorded over three track frames. However, when a plurality of HD frames are continuously recorded at short time intervals, if one HD frame is recorded over 12 track frames, there is a possibility that a problem that it takes too much time may occur. Therefore, the number of track frames for recording one SD frame is changed according to the recording time interval. That is, when recording is performed continuously at a short time interval (a time interval shorter than the first predetermined time interval T1), one SD frame is recorded only in one track frame, and a relatively long time interval (the first predetermined time interval T1) is used. A second predetermined time interval T2 (> T1) longer than the interval T1
When recording continuously at shorter time intervals), 1S
In the case where the D frame is recorded over two track frames and is continuously recorded at a longer time interval (a time interval longer than the second predetermined time interval T2), one SD frame is recorded over three track frames. .

As described above, by making the number of track frames for recording one SD frame variable, a plurality of HD frames can be continuously recorded at short time intervals.
It is possible to continuously shoot still images at short time intervals. It is not always necessary to record one SD frame continuously over two or three track frames, and the process of sequentially recording four SD frames, which are obtained by dividing one HD frame into four, one by one track frame is repeated two or three times. You may do so. In that case, concealment is performed using the second HD frame memory 16.

[0087]

As described above in detail, according to the first aspect of the present invention, in a digital image signal recording apparatus for recording an image signal having a first definition, a second image signal having a second definition higher than the first definition is provided. Since the still image signal of the definition is divided into n (integer of 2 or more) and converted into the image signal of the first definition and subjected to predetermined processing and recorded on the recording medium,
An image signal recording device capable of recording an image signal of the first definition and a still image signal of the second definition can be realized at low cost.

According to the second aspect of the present invention, since the image signal is converted in units of a predetermined pixel block for performing the orthogonal transform for compressing the image information, the image can be efficiently compressed by the orthogonal transform. it can. According to the third aspect of the present invention, since the luminance signal and the chrominance signal corresponding to the luminance signal are divided and converted in units of macroblocks composed of a plurality of predetermined pixel blocks and recorded on the recording medium, Good concealment can be performed during reproduction.

According to the fourth aspect of the present invention, the divided conversion signal has a blank area that does not include the pixels of the still image signal of the second definition, and the blank area has at least a predetermined pixel block range. Since dummy data having the same value is inserted, the data amount in the margin area is minimized,
It is possible to increase the amount of recording data in other areas, and it is possible to improve reproduction image quality.

According to the fifth aspect of the present invention, since the divided conversion signal of one frame formed by dividing into n is output two or more predetermined times, the same data is stored in a plurality of areas on the recording medium. It is recorded over the entire area, and good concealment can be performed during reproduction. According to the sixth aspect of the present invention, the divided converted signal of one frame formed by dividing into n is output once or twice or more times in accordance with the input time interval of the still image signal of the second definition. Therefore, continuous recording of still images at short time intervals is also possible.

According to the seventh aspect of the present invention, when the divided conversion signal is recorded on the recording medium, the auxiliary information indicating the order of the n-divided signal is added. Data can be read even at times, and image data can be searched for by fast forward. According to the eighth aspect of the present invention, the thinned-out converted signal formed by converting the still image signal of the second definition into the image signal of the first definition by thinning out the pixels is recorded together with the divided converted signal. Since the image is recorded on the medium, the recorded content can be easily confirmed on the monitor for the image signal of the first definition.

According to the tenth aspect of the present invention, by dividing the still image signal of the second definition into n types in units of macroblocks, n divisions are performed, so that the image signal of the first definition When searching the recorded content on a monitor for
The contents of the image can be confirmed by fast-forward playback. In addition, since macroblocks are used as units, the efficiency of image information compression is high.

According to the eleventh aspect of the present invention, the still image signal of the second definition is divided into n parts by thinning out the n pixels in units of pixels, so that the image signal of the first definition is obtained. When searching recorded contents on a monitor for video, the contents of an image can be confirmed by fast-forward playback. Claim 12
According to the invention described in (1), the number of pixels of the two color difference signals of the still image signal with the second definition is 1 / first predetermined number s in the horizontal direction with respect to the number of pixels of the luminance signal, and The number of pixels of the two color difference signals of the image signal of the first definition is the second predetermined number t in the horizontal direction with respect to the number of pixels of the luminance signal. In the case where the number of predetermined pixel blocks in the vertical direction is 1 / first predetermined number s, a block set consisting of s horizontal pixel pixels and t vertical pixel blocks of a luminance signal of a still image signal of the second definition is horizontal. Since it is converted into a block set consisting of t predetermined pixel blocks in the direction t and s in the vertical direction,
Even if the configuration of the macroblock of the second definition still image signal is different from the configuration of the macroblock of the first definition image signal, recording can be performed.

According to the thirteenth aspect of the present invention, when the divided conversion signal of one frame formed by dividing into n is output two or more predetermined times m, i (<
m) times, the pixel arrangement in the frame is changed and output. For example, when recording is performed on a recording medium by alternately using two magnetic heads having different azimuths, a defect occurs in one of the magnetic heads. Even if there is, it is possible to record without losing the original information.

According to the fourteenth aspect of the present invention, when a divided conversion signal is recorded on a recording medium, a sequence number indicating the order of a group of data on the recording medium is divided into divided conversion signals. Since the signal is added in correspondence with each frame of the signal, a relatively good reproduced image can be viewed on the image signal monitor of the second definition even during fast forward reproduction.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a digital image signal recording / reproducing apparatus according to an embodiment of the present invention.

FIG. 2 is a diagram for explaining a method of converting a high-definition still image signal into a normal-resolution image signal.

FIG. 3 is a diagram for explaining a method of thinning out pixels of a high-definition still image signal.

FIG. 4 is a diagram for explaining a method of converting image data obtained by the thinning process into data of one frame of an image signal having a normal resolution.

FIG. 5 is a diagram for explaining a method of converting a high-definition still image signal into a normal-resolution image signal.

FIG. 6 is a diagram for explaining a technique for thinning out pixels of a high-definition still image signal.

FIG. 7 is a diagram for explaining a method of thinning out pixels of a high-definition still image signal.

FIG. 8 is a diagram showing a DVC standard macro block.

FIG. 9 is a diagram for explaining a super block of the DVC standard.

FIG. 10 is a diagram showing a data structure after formatting according to the DVC standard.

FIG. 11 is a diagram showing a sync block according to the DVC standard.

FIG. 12 is a diagram showing a data structure on a magnetic tape conforming to the DVC standard.

[Description of Signs] 1 Image signal switching processing unit 2 Image signal recording / reproducing unit 15, 16 HD frame memory 17 Dummy data insertion circuit 18 Address control circuit 21 Blocking circuit 22 DCT operation circuit 23 Quantization circuit 24 Variable length encoding circuit 25 auxiliary information writing circuit 26 error correction coding circuit 27 sync block synthesis recording modulation circuit

Claims (17)

[Claims] 1. A digital image signal recording apparatus for recording an image signal having a first definition, wherein a still image signal having a second definition higher than the first definition is divided into n (an integer of 2 or more). The image processing apparatus further comprises: a division conversion unit that converts the image signal into the first definition image signal and outputs the divided image as a division conversion signal; and a recording unit that performs predetermined processing on the division conversion signal and records the processed signal on a recording medium. Digital image signal recording device. 2. The image processing apparatus according to claim 1, wherein the recording unit includes an image information compression unit that compresses image information by performing an orthogonal transformation for each predetermined pixel block, and the division conversion unit performs conversion in units of the predetermined pixel block. 2. The digital image signal recording device according to claim 1, wherein: 3. The image signal of the first definition and the still image signal of the second definition comprise a luminance signal and two color difference signals, and the recording means corresponds to the luminance signal and the luminance signal. 3. The method according to claim 2, wherein the recording is performed on the recording medium in units of macroblocks composed of a plurality of the predetermined pixel blocks of the color difference signals to be converted, and the division conversion unit performs conversion in units of the macroblocks.
2. A digital image signal recording device according to claim 1. 4. The division conversion means converts the division conversion signal so that the division conversion signal has a blank area that does not include a pixel of the still image signal of the second definition. 4. The digital image signal recording apparatus according to claim 2, further comprising dummy data insertion means for inserting dummy data having the same value in a range. 5. The digital conversion device according to claim 1, wherein the division conversion unit outputs the divided conversion signal of one frame formed by dividing the image by n at least two times. Image signal recording device. 6. The dividing and converting means converts the n-divided one-frame divided converted signal into one or two or more frames in accordance with an input time interval of the second definition still image signal. 5. The digital image signal recording device according to claim 1, wherein the digital image signal recording device outputs the number of times. 7. The recording means has auxiliary information adding means for adding auxiliary information indicating the order of the n-divided signal when the divided converted signal is recorded on the recording medium. 7. The digital image signal recording apparatus according to claim 1, wherein: 8. A thinning conversion unit that converts pixels of the second definition still image signal into a first definition image signal by thinning out the pixels and outputs the thinning conversion signal as a thinning conversion signal. 7. The digital image signal recording apparatus according to claim 1, wherein the thinning-out conversion signal is recorded on the recording medium together with the division conversion signal. 9. The digital image signal recording apparatus according to claim 1, wherein the division conversion unit divides the second definition still image signal into n parts in a screen area. . 10. The apparatus according to claim 3, wherein the division conversion unit performs the n division by thinning out the still image signal of the second definition into n types in units of the macroblock. Digital image signal recording device. 11. The division unit according to claim 1, wherein the division conversion unit performs the n division by thinning out the still image signal of the second definition into n units in pixel units. A digital image signal recording device according to any one of the above. 12. The second image signal of the second definition.
The number of pixels of one color difference signal is 1 / first predetermined number s in the horizontal direction and 1 / second second predetermined number t in the vertical direction with respect to the number of pixels of the luminance signal. The number of pixels of the two color difference signals of the image signal is 1 / (second second predetermined number) t in the horizontal direction and 1 / (first predetermined number s) in the vertical direction with respect to the number of pixels of the luminance signal. Means for converting a set of s horizontal and t vertical pixel blocks of the luminance signal of the second definition still image signal into a horizontal t
4. The digital image signal recording apparatus according to claim 3, further comprising a block group conversion means for converting the image data into a block group including s predetermined pixel blocks in the vertical direction. 13. The dividing and converting means, when outputting the divided and converted signal of one frame formed by dividing into n by a predetermined number m of two or more, i (<<
6. The digital image signal recording apparatus according to claim 5, wherein in the m) times, the pixel arrangement in the frame is changed and output. 14. The recording means has sequence number adding means for adding a sequence number indicating an order of a group of data on the recording medium when the division conversion signal is recorded on the recording medium, 14. The digital image signal according to claim 1, wherein the sequence number adding means adds the sequence number in accordance with each frame of the divided converted signal formed by dividing the signal into n. Recording device. 15. A digital image signal recording / reproducing apparatus for recording / reproducing an image signal having a first definition, wherein a still image signal having a second definition higher than the first definition is represented by n (an integer of 2 or more). A dividing unit that converts the image signal into the first definition image signal by dividing and outputs the image signal as a divided converted signal; a recording unit that performs a predetermined recording process on the divided converted signal and records it on a recording medium; Reproducing means for reproducing a signal recorded on a recording medium, performing predetermined reproduction processing, and outputting the reproduced signal; and reproducing and converting the reproduced output signal into the second definition still image signal and outputting the same. A digital image signal recording / reproducing device comprising: 16. A digital image signal reproducing apparatus for reproducing an image signal of a first definition recorded on a recording medium, wherein a still image signal of a second definition higher than the first definition is converted to n (2 A reproduction means for converting the image signal into the first definition image signal by dividing the image signal into the first definition and reproducing a signal recorded on a recording medium on which the converted signal is recorded; 2. A digital image signal reproducing apparatus, comprising: reproduction converting means for converting the image into a still image signal having a definition of 2 and outputting the signal. 17. An image signal processing device connected to a digital image signal recording device for recording an image signal of a first definition, wherein a still image signal of a second definition higher than the first definition is represented by n (Divided into two or more integers) by dividing the image signal into the first definition image signal and outputting the divided signal as a divided conversion signal, and inputting the divided conversion signal to the digital image signal recording device. An image signal processing device characterized by the above-mentioned.