JP3033579B2 - Manufacturing method of thin film transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001] The present invention relates to a method for manufacturing a thin film transistor.

[0001]

2. Description of the Related Art In recent years, research on thin film transistors has been actively conducted. In thin film transistors using a polycrystalline silicon thin film, in order to improve the characteristics,
A method of introducing hydrogen into a polycrystalline silicon thin film serving as a channel region to reduce crystal defects (so-called dangling bonds) existing at crystal grain boundaries or the like, that is, a hydrogenation method is essential. A commonly used hydrogenation method is to use a hydrogenated plasma silicon nitride (plasma SiN: H) film as a passivation film and to diffuse hydrogen from the film into the channel region through an interlayer insulating film by a heat treatment at about 400 ° C. Has become commonplace.

[0002] In the production of thin film transistors, usually,
As shown in FIG. 6, a gate insulating film 3 made of SiO ₂ or the like is formed on a polycrystalline silicon thin film 2 on an insulating substrate 1 due to a demand for higher speed.
A so-called top gate structure in which a gate electrode 4 is formed through the gate electrode is adopted. 2S indicates a source region, 2D indicates a drain region, and 2C indicates a channel region. A hydrogenated plasma silicon nitride film 5 as a passivation film is formed on the thin film transistor, and hydrogen 6 in the film 5 is easily introduced into the channel region 2C and the interface between the channel region 2C and the gate insulating film 3 by heat treatment. Is done.

As a hydrogenation method, there has been proposed an experimentally hydrogenating method in which plasma is excited by analogy with hydrogenated amorphous silicon (a-Si: H). Further, as a hydrogenation method for a thin film transistor having a top gate structure, a method of forming a gate electrode and then introducing hydrogen atoms from above the gate electrode into a silicon thin film by an ion implantation method has been proposed (JP-A-60-16436).
No. 3). Meanwhile, as the gate insulating film of the thin film transistor, the SiO ₂ film by a SiO ₂ film or the CVD (chemical vapor deposition) method using thermal oxidation (hereinafter CVD SiO ₂
Etc.) are used.

[0004]

As described above, in the thin film transistor having the top gate structure, the hydrogenation at the interface between the gate insulating film 3 important for transistor characteristics and the channel region 2C is performed by the normal hydrogenation method shown in FIG. Is easily reached. However, in recent years, a complete CMOS type SRAM (static RAM) employing a memory cell by stacking a p-channel MOS thin film transistor on an n-channel MOS transistor has been proposed. As a thin film transistor to be applied, mainly due to the requirements of manufacturing processes such as flattening,
As shown in FIG. 7, a bottom gate structure (that is, an inverted stagger type) in which a polycrystalline silicon film 2 is formed on a gate electrode 4 with a gate insulating film 3 interposed therebetween is advantageous. Reference numeral 7 denotes a lower semiconductor element region or a base region such as an insulating substrate.

In this case, even if a hydrogenated plasma silicon nitride film 5 as a passivation film is formed and heat-treated, hydrogen 6 from the hydrogenated plasma silicon nitride film 5 is slightly trapped in the polycrystalline silicon thin film 2. Only the reduction of crystal defects) does not reach the interface between the gate insulating film 3 and the channel region 2C, and the effect of hydrogenation cannot be obtained. Note that in a top gate structure, a method of introducing hydrogen atoms by an ion implantation method is actually behind a gate electrode, and thus it is difficult to uniformly introduce hydrogen atoms into a channel region.

On the other hand, with regard to the gate insulating film of the thin film transistor, SiO 2 is formed by thermal oxidation of the surface of the silicon thin film.
_{In the} case where _two films are used, a dense and high quality film can be obtained, so that a gate insulating film with good withstand voltage can be obtained. However, since the furnace oxidation method requires a high-temperature process, it cannot be applied to a so-called three-dimensional LSI such as a stacked SRAM since the source and drain regions of the MOS transistor of the underlying LSI occur.

Further, a long time of about 60 minutes is required even on quartz. This furnace oxidation can be expected to have the effect of densifying (densifying) the polycrystalline silicon thin film simultaneously with the formation of the oxide film, and the densification reduces the trap density in the polycrystalline silicon thin film. Reduction of trap density is to reduce leakage current, improve mobility μ,
The characteristics of the thin film transistor can be improved, for example, by lowering the gate voltage swing.

The effect of reducing the trap density is more effective as the oxidation temperature is higher. However, when the temperature is increased, the above-described problem occurs. Further, when the substrate is a quartz substrate, oxidation at 1000 ° C. or higher in a furnace is difficult due to softening of the quartz. Becomes Further, when a gate insulating film is formed by a CVD SiO ₂ film, it has disadvantages such as many pinholes, sparse film quality, and variation in breakdown voltage.

The present invention has been made in view of the above points, and provides a method of manufacturing a thin film transistor which enables favorable hydrogenation in an inverted stagger type transistor.

[0010]

A method of manufacturing a thin film transistor according to the present invention is a method of manufacturing an inverted staggered thin film transistor, comprising the steps of forming a polycrystalline semiconductor film on a gate electrode of a metal film via a gate insulating film; forming a channel region between the source / drain regions and the source / drain regions in the polycrystalline semiconductor film, the passivation
A step of ion-implanting hydrogen atoms into the channel region and an interface between the channel region and the gate insulating film from the polycrystalline semiconductor film side before forming the film.

In the above-described manufacturing method, the passivation
Before the film formation, the polycrystalline semiconductor film side , and therefore polycrystalline
By introducing hydrogen atoms by ion implantation in a state where the semiconductor film is exposed , the hydrogen atoms can be easily and uniformly introduced into the channel region and the interface between the channel region and the gate insulating film.

In addition, since a gate electrode made of a metal film is formed on a base corresponding to a channel region of the polycrystalline semiconductor film via a gate insulating film, hydrogen atoms are taken into the gate electrode when hydrogen ions are implanted. Hydrogen atoms are surely sufficiently taken into the interface between the channel region and the gate insulating film.

Incidentally, when the gate electrode is formed of a polycrystalline silicon film, there is a crystal defect due to the polycrystalline silicon, and when hydrogen atoms are implanted, hydrogen atoms are taken into the gate electrode through the gate insulating film. There is a possibility that the incorporation of hydrogen atoms at the interface between the channel region and the gate insulating film becomes insufficient.

In the present invention, hydrogenation is performed on the inverted staggered thin film transistor, and crystal defects in the channel region and at the interface with the gate insulating film are reduced, so that the transistor characteristics are improved.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of a method for manufacturing a thin film transistor according to the present invention will be described with reference to the drawings.

First, as shown in FIG. 1A, after a gate electrode 12 is formed on a substrate 11, a polycrystalline silicon thin film 14 is formed on the gate electrode 12 through a gate insulating film of, for example, SiO ₂ or the like. Introduce the source area 1
The inverted staggered thin film transistor 15 is formed by forming the 4S and the drain region 14D. The substrate 11 corresponds to an insulating substrate made of quartz, glass, or the like, or a base region where transistors and the like are formed in the case of, for example, a three-dimensional LSI or a stacked SRAM. The gate electrode 12 can be formed of a polycrystalline silicon film, a metal silicide, a polycide, a metal film, or the like. In this embodiment, the gate electrode 12 is particularly formed of a metal film.

Next, as shown in FIG. 1B, hydrogen 16 is ion-implanted into the polycrystalline silicon thin film 14. By this hydrogen ion implantation, hydrogen atoms are easily and uniformly introduced into the channel region 14C of the polycrystalline silicon thin film 14 and the interface between the channel region 14C and the gate insulating film 13.

In recent thin film transistors, the thickness d of the polycrystalline silicon thin film 14 has been reduced due to the demand for higher performance (ie, lower leakage current, lower threshold voltage V _th , and smaller gate voltage swing). , For example, 100
It is about 0 ° or less. Therefore, hydrogen can be easily introduced into the interface between the channel region 14C and the gate insulating film 13 with low implantation energy. In other words, ion implantation of hydrogen atoms can be performed with an implantation energy sufficient to introduce hydrogen into the interface between the channel region 14C and the gate insulating film 13.

Since the implantation dose can be effectively reduced by the low implantation energy, damage to the polycrystalline silicon thin film 14 is small. (Because hydrogen ions have a small mass number, damage is originally small.)
Since the implantation energy is low, hydrogen atoms can be uniformly introduced only into the thinner polycrystalline semiconductor film region.

After the ion implantation, annealing is performed at about 400 ° C. in an atmosphere of an inert gas such as a forming gas (N ₂ gas containing ₂ to 3% of H).

Thereafter, as shown in FIG.
An optional film 17 is formed. Passivation film 17
As hydrogenated plasma silicon nitride film or other S
iO _TwoA membrane can also be used.

According to the above-described manufacturing method, hydrogen atoms are introduced by ion implantation after the inverse staggered thin film transistor 15 is formed.
Channel region 14C and the interface between the channel region 14C and the gate insulating film 13 can be easily and uniformly introduced. At this time, since ion implantation can be performed with low implantation energy, damage to the polycrystalline silicon thin film 14 is small. When a metal film is used as the gate electrode 12, when hydrogen ions are implanted, part of the hydrogen atoms does not pass through the gate insulating film 13 of, for example, a SiO ₂ film and are taken into the gate electrode 12 of the metal film. Hydrogen atoms can be sufficiently introduced into the interface between the channel region 14C and the gate insulating film 13.

[0023] By the ion implantation of hydrogen and the subsequent annealing, hydrogenation of the inverted staggered thin film transistor, which has been impossible in the past, can be easily performed, and the characteristics of the thin film transistor can be improved.
In addition, since hydrogen atoms are introduced by ion implantation, the passivation film 17 is generally made of hydrogenated plasma silicon nitride (plasma SiN:
H) An insulating film other than the film can be used, and the degree of freedom in the process of forming the passivation film can be improved.

Next, an example of a method of forming a gate insulating film will be described.
This method is applicable to both thin film transistors having a bottom gate structure (inverted stagger type) and a top gate structure.

In the case of a bottom gate structure, for example, after a gate electrode 12 made of a polycrystalline silicon film is formed on a substrate 11 as shown in FIG. For example, 11
The surface of the gate electrode 12 is subjected to an oxidizing treatment at 00 ° C. for 30 seconds to form a thermal oxide film (SiO ₂ film) having a thickness of about 100 °
Forming a gate insulating film 13 ₁ by (Fig B). Thereafter, a polycrystalline silicon thin film 14 is formed so as to surround the gate electrode 12, and source and drain impurities are ion-implanted to form a source region 14S and a drain region 14D (FIG. 3C).

[0026] Thus, when forming the gate insulating film 13 ₁ by thermal oxidation of the short high temperature, the film quality with the obtained dense withstand a good gate insulating film, the thermal effect on the substrate 11 of the underlying Nothing. That is, for example, three-dimensional LS
In an I-type or stacked-type SRAM or the like, the source and drain regions of the MOS transistors formed on the base substrate 11 do not re-diffuse, and a high-performance three-dimensional LSI or stacked-type SRAM can be manufactured.

Note that this three-dimensional LSI, stack type SR
In the case of AM or the like, the MO
It also activates the source and drain regions of the S transistor. For example, when forming a thin film transistor LSI on a quartz or glass substrate,
A high-performance LSI can be manufactured without softening the quartz or glass substrate constituting the above. Further, it is possible to manufacture a thin film transistor of the fine size by forming the gate insulating film 13 ₁ by such high temperature for a short time oxidation. Further, at a high temperature short time oxidation also densifying effect, it can be expected flatness with withstand voltage of the gate insulating film 13 _1.

In the case of a top gate structure, for example, FIG.
As shown in FIG.
22 (FIG. 2A), an oxygen atmosphere is formed simultaneously with the above.
For example, an arc lamp is irradiated in
The polycrystalline silicon thin film 22 is oxidized at 30 ° C. for 30 seconds.
A thermal oxide film (SiO. _Two
Gate insulating film 13 by film)₁(FIG. B).
Next, the gate insulating film 13₁Polysilicon on top
The gate electrode 23 is formed and impurities for the source and the drain are formed.
The source region 22S and the drain are implanted by ion implantation and annealing.
An in-region 22D is formed (FIG. 3C). After that, the normal
Formation of passivation film, contact window opening, Al
Top gate structure through processes such as evaporation and hydrogen annealing
Obtain a thin film transistor.

In this example, the same operation and effect as in the case of the bottom gate structure can be obtained, and in the case of high-temperature and short-time oxidation (step of FIG. 3B), the polycrystalline silicon thin film 2
2 is densified to obtain a thin film transistor having a low trap density.

In FIGS. 2 and 3, high-temperature and short-time oxidation is performed by a lamp beam. However, similar effects can be obtained by performing high-temperature and short-time oxidation by irradiating, for example, an excimer laser pulse instead of the lamp beam. . An excimer laser having a uniform energy density by a beam homogenizer is used. For example, an excimer laser (XeC
l), 80 Hz, energy about 280 mJ / cm ² can be used. After forming the gate insulating film 13 ₁ is irradiated with an excimer laser before the polycrystalline silicon thin film 22 to islanded may islanded. The source region 22S and the drain region 22D are annealed at 600 ° C. or lower or an excimer laser.

FIGS. 4 and 5 show another example of a method of forming a gate insulating film. In the case of a bottom gate structure, as shown in FIG. 4, after a gate electrode 12 made of a polycrystalline silicon film is formed on a substrate 11 (A in FIG. 4), a CVD SiO ₂ film having a thickness of, for example, about 200 ° is formed on the gate electrode 12. 25 is formed (FIG. 2B). Then, irradiating the example 1100 ° C. The lamp light for example an arc lamp light in an oxygen atmosphere, forming a SiO ₂ film 26 by thermal oxidation in the interface between the CVD SiO ₂ film 25 is subjected to oxidation treatment of 5 seconds and the gate electrode 12 And
CVD SiO ₂ film 25 and the gate insulating film 13 ₂ of a thermally oxidized SiO ₂ film 26 (FIG. C). After a while
Polycrystalline silicon thin film 14 is formed so as to surround gate electrode 12.
Is formed, and the source and drain impurities are ion-implanted to form the source region 14S and the drain region 14D (FIG. D).

[0032] According to such a gate insulating film 13 _2, C
By VDSiO ₂ film 25 with the flatness of the gate insulating film 13 ₂ is obtained, CVD SiO ₂ film 25 by heat treatment at the time of forming a thermal oxide SiO ₂ film 26 is densified, thus overall quality of the gate insulating film becomes dense Thus, a gate insulating film having a good withstand voltage can be obtained. Incidentally, when the gate insulating film is formed by the conventional thermal oxidation method, the flatness of the gate insulating film is deteriorated because the gate insulating film is oxidized along the crystal grain boundaries of the polycrystalline silicon. Get better. Further, in this example, similarly to the above example, it is possible to manufacture a thin film transistor having a small size, and there is no thermal influence on the underlying substrate 11.

In the case of a top gate structure, as shown in FIG.
Thus, an island-shaped polycrystalline silicon thin film 22 is formed on the substrate 11.
After the formation (FIG. 4A), the polycrystalline silicon thin film is formed as in FIG.
CVD CVD with a thickness of about 200 °_TwoFilm 25
(FIG. 2B). Next, for example, in an oxygen atmosphere
Irradiate with clamp light and oxidize for example at 1100 ° C for 5 seconds
Treated with CVD SiO_TwoFilm 25 and polycrystalline silicon thin
SiO by thermal oxidation on the interface with the film 22_TwoForm film 26
And CVDSiO_TwoFilm 25 and thermally oxidized SiO_TwoFrom membrane 26
Gate insulating film 13_TwoIs formed (FIG. C). next,
Gate insulating film 13 _TwoGate electrode made of polycrystalline silicon
Form poles 23 and ionize impurities for source and drain
The source region 22S and the drain region are implanted and annealed.
An area 22D is formed (FIG. 2D). After that, normal passive
Formation of contact film, contact window opening, Al deposition, hydrogen
Through a process such as annealing, a thin film transistor with a top gate structure
Obtain a jista.

[0034] Also in this example, it is possible to form the Figure 4 and similarly flat and good voltage gate insulating film 13 _2,
There is no thermal effect on the base substrate 11. In yet a top-gate structure is advantageous because the thermal oxide SiO ₂ film 26 of good quality is present at the interface between the most important gate insulating film 13 ₂ and the channel region 22C. FIG.
Since the underlying polycrystalline silicon thin film 22 is densified during the high-temperature short-time oxidation of C, the trap density is reduced, and a higher-performance thin film transistor can be manufactured.

In the high-temperature short-time oxidation shown in FIGS. 4 and 5, laser irradiation can be used instead of lamp beam irradiation.

As described above, when a gate insulating film of a thin film transistor is formed by high-temperature and short-time oxidation, a gate insulating film having a good withstand voltage can be obtained, and the gate insulating film has a high thermal conductivity. Has no effect. In addition, when the gate insulating film is formed by oxidizing at a high temperature for a short time after the formation of the CVD oxide film, a gate insulating film having good flatness and good withstand voltage can be obtained, and thermal influence on the underlying region can be obtained. I will not give.
Therefore, the present invention can be suitably applied particularly to the manufacture of a thin film transistor applied to a three-dimensional LSI, a stack type, an SRAM, or an LSI on an insulating substrate.

[0037]

According to the present invention, in the manufacture of an inverted staggered thin film transistor, hydrogen atoms are implanted into the channel region from the polycrystalline semiconductor film side before the passivation film is formed. And hydrogen are easily and uniformly introduced into the interface between the gate insulating film and the channel region. Furthermore, since a gate electrode made of a metal film is used as the gate electrode, hydrogen atoms are not taken into the gate electrode through the gate insulating film when hydrogen atoms are implanted, and sufficient hydrogen atoms are present at the interface between the channel region and the gate insulating film. Can be injected. Therefore, an inverted staggered thin film transistor having good characteristics can be manufactured. The present invention provides a three-dimensional LSI, stack type S
The present invention is suitable for manufacturing a thin film transistor applied to a RAM, an LSI on an insulating substrate, or the like.

[Brief description of the drawings]

1A to 1C are manufacturing process diagrams showing one embodiment of a method for manufacturing a thin film transistor according to the present invention.

FIG. 2 is a manufacturing process diagram of a thin film transistor in which an example of an A to C gate insulating film is applied to a bottom gate structure.

3A to 3C are manufacturing process diagrams of a thin film transistor in which an example of an A to C gate insulating film is applied to a top gate structure.

4A to 4D are manufacturing process diagrams of a thin film transistor in which another example of the gate insulating film is applied to a bottom gate structure.

FIG. 5 is a manufacturing process diagram of a thin film transistor in which another example of the AD gate insulating film is applied to a top gate structure.

FIG. 6 is a cross-sectional view illustrating an example of a conventional hydrogenation method for a top-gate thin film transistor.

FIG. 7 is a cross-sectional view showing an example of a conventional hydrogenation method for a bottom-gate thin film transistor.

[Explanation of symbols]

11 ° substrate, 12 ° gate electrode, 13, 13 ₁ , 1
32 ₂ gate insulating film, 14 ‥‥ polycrystalline CVD film, 16
‥‥ hydrogen, 25 ‥‥ CVD SiO ₂ film, 26 ‥‥ thermal oxide SiO ₂ film

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 29/786 H01L 21/265 H01L 21/336

Claims (1)

(57) [Claims] 1. A method of manufacturing an inverted staggered thin film transistor, comprising the steps of: forming a polycrystalline semiconductor film on a gate electrode made of a metal film via a gate insulating film; Forming a channel region between source / drain regions; and ion-implanting hydrogen atoms from the polycrystalline semiconductor film side into the channel region and an interface between the channel region and the gate insulating film before forming a passivation film. A method for producing a thin film transistor, comprising: