JP3010800B2 - Liquid crystal display device and liquid crystal display panel - Google Patents
Liquid crystal display device and liquid crystal display panelInfo
- Publication number
- JP3010800B2 JP3010800B2 JP3174973A JP17497391A JP3010800B2 JP 3010800 B2 JP3010800 B2 JP 3010800B2 JP 3174973 A JP3174973 A JP 3174973A JP 17497391 A JP17497391 A JP 17497391A JP 3010800 B2 JP3010800 B2 JP 3010800B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- liquid crystal
- external connection
- wirings
- crystal display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Liquid Crystal (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は液晶表示装置に関し、特
にパネル上でマトリックスアレイ配線と外部接続端子と
を結ぶ引出し配線を有する液晶表示装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device having a lead-out wiring connecting a matrix array wiring and an external connection terminal on a panel.
【０００２】[0002]
【従来の技術】従来の液晶表示装置のパネル１０は図４
に示すように、液晶駆動用マトリックスアレイ配線１
と、液晶駆動電圧印加用外部回路との接続端子６とを結
ぶ引出し配線１３のうち、隣り合う引出し配線同士は同
一平面内に形成されていた。この時、引出し配線１３と
マトリックスアレイの上層配線１との結合部分同士の間
隔よりも外部接続端子同士の間隔のほうが広い場合、Ｂ
−Ｂ′線上（図４）に存在する隣り合う引出し配線の最
小間隔は狭くなり、配線の短絡が生じ易くなっていた。2. Description of the Related Art A panel 10 of a conventional liquid crystal display device is shown in FIG.
As shown in FIG.
And adjacent ones of the lead-out lines 13 connecting the connection terminal 6 to the liquid crystal drive voltage application external circuit were formed in the same plane. At this time, if the distance between the external connection terminals is wider than the distance between the coupling portions between the lead wiring 13 and the upper wiring 1 of the matrix array, B
The minimum distance between the adjacent lead-out wirings existing on the -B 'line (FIG. 4) was narrowed, and the wiring was likely to be short-circuited.
【０００３】図５は、従来の液晶表示装置のマトリック
スアレイ配線部全体を模式的に表現した上面図である。
図４は、図５における領域Ｃを拡大したものである。外
部接続端子部１６は、図４における外部接続端子１６の
束であり、引出し配線部２８は図３における外部接続端
子１３の束である。図５を見るとわかるように、左右両
端のマトリックスアレイ配線の引出し配線部分２８で隣
り合う外部接続端子１６間の間隔が最も狭くなってい
た。具体的には、引出し配線１３とマトリックスアレイ
の上層配線１１との結合部分同士の間隔が約２０８μｍ
で、外部接続用端子同士の間隔が約２２０μｍで、マト
リックスアレイ配線端部から外部接続端子部までの距離
が約４ｍｍの場合、これらの配線及び外部接続端子の数
が１０００本近くになると左右両端のマトリックスアレ
イ配線の引出し配線部分において最小の引出し配線間隔
は３０μｍ以下になっていた。FIG. 5 is a top view schematically showing the entire matrix array wiring portion of a conventional liquid crystal display device.
FIG. 4 is an enlarged view of a region C in FIG. The external connection terminal section 16 is a bundle of the external connection terminals 16 in FIG. 4, and the lead-out wiring section 28 is a bundle of the external connection terminals 13 in FIG. As can be seen from FIG. 5, the space between the adjacent external connection terminals 16 in the lead-out wiring portions 28 of the matrix array wiring at the left and right ends was the narrowest. Specifically, the distance between the coupling portions between the lead wiring 13 and the upper wiring 11 of the matrix array is about 208 μm.
In the case where the distance between the external connection terminals is about 220 μm and the distance from the end of the matrix array wiring to the external connection terminal is about 4 mm, when the number of these wirings and external connection terminals becomes close to 1000, the left and right ends In the lead wiring portion of the matrix array wiring, the minimum lead wiring interval was 30 μm or less.
【０００４】また、図６は、全ての階段形状の引出し配
線を同一平面内で形成した従来技術の平面図である。隣
り合う引出し配線３が重なることなく、マトリックスア
レイ配線部と外部接続端子部との距離３０を短くするた
めの構造ではあるが、引出し配線３間の間隔は全体とし
て狭くなることは避けられなかった。FIG. 6 is a plan view of the prior art in which all the step-shaped lead wires are formed in the same plane. Although this is a structure for shortening the distance 30 between the matrix array wiring portion and the external connection terminal portion without the adjacent lead wires 3 overlapping, it is inevitable that the interval between the lead wires 3 becomes narrow as a whole. .
【０００５】[0005]
【発明が解決しようとする課題】この従来の隣り合う引
出し配線同士が同一平面内に形成されている構造では、
引出し配線とマトリックスアレイ配線との結合部分同士
の間隔や、外部接続端子同士の間隔に比べて、引出し配
線同士の間隔が部分的に極端に（１桁程度）小さくなっ
てしまうので、製造工程途中において引出し配線の形成
加工時に配線の形状異常（局所的な配線幅太り）が発生
すると、この部分で引出し配線同士が電気的に短絡する
不良が生じ易いという問題があった。In this conventional structure in which adjacent lead wires are formed in the same plane,
Since the space between the lead wirings is partially (approximately one digit) extremely smaller than the space between the coupling parts between the lead wiring and the matrix array wiring and the space between the external connection terminals, during the manufacturing process. In this case, if a wiring shape abnormality (local wiring width increase) occurs at the time of forming the lead wiring, there is a problem that a drawback that the lead wirings are electrically short-circuited easily occurs at this portion.
【０００６】また、従来の階段形状の引出し配線によれ
ば、引出し配線間の間隔が一様に狭くなるか、さもなけ
れば、隣り合う引出し配線同士が短絡する危険性が低く
なるだけの間隔をとると、マトリックスアレイ配線部と
外部接続端子部との距離が長くなってしまい、液晶表示
装置のパネルの面積の増大化を招くという問題点があっ
た。Further, according to the conventional step-shaped lead-out wiring, the distance between the lead-out wirings is uniformly narrowed, or otherwise, the distance is short enough to reduce the risk of short-circuiting between adjacent lead-out wirings. In this case, the distance between the matrix array wiring portion and the external connection terminal portion becomes long, which causes a problem that the area of the panel of the liquid crystal display device is increased.
【０００７】[0007]
【課題を解決するための手段】本発明によれば、液晶駆
動用マトリックスアレイ配線と外部接続端子とを基板上
に有し、この外部接続端子と液晶駆動用マトリックスア
レイ配線とを結ぶ引出し配線を同じ基板上に有し、引出
し配線が層間絶縁膜の上層に存在する複数の上層配線と
層間絶縁膜の下層に存在する複数の下層配線とを含んで
形成されている液晶表示パネル又は液晶表示装置が得ら
れる。According to the present invention, a liquid crystal driving matrix array wiring and an external connection terminal are provided on a substrate, and a lead wiring connecting the external connection terminal and the liquid crystal driving matrix array wiring is provided. A liquid crystal display panel or a liquid crystal display device which is formed on the same substrate and includes a plurality of upper wirings in which a lead wiring exists above an interlayer insulating film and a plurality of lower wirings which exist in a lower layer of the interlayer insulating film Is obtained.
【０００８】液晶駆動用マトリックスアレイ配線は、窒
化膜，酸化膜等の層間絶縁膜を介して上層と下層とに存
在し、行及び列の配線及びピクセルを選択駆動するため
の薄膜トランジスタを形成している。また、外部接続端
子は、層間絶縁膜の下層から層間絶縁膜の外側に延びて
存在する場合、層間絶縁膜の上層に存在する場合、層間
絶縁膜の外側に存在する場合及び層間絶縁膜の上層と下
層に存在し、それらが導通している場合等がある。この
時、引出し配線を適宜上層と下層に分離すれば引出し配
線間隔を広くとることが可能である。上層と下層とに交
互に配置させるのが好ましいが、引出し配線間隔が他の
部分よりも特に狭くなる部分だけ交互に配置させてもよ
い。The matrix array wiring for driving the liquid crystal exists in the upper layer and the lower layer via an interlayer insulating film such as a nitride film and an oxide film, and forms a thin film transistor for selectively driving the wiring of the row and the column and the pixel. I have. Further, the external connection terminal extends from the lower layer of the interlayer insulating film to the outside of the interlayer insulating film, exists above the interlayer insulating film, exists outside the interlayer insulating film, and exists above the interlayer insulating film. In the lower layer and they are conductive. At this time, if the lead wiring is appropriately separated into an upper layer and a lower layer, the lead wiring interval can be widened. Although it is preferable to alternately arrange the wirings in the upper layer and the lower layer, the wiring may be alternately arranged only in a portion where the lead wiring interval is particularly narrower than other portions.
【０００９】更に本発明によれば、複数の外部接続端子
が平行して少なくとも１列に配置され、各外部接続端子
が引出し配線のうちの上層配線の１つ又は下層配線の１
つと接続されており、上層配線の１つと接続されている
外部接続端子と下層配線の１つと接続されている外部接
続端子とが交互に配置されている前述の液晶表示パネル
又は液晶表示装置が得られる。Further, according to the present invention, a plurality of external connection terminals are arranged in at least one row in parallel, and each external connection terminal is connected to one of the upper wirings or one of the lower wirings of the lead wirings.
The liquid crystal display panel or the liquid crystal display device described above, wherein the external connection terminals connected to one of the upper layer wirings and the external connection terminals connected to one of the lower layer wirings are alternately arranged. Can be
【００１０】[0010]
【実施例】次に本発明について図面を参照して説明す
る。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.
【００１１】図１は本発明の第１の実施例を表す平面図
である。FIG. 1 is a plan view showing a first embodiment of the present invention.
【００１２】マトリックスアレイの上層配線１と外部接
続端子６を上層引出し配線３で接続する構造と、マトリ
ックスアレイの上層配線１の端部の下地絶縁膜並びに外
部接続端子６の端部の下地絶縁膜にそれぞれ導通孔５を
設けて下層引出し配線４と結線する構造とが交互になる
ように配置している。A structure in which the upper wiring 1 of the matrix array and the external connection terminals 6 are connected by the upper lead wiring 3, a base insulating film at the end of the upper wiring 1 of the matrix array, and a base insulating film at the end of the external connection terminal 6. Are provided so as to be alternately provided with conductive holes 5 and a structure connected to the lower layer lead-out wiring 4.
【００１３】図２は外部接続端子，引出し配線及びマト
リックス配線部の各変更例を示す断面図である。図２Ａ
とＢは外部接続端子６が層間絶縁膜７の上層と下層の両
方に存在し、導通孔５を通じて接続されている場合の例
であり、図２ＣとＤは、外部接続端子６が層間絶縁膜７
の上層にのみ存在する場合の例である。また、図２Ａと
Ｃは下層引出し配線３の場合の例であり、図２ＢとＤは
上層引出し配線４の場合の例を表している。すなわち、
図１は図２のＡ又はＣとＢ又はＤが交互になるように配
置している。FIG. 2 is a sectional view showing a modified example of the external connection terminal, the lead wiring, and the matrix wiring part. FIG. 2A
2B and 2B show an example in which the external connection terminal 6 is present in both the upper layer and the lower layer of the interlayer insulating film 7 and are connected through the conduction hole 5. FIGS. 7
This is an example of a case in which it exists only in the upper layer. 2A and 2C show an example in the case of the lower-layer lead-out wiring 3, and FIGS. 2B and 2D show an example in the case of the upper-layer lead-out wiring 4. That is,
1 is arranged so that A or C and B or D in FIG. 2 are alternately arranged.
【００１４】この配置方法にすると引出し配線部におけ
る同一面内の最小配線間隔はＡ−Ａ′線上にあり、その
距離は隣り合う引出し配線３，４が同一平面内に存在す
る従来の配置に比べて約２倍になる。According to this arrangement method, the minimum wiring interval in the same plane in the extraction wiring section is on the line AA ', and the distance is smaller than that in the conventional arrangement in which the adjacent extraction wirings 3 and 4 exist in the same plane. About twice as much.
【００１５】従って製造工程中で引出し配線３，４の形
状異常（局所的な配線幅太り）が発生しても隣の配線
３，４と電気的に短絡してしまう可能性は激減する。Therefore, even if a shape abnormality (local wiring width increase) of the lead wirings 3 and 4 occurs during the manufacturing process, the possibility of an electrical short circuit with the adjacent wirings 3 and 4 is greatly reduced.
【００１６】図３は本発明の第２の実施例を表す平面図
である。隣り合う引出し配線が上層配線３と下層配線４
に分離されているのみならず、上層引出し配線３も下層
引出し配線４も各平面内においてそれぞれ階段形状とな
っており、さらに上層引出し配線３と下層引出し配線４
の一部分は層間絶縁膜を介して重なりあっている。FIG. 3 is a plan view showing a second embodiment of the present invention. Adjacent lead wirings are upper wiring 3 and lower wiring 4
Not only is the upper wiring 3 and the lower wiring 4 formed in a step shape in each plane, but also the upper wiring 3 and the lower wiring 4
Are overlapped via an interlayer insulating film.
【００１７】同一面内における引出し配線３，４の配線
間隔が本実施例（図３）と従来技術（図６）とで同一で
あった場合、マトリックスアレイ配線部と外部接続端子
６との距離は、本実施例のほうが従来技術よりも短く
（約半分）できる。If the wiring intervals of the lead wirings 3 and 4 in the same plane are the same in the present embodiment (FIG. 3) and the prior art (FIG. 6), the distance between the matrix array wiring portion and the external connection terminal 6 is determined. Can be made shorter (about half) in this embodiment than in the prior art.
【００１８】[0018]
【発明の効果】以上説明したように、本発明はマトリッ
クスアレイ配線部と外部接続端子とを結ぶ引出し配線を
層間絶縁膜を介して交互に上層配線と下層配線に振り分
けているので、マトリックスアレイ配線部と外部接続端
子との距離が従来技術と同等であれば、引出し配線部の
配線間隔が約２倍になり、引出し配線に形状異常（局所
的な配線幅太り）が生じても配線間短絡になる可能性を
低減できるという効果がある。As described above, according to the present invention, the lead wiring connecting the matrix array wiring portion and the external connection terminal is alternately distributed to the upper wiring and the lower wiring via the interlayer insulating film. If the distance between the wiring portion and the external connection terminal is equal to that of the conventional technology, the wiring interval of the lead wiring portion is approximately doubled, and even if an abnormal shape (local wiring thickening) occurs in the lead wiring, the wiring is short-circuited. Thus, there is an effect that the possibility of occurrence can be reduced.
【００１９】また、同一平面内で隣り合う引出し配線同
士の最小間隔を本発明と従来技術とで同じにした場合、
本発明はマトリックスアレイ配線部と外部接続端子との
距離を従来技術に比べて半減させることができるという
効果がある。In the case where the minimum distance between the adjacent lead wirings in the same plane is the same between the present invention and the prior art,
The present invention has an effect that the distance between the matrix array wiring portion and the external connection terminal can be reduced by half as compared with the related art.
【図１】本発明の第１の実施例を表す平面図である。FIG. 1 is a plan view illustrating a first embodiment of the present invention.
【図２】本発明の第１の実施例の各変更例を表す断面図
であり、図２Ａ及びＣは引出し配線が下層配線の場合、
図Ｂ及びＤは引出し配線が上層配線の場合の断面図であ
る。FIGS. 2A and 2C are cross-sectional views illustrating respective modifications of the first embodiment of the present invention. FIGS.
FIGS. B and D are cross-sectional views when the lead wiring is an upper wiring.
【図３】本発明の第２の実施例を表す平面図である。FIG. 3 is a plan view illustrating a second embodiment of the present invention.
【図４】従来の液晶表示装置の配線部の一部を表す平面
図である。FIG. 4 is a plan view illustrating a part of a wiring portion of a conventional liquid crystal display device.
【図５】従来の液晶表示装置の配線部全体を表す平面図
である。FIG. 5 is a plan view illustrating an entire wiring section of a conventional liquid crystal display device.
【図６】従来の液晶表示装置の配線部の一部を表す平面
図である。FIG. 6 is a plan view illustrating a part of a wiring portion of a conventional liquid crystal display device.
１ マトリックスアレイの上層配線 ２ マトリックスアレイの下層配線 ３ 上層引出し配線 ４ 下層引出し配線 ５ 導通孔 ６ 外部接続端子 ７ 層間絶縁膜 ８ ガラス基板 １０ パネル １３ 引出し配線 １６ 接続端子部 １７ 引出し配線部 １８ 配線間隔が最も狭い引出し配線部 １９ マトリックスアレイ配線部 Ｄ マトリックスアレイの上層配線部と接続端子部と
の距離DESCRIPTION OF SYMBOLS 1 Upper wiring of matrix array 2 Lower wiring of matrix array 3 Upper wiring 4 Lower wiring 5 Conducting hole 6 External connection terminal 7 Interlayer insulating film 8 Glass substrate 10 Panel 13 Lead wiring 16 Connection terminal part 17 Lead wiring part 18 Wiring interval Drawer wiring part with the smallest width 19 Matrix array wiring part D Distance between upper layer wiring part of matrix array and connection terminal part
Claims (4)
た液晶駆動用マトリックスアレイ配線と外部接続端子と
を基板上に有し、該外部接続端子と前記液晶駆動用マト
リックスアレイ配線とを結ぶ引出し配線を前記基板上に
有する液晶表示装置において、前記引出し配線が層間絶
縁膜の上層に存在する複数の上層配線と前記層間絶縁膜
の下層に存在する複数の下層配線と含んでおり、前記上
層の液晶駆動用マトリックスアレイ配線と前記上層の引
き出し配線とが同一平面上に形成され、前記下層の液晶
駆動用マトリックスアレイ配線と前記下層の引き出し配
線とが同一平面上に形成されていることを特徴とする液
晶表示装置。An interlayer insulating film is formed in an upper layer or a lower layer.
A liquid crystal display device having a liquid crystal drive matrix array wiring and an external connection terminal on a substrate, and a lead wiring connecting the external connection terminal and the liquid crystal drive matrix array wiring on the substrate. there includes a plurality of lower wiring that exists in the lower layer of the plurality of upper wiring and the interlayer insulating film present in the upper layer of the interlayer insulating film, the upper
Matrix drive lines for driving the liquid crystal layer and the upper layer
And the underlying wiring is formed on the same plane,
Driving matrix array wiring and lead-out arrangement of the lower layer
A liquid crystal display device, wherein the lines are formed on the same plane .
くとも１列に配置され、各外部接続端子が前記上層配線
の１つ又は前記下層配線の１つと接続されており、前記
上層配線の１つと接続されている外部接続端子と前記下
層配線の１つと接続されている外部接続端子とが交互に
配置されていることを特徴とする請求項１記載の液晶表
示装置。2. The semiconductor device according to claim 1, wherein the plurality of external connection terminals are arranged in at least one row in parallel, and each external connection terminal is connected to one of the upper layer wirings or one of the lower layer wirings. 2. The liquid crystal display device according to claim 1, wherein external connection terminals connected to one of the first and second external wiring terminals are alternately arranged.
た液晶駆動用マトリックスアレイ配線と外部接続端子
と、該外部接続端子と前記液晶駆動用マトリックスアレ
イ配線とを結ぶ引出し配線とをそれぞれ複数有する液晶
表示パネルにおいて、前記引出し配線が層間絶縁膜の上
層に存在する複数の上層配線と前記層間絶縁膜の下層に
存在する複数の下層配線とを有しており、前記上層の液
晶駆動用マトリックスアレイ配線と前記上層の引き出し
配線とが同一平面上に形成され、前記下層の液晶駆動用
マトリックスアレイ配線と前記下層の引き出し配線とが
同一平面上に形成されていることを特徴とする液晶表示
パネル。3. An interlayer insulating film which is formed above or below an interlayer insulating film.
In a liquid crystal display panel having a plurality of liquid crystal drive matrix array wirings and external connection terminals, and a plurality of lead-out wirings connecting the external connection terminals and the liquid crystal drive matrix array wirings, the lead-out wirings are formed on an interlayer insulating film. It has a plurality of upper wiring that exists between a plurality of lower wiring that exists in the lower layer of the interlayer insulating film, the upper layer of the liquid
Array wiring for crystal drive and drawing of the upper layer
Wiring and wiring are formed on the same plane.
The matrix array wiring and the lead wiring of the lower layer are
A liquid crystal display panel formed on the same plane .
くとも１列に配置され、各外部接続端子が前記上層配線
の１つ又は前記下層配線の１つと接続されており、前記
上層配線の１つと接続されている外部接続端子と前記下
層配線の１つと接続されている外部接続端子とが交互に
配置されていることを特徴とする請求項３記載の液晶表
示パネル。4. The plurality of external connection terminals are arranged in at least one row in parallel, and each external connection terminal is connected to one of the upper layer wirings or one of the lower layer wirings. 4. The liquid crystal display panel according to claim 3, wherein the external connection terminals connected to one of the lower wirings and the external connection terminals connected to one of the lower wirings are alternately arranged.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3174973A JP3010800B2 (en) | 1991-07-16 | 1991-07-16 | Liquid crystal display device and liquid crystal display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3174973A JP3010800B2 (en) | 1991-07-16 | 1991-07-16 | Liquid crystal display device and liquid crystal display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0519282A JPH0519282A (en) | 1993-01-29 |
| JP3010800B2 true JP3010800B2 (en) | 2000-02-21 |
Family
ID=15987984
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3174973A Expired - Lifetime JP3010800B2 (en) | 1991-07-16 | 1991-07-16 | Liquid crystal display device and liquid crystal display panel |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3010800B2 (en) |
Cited By (1)
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|---|---|---|---|---|
| US9690149B2 (en) | 2013-09-09 | 2017-06-27 | Sharp Kabushiki Kaisha | Active matrix substrate and display device |
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| JP3585130B2 (en) * | 1993-09-24 | 2004-11-04 | オリエンタルモーター株式会社 | Linear pulse motor |
| JP3072707B2 (en) * | 1995-10-31 | 2000-08-07 | インターナショナル・ビジネス・マシーンズ・コーポレ−ション | Liquid crystal display device and method of manufacturing the same |
| KR19980016869A (en) * | 1996-08-29 | 1998-06-05 | 김광호 | Tab package with multiple rows of input leads |
| JP2003255381A (en) * | 2001-12-28 | 2003-09-10 | Advanced Display Inc | Image display device and manufacturing method therefor |
| JP5103717B2 (en) * | 2005-08-09 | 2012-12-19 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus including the same |
| JP4940642B2 (en) * | 2005-12-05 | 2012-05-30 | カシオ計算機株式会社 | Wiring pattern of liquid crystal display device |
| KR101247023B1 (en) * | 2008-07-23 | 2013-03-25 | 샤프 가부시키가이샤 | Active matrix substrate, display device, method for inspecting the active matrix substrate, and method for inspecting the display device |
| JP5192052B2 (en) | 2008-11-26 | 2013-05-08 | シャープ株式会社 | Display device |
| EP2355074A4 (en) * | 2008-12-05 | 2012-05-30 | Sharp Kk | Display device substrate, and display device |
| WO2014112560A1 (en) * | 2013-01-21 | 2014-07-24 | シャープ株式会社 | Active matrix substrate and display device |
| JP6403796B2 (en) | 2014-11-21 | 2018-10-10 | シャープ株式会社 | Display device |
| WO2016080290A1 (en) | 2014-11-21 | 2016-05-26 | シャープ株式会社 | Display device |
| CN105867035A (en) * | 2016-06-12 | 2016-08-17 | 武汉华星光电技术有限公司 | Fan-out routing system, array substrate and liquid crystal display device |
-
1991
- 1991-07-16 JP JP3174973A patent/JP3010800B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9690149B2 (en) | 2013-09-09 | 2017-06-27 | Sharp Kabushiki Kaisha | Active matrix substrate and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0519282A (en) | 1993-01-29 |
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