JP2990540B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device. In particular, the present invention relates to a semiconductor device including a dielectric film having a high dielectric constant and a small thickness as a part of a member, such as a capacitor and a MOS transistor.

[0002]

2. Description of the Related Art Some semiconductor devices include a dielectric film having a high dielectric constant and a small thickness, such as a capacitor and a MOS transistor, as a part of a member.

Since the capacity of a capacitor is proportional to the dielectric constant of a dielectric film and the area facing electrodes and inversely proportional to the distance between electrodes, it is difficult to improve the degree of integration when the capacitor is formed in a plane on a substrate. . Further, in the case of MOS transistors, the control voltage of the gate is limited. Therefore, if the dielectric constant of the gate insulating film cannot be made large, not only will the output current be limited, but also the dielectric strength will be insufficient. There is a drawback that it cannot be done much.

On the other hand, in a semiconductor device, improvement in integration is one of the most important requirements. Therefore, a dielectric film of a capacitor and a gate insulating film of a MOS transistor are extremely important technical development issues. The subject.

In order to improve the degree of integration of capacitors, the following two techniques have been developed in the prior art.

A first technique is to form a flat capacitor vertically on a semiconductor substrate. In this method, a flat plate-shaped opening is formed as deeply as possible perpendicularly to a conductive type region (a region where impurities are doped) of a semiconductor substrate, and the inner surface of the opening is made into a dielectric material. This is a method of filling with a substance. However, to implement this technique, it is necessary to drill an opening that is narrow but deep, and it is necessary to fill this opening, but if you try to drill a deep opening, However, it is not a flat opening but a tapered opening, and if this opening is to be filled, it is not filled completely and a cavity is apt to be generated in a deep portion, and it is difficult to manufacture from the yield. There are drawbacks.

The second method utilizes the property that when the surface of an N-type polycrystalline silicon layer is oxidized, extremely fine irregularities are formed on the surface and the surface area increases. An N-type polycrystalline silicon layer is formed in a conductive type region (a region where impurities are doped) and oxidized to form a dielectric film having an increased surface area on the surface of the N-type polycrystalline silicon layer. It is formed, and a conductor layer is further formed thereon. However, there is a disadvantage in that a high temperature process is required for oxidation and disadvantages in other processes are unavoidable.

Although it is possible to use silicon nitride as a material for the dielectric film, there are many disadvantages in the manufacturing process as compared with silicon dioxide, which is not practical.

The relative permittivity of silicon dioxide is 4, and the relative permittivity of silicon nitride is 7 to 8, and the dielectric constant is not always sufficiently high, no matter which one is used.

Moreover, when the silicon dioxide film is formed by using the oxidation process, the corners become thin, and the opening is filled with silicon dioxide or silicon nitride by using a deposition process such as a vapor phase growth method. Then, as described above, there is a disadvantage that a cavity is generated in a deep portion.

[0011]

As described above, it is easy to manufacture a member of a dielectric film having a high dielectric constant and a small thickness, in particular, a member having such a dielectric film formed in an opening. Rather, a demand for a semiconductor device including such a member such as a capacitor and a MOS transistor is extremely large.

An object of the present invention is to meet this demand, and to provide a semiconductor device including a dielectric film having a high dielectric constant and a small thickness as a part of a member, for example, a capacitor and a MOS transistor. It is in.

[0013]

The object of the present invention is to selectively open an insulating film (2) formed on the surface of a semiconductor substrate (1) and to open the insulating film (2) from the exposed surface of the semiconductor substrate (1). An electrode contact layer (4) formed so as to extend on the surface of the insulating film (2); a first insulator film (5) formed on the surface of the electrode contact layer (4); and a semiconductor A dielectric film (9) composed of a laminate of the film (6) and the second insulator film (7), and the electrode contact layer on the surface of the dielectric film (9). This is achieved by a semiconductor device having (4) and a conductive film (8) formed so as not to make electrical contact.

Preferably, silicon oxide or silicon nitride is used for both the material of the first insulator film (5) and the material of the second insulator film (7). is there.

[0015]

The dielectric film according to the present invention has a relative dielectric constant of about 12
And a large semiconductor (for example, amorphous or polycrystalline silicon) film is sandwiched between insulating films such as silicon oxide and silicon nitride, so that the relative dielectric constant is sufficiently large (the thickness of each layer is large). (Depending on the ratio of the thickness, but 10 or more according to the experimental results), a dielectric film having a high dielectric constant and a small thickness is obtained. In particular, when the base is made of silicon or the like, it can be formed only by the oxidation step and the vapor phase growth step, so that the coverage is good and the film thickness becomes uniform.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A flat capacitor according to an embodiment of the present invention will be further described below with reference to the drawings.

Referring to FIG. 2, FIG. 2 is a manufacturing process diagram of a semiconductor device (capacitor) according to one embodiment of the present invention.

An opening for a capacitor electrode contact is formed in a region where a capacitor electrode is to be formed on a field insulating film 2 of a silicon substrate 1 having an element (not shown) formed therein, and a polycrystalline silicon film is formed thereon. Then, after ion-implanting an N-type impurity such as phosphorus, the electrode is patterned into a shape of a capacitor electrode to form one electrode 3 of the capacitor and an electrode contact layer 4.

In the figure, reference numeral 11 denotes a high impurity concentration buried layer, which is connected to any terminal of an already formed element (not shown).

FIG. 3 is a manufacturing process diagram of a semiconductor device (capacitor) according to one embodiment of the present invention.

At 850 ° C., dry oxygen is supplied to oxidize the surface layer of one electrode 3 of the capacitor to a thickness of about 50 ° to form a first insulator film 5 having a thickness of about 100 °.

Subsequently, disilane is supplied while maintaining the substrate temperature at 450 ° C. to form a polycrystalline silicon film or an amorphous silicon film 6.

At 850 ° C., dry oxygen is supplied again to form a surface layer of the polycrystalline silicon film or the amorphous silicon film 6.
It is oxidized to a thickness of about 50 ° to form a second insulating film 7 having a thickness of 100 °.

Next, a polycrystalline silicon film 8 containing an N-type impurity such as phosphorus is formed to a thickness of 500.degree.

FIG. 1 is a sectional view of a semiconductor device (capacitor) according to one embodiment of the present invention.

The polycrystalline silicon film 8, the second insulating film 7, and the silicon film 6 are patterned into a shape of a capacitor electrode and its wiring to complete a capacitor.

Here, the laminated body 9 of the first insulating film 5, the silicon film 6, and the second insulating film 7 is a dielectric film of the capacitor.

After that, a passivation film or the like is generally formed, but the description is omitted because it is a well-known fact in the art.

Since the capacitor according to this embodiment is a laminate in which a silicon film 6 is sandwiched between a first insulating film 5 and a second insulating film 7 as a dielectric film, its relative dielectric constant is More than about 10 and the relative dielectric constant of silicon dioxide (4)
And the dielectric constant (7 to 8) of silicon nitride. Therefore, a large capacity can be realized with a small plane area.

Further, in the above-mentioned steps, since steps which make it difficult to make the film thickness uniform are not used at all, the steps are simplified and the production yield is good.

It goes without saying that the present invention can also be used as a gate insulating film of a MOS transistor.

[0032]

As described above, in the semiconductor device according to the present invention, as the dielectric films, the first insulator film, which is a silicon oxide film or a silicon nitride film, and the silicon film, particularly the polycrystalline film. A laminate of a semiconductor film which is a silicon film and a second insulator film which is a silicon oxide film or a silicon nitride film is used as a dielectric film,
The relative dielectric constant of the dielectric film composed of the laminated body depends on the ratio of the thickness of each layer. However, according to the results of the experiment, the dielectric constant is sufficiently large at 10 or more. Device including a part of a member, for example, a capacitor MO
An S transistor or the like can be provided.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor device (capacitor) according to one embodiment of the present invention.

FIG. 2 is a manufacturing process diagram of a semiconductor device (capacitor) according to one embodiment of the present invention.

FIG. 3 is a manufacturing process diagram of the semiconductor device (capacitor) according to one embodiment of the present invention.

[Explanation of symbols]

 Reference Signs List 1 silicon substrate on which element is formed 11 high impurity concentration buried layer 2 field insulating film 3 one electrode of capacitor 4 electrode contact layer 5 first insulating film 6 semiconductor film 7 second insulating film 8 conductor film (impurity 9) Dielectric film (laminated body)

──────────────────────────────────────────────────続 き Continued on the front page (58) Fields surveyed (Int.Cl. ⁶ , DB name) H01L 27/04

Claims (2)

(57) [Claims] An insulating film (2) formed on a surface of a semiconductor substrate (1) is selectively opened, and a surface of the semiconductor film (2) is exposed from an exposed surface of the semiconductor substrate (1). An electrode contact layer (4) formed to extend; a first insulator film (5), a semiconductor film (6), and a second film formed on the surface of the electrode contact layer (4). A dielectric film (9) composed of a laminate of the insulator film (7), and the electrode contact layer (4) on the surface of the dielectric film (9).
Conductive film (8) formed so as not to make electrical contact with
And a semiconductor device comprising: 2. The material of the first insulator film (5) and the material of the second insulator film (7) are both silicon oxide or silicon nitride. 2. The semiconductor device according to 1.