JP2968769B2 - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JP2968769B2 JP2968769B2 JP9228054A JP22805497A JP2968769B2 JP 2968769 B2 JP2968769 B2 JP 2968769B2 JP 9228054 A JP9228054 A JP 9228054A JP 22805497 A JP22805497 A JP 22805497A JP 2968769 B2 JP2968769 B2 JP 2968769B2
- Authority
- JP
- Japan
- Prior art keywords
- wire
- resin
- island
- lead
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【0001】[0001]
【発明の属する技術分野】本発明は樹脂封止型半導体装
置に関する。The present invention relates to a resin-sealed semiconductor device.
【0002】[0002]
【従来の技術】従来樹脂封止型半導体装置は、アイラン
ドに搭載された半導体チップと、このアイランドを保持
する吊りリードと、アイランドの周辺部に設けられた内
部リードと、内部リードの先端と半導体チップのパッド
とを接続するワイヤーと、これら半導体チップとアイラ
ンドと内部リードとワイヤーとを封止する樹脂とから主
に構成されていた。2. Description of the Related Art Conventionally, a resin-encapsulated semiconductor device comprises a semiconductor chip mounted on an island, a suspension lead for holding the island, an internal lead provided on the periphery of the island, a tip of the internal lead, It has been mainly composed of wires for connecting the pads of the chip and resin for sealing these semiconductor chips, islands, internal leads and wires.
【0003】しかしながら、近年素子が高集積化し半導
体素子が小さくなるので、半導体チップのパッドと内部
リードとを接続するワイヤーは長くなる傾向にあった。
またパッドと内部リードをワイヤーで接続した場合、半
導体チップのコーナー部に位置するワイヤーは半導体チ
ップのコーナー部をはさむ様になるので、他の位置のワ
イヤーに比べワイヤー間隔が広くなる。このため樹脂封
止した場合は、ワイヤー間隔が広い部分に流れ込む樹脂
量が大きくなり、ワイヤーに変形を生じ、電気的ショー
トが発生しやすいという傾向にあった。However, in recent years, since the elements have been highly integrated and the semiconductor elements have become smaller, the wires connecting the pads of the semiconductor chip and the internal leads have tended to be longer.
Further, when the pads and the internal leads are connected by wires, the wires located at the corners of the semiconductor chip sandwich the corners of the semiconductor chip, so that the wire spacing is wider than the wires at other positions. For this reason, when resin sealing is performed, the amount of resin flowing into a portion having a large wire interval becomes large, and the wire tends to be deformed, so that an electrical short circuit tends to occur.
【0004】この対策として、図3に示すように、内部
リード4の先端からアイランド1間の吊りリード3の幅
を広く形成した幅広部3Aを有するリードフレームが特
開平4−134853号公報に提案されている。このリ
ードフレームでは吊りリードの幅を広くし、封止時に流
入する矢印で示した樹脂注入口方向からの樹脂量を少な
くし、ワイヤー6の変形を低減しようとするものであ
る。As a countermeasure for this, as shown in FIG. 3, a lead frame having a wide portion 3A in which the width of the suspension lead 3 formed between the tip of the internal lead 4 and the island 1 is wide is proposed in Japanese Patent Laid-Open Publication No. Hei. Have been. In this lead frame, the width of the suspension lead is widened, the amount of resin from the direction of the resin injection port indicated by an arrow flowing during sealing is reduced, and the deformation of the wire 6 is reduced.
【0005】[0005]
【発明が解決しようとする課題】第1の問題点は、上述
した従来の技術においては、吊りリードの隣のワイヤー
が長いワイヤーの時、流動する樹脂に押され、ワイヤー
のショートを発生させることである。The first problem is that, in the above-mentioned prior art, when the wire next to the suspension lead is a long wire, the wire is pushed by the flowing resin to cause a short circuit of the wire. It is.
【0006】その理由は、長いワイヤー、特に4mm以
上のワイヤーを用いた場合、樹脂に押されてワイヤー同
士が接触するからである。吊りリードのアイランドに近
接した部分を幅広部にすれば、ワイヤーのショートは幾
分低減されるが、十分とは言えない。The reason is that when a long wire, particularly a wire having a length of 4 mm or more, is used, the wires are pressed by the resin and come into contact with each other. If the portion of the suspension lead near the island is made wider, the short circuit of the wire is somewhat reduced, but it is not sufficient.
【0007】又、ワイヤーの強度を強くする方法も考え
られるが、そのためにはワイヤー径を大きくしなければ
ならない為、コストが高くなるという問題点がある。Further, a method of increasing the strength of the wire is conceivable, but for that purpose, the wire diameter must be increased, and there is a problem that the cost increases.
【0008】本発明の目的は、ワイヤーの径を太くする
ことなくワイヤーのショートを防止し、信頼性の向上し
た樹脂封止型半導体装置を提供することにある。An object of the present invention is to provide a resin-encapsulated semiconductor device which has improved reliability by preventing short-circuit of a wire without increasing the diameter of the wire.
【0009】[0009]
【課題を解決するための手段】第1の発明の樹脂封止型
半導体装置は、アイランドに搭載された半導体チップ
と、このアイランドを保持しアイランドに接続する部分
が他の部分より幅が広く形成された吊りリードと、前記
アイランドの周辺部に設けられた内部リードと、前記内
部リードの先端と前記半導体チップのパッドとを接続す
るワイヤーと、前記半導体チップと前記アイランドと前
記吊りリードと前記内部リードと前記ワイヤーとを封止
する樹脂とを含む樹脂封止型半導体装置において、前記
内部リードの先端と前記吊りリードの少なくとも1つの
幅の広い部分を接続する第1のワイヤーと、前記幅の広
い部分を接続する第1のワイヤーと、前記幅の広い部分
と前記パッドとを接続する第2のワイヤーとを有するこ
とを特徴とするものである。According to a first aspect of the present invention, there is provided a resin-encapsulated semiconductor device in which a semiconductor chip mounted on an island and a portion for holding the island and connecting to the island are formed wider than other portions. The suspended lead, the internal lead provided in the periphery of the island, the wire connecting the tip of the internal lead and the pad of the semiconductor chip, the semiconductor chip, the island, the suspended lead and the internal In a resin-sealed semiconductor device including a resin for sealing a lead and the wire, a first wire connecting a tip of the internal lead and at least one wide portion of the suspension lead, A first wire connecting a wide portion and a second wire connecting the wide portion and the pad. A.
【0010】第2の発明の樹脂封止型半導体装置は、ア
イランドに接続された半導体チップと、このアイランド
を保持しアイランドに接続する部分が他の部分より幅が
広く形成された吊りリードと、前記アイランドの周辺部
に設けられた内部リードと、前記内部リードの先端と前
記半導体チップのパッドとを接続するワイヤーと、前記
半導体チップと前記アイランドと前記吊りリードと前記
内部リードと前記ワイヤーとを封止する樹脂とを含む樹
脂封止型半導体装置において、前記吊りリードの少なく
とも1つの幅の広い部分には絶縁層を介して導電性フィ
ルムが固着されるとともに、前記吊りリードの先端と前
記導電性フィルムに第1のワイヤーが接続され、前記導
電性フィルムと前記パッドに第2のワイヤーが接続され
ていることを特徴とするものである。According to a second aspect of the present invention, there is provided a resin-encapsulated semiconductor device, comprising: a semiconductor chip connected to an island; a suspension lead having a portion holding the island and connecting to the island wider than other portions; An internal lead provided in a peripheral portion of the island, a wire connecting a tip of the internal lead and a pad of the semiconductor chip, and the semiconductor chip, the island, the suspension lead, the internal lead, and the wire. In a resin-encapsulated semiconductor device including a resin to be sealed, a conductive film is fixed to at least one wide portion of the suspension lead via an insulating layer, and a tip of the suspension lead is connected to the conductive film. A first wire is connected to the conductive film, and a second wire is connected to the conductive film and the pad. It is intended to.
【0011】幅の広い吊りリード部へ第1,第2の2本
のワイヤーを用い、2回ボンディングすることで、樹脂
流動の影響を受けやすいコーナー部のワイヤーを短くで
きる為、ワイヤーショートを防ぐことができる。The first and second two wires are bonded twice to the wide suspension lead portion, so that the wire at the corner portion which is easily affected by the resin flow can be shortened, thereby preventing a wire short. be able to.
【0012】[0012]
【発明の実施の形態】次に本発明について図面を参照し
て説明する。図1は本発明の第1の実施の形態を説明す
る為の吊りリード近傍の上面図であり、特に封止樹脂を
除いた場合を示している。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a top view of the vicinity of a suspension lead for explaining a first embodiment of the present invention, and particularly shows a case where a sealing resin is removed.
【0013】図1を参照すると樹脂封止型半導体装置
は、アイランド1に搭載された半導体チップ2と、この
アイランド1を保持しアイランド1に接続する部分が他
の部分より広い幅広部3Aを有する吊りリード3と、ア
イランド1の周辺部に設けられ外部リード(図示せず)
と一体的に形成された複数の内部リード4と、内部リー
ド4の先端と半導体チップ上のパッド5とを接続するワ
イヤー6と、半導体チップ2とアイランド1と吊りリー
ド3と内部リード4とワイヤー6とを封止する樹脂(図
示せず)とから主に構成されるが、特に吊りリード3に
近接した内部リード4とパッド5とは、内部リード4の
先端と吊りリードの幅広部3Aとを接続する第1のワイ
ヤー6Aと、幅広部3Aとパッド5とを接続する第2の
ワイヤー6Bとにより接続されている。Referring to FIG. 1, the resin-encapsulated semiconductor device has a semiconductor chip 2 mounted on an island 1 and a wide portion 3A in which a portion holding the island 1 and connecting to the island 1 is wider than other portions. Suspended leads 3 and external leads (not shown) provided around the island 1
A plurality of internal leads 4 formed integrally with the semiconductor device; a wire 6 connecting the tip of the internal lead 4 to a pad 5 on the semiconductor chip; a semiconductor chip 2, an island 1, a suspension lead 3, the internal lead 4, and a wire 6 is mainly composed of a resin (not shown) that seals the internal leads 4 and the pad 5. And a second wire 6B connecting the wide portion 3A and the pad 5 to each other.
【0014】このように第1の実施の形態では、特にワ
イヤーの長くなる吊りリードに最も近いワイヤーを、第
1,第2の2本のワイヤーに分割し、幅広部を介して内
部リードとパッド5とを接続している為、120ピンの
ICの場合にも、各ワイヤーの長さを4mm以内にする
ことができる。この為、封止時の樹脂の流動によるワイ
ヤー6A,6Bの変形を防止できる為、ワイヤーショー
トを無くすことができる。As described above, in the first embodiment, the wire closest to the suspension lead, which is particularly long, is divided into the first and second wires, and the internal lead and the pad are separated via the wide portion. 5, the length of each wire can be kept within 4 mm even in the case of a 120-pin IC. For this reason, since the deformation of the wires 6A and 6B due to the flow of the resin at the time of sealing can be prevented, a wire short circuit can be eliminated.
【0015】尚、図1においては、2本の内部リードを
幅広部3Aを介してパッド5に接続したが、この場合の
2本の内部リードは共にグランド配線の場合である。In FIG. 1, two internal leads are connected to the pad 5 via the wide portion 3A. In this case, the two internal leads are ground wiring.
【0016】図2は本発明の第2の実施の形態を説明す
る為の吊りリード近傍の上面図であり、封止樹脂を除い
た場合を示している。FIG. 2 is a top view showing the vicinity of a suspension lead for explaining a second embodiment of the present invention, and shows a case where a sealing resin is removed.
【0017】図2に示したように第2の実施の形態も第
1の実施の形態とほぼ同様であるが、吊りリード3の幅
広部3A上に絶縁層を介して導電性フィルム7が設けら
れている所が異なっている。すなわち吊りリード3の幅
広部3A上には、ポリイミド系フィルム等(図示せず)
からなる絶縁接着材を介してAuやAl等からなり、ワ
イヤーボンディングに必要な幅と長さを有する4枚の導
電性フィルム7が固着されており、そして吊りリード3
に近接した4本の内部リードの先端と導電性フィルム7
がそれぞれ第1のワイヤー6Aで接続され、導電性フィ
ルム7とパッド5とが、それぞれ第2のワイヤー6Bで
接続されている。ワイヤー6の太さとして28〜33μ
mの径のものを用いる場合、導電性フィルム7の幅は1
00μm程度あればボンディングは容易である。As shown in FIG. 2, the second embodiment is almost the same as the first embodiment, except that a conductive film 7 is provided on the wide portion 3A of the suspension lead 3 via an insulating layer. Is different. That is, a polyimide-based film or the like (not shown) is provided on the wide portion 3A
Four conductive films 7 made of Au, Al, or the like, having a width and a length necessary for wire bonding are fixed via an insulating adhesive made of
Tips of four internal leads and conductive film 7 close to
Are connected by a first wire 6A, and the conductive film 7 and the pad 5 are connected by a second wire 6B. 28-33μ as the thickness of the wire 6
m, the width of the conductive film 7 is 1
Bonding is easy if it is about 00 μm.
【0018】このように構成された第2の実施の形態に
よれば、幅広部3A上におけるワイヤーの接続部は、絶
縁層を介した導電性フィルム7から構成されている為、
第1,第2のワイヤー6A,6Bでパッド5に接続され
る内部リードは、第1の実施の形態で説明したグランド
配線に限定されず、他の信号配線であってもよい。又、
接続する内部リードの数を2本以上に増すことができる
という利点もある。According to the second embodiment configured as described above, the connection portion of the wire on the wide portion 3A is constituted by the conductive film 7 via the insulating layer.
The internal lead connected to the pad 5 by the first and second wires 6A and 6B is not limited to the ground wiring described in the first embodiment, but may be another signal wiring. or,
There is also an advantage that the number of internal leads to be connected can be increased to two or more.
【0019】[0019]
【発明の効果】以上説明したように本発明は、吊りリー
ドの幅の広い部分に、第1,第2のワイヤーを用い2回
ボンディングを施すことにより、短いワイヤーで内部リ
ードとパッドとを接続できる為、樹脂流動の影響を少な
くし、ワイヤショートを防ぐことができ、信頼性の向上
した樹脂封止型半導体装置が得られるという効果があ
る。As described above, according to the present invention, the inner lead and the pad are connected with a short wire by bonding the wide part of the suspension lead twice using the first and second wires. Therefore, there is an effect that the influence of resin flow can be reduced, wire short-circuit can be prevented, and a resin-encapsulated semiconductor device with improved reliability can be obtained.
【図1】本発明の第1の実施の形態を説明する為の吊り
リード近傍の上面図。FIG. 1 is a top view near a suspension lead for describing a first embodiment of the present invention.
【図2】本発明の第2の実施の形態を説明する為の吊り
リード近傍の上面図。FIG. 2 is a top view near a suspension lead for describing a second embodiment of the present invention.
【図3】従来のリードフレームの一例の上面図。FIG. 3 is a top view of an example of a conventional lead frame.
1 アイランド 2 半導体チップ 3 吊りリード 3A 幅広部 4 内部リード 5 パッド 6 ワイヤー 6A 第1のワイヤー 6B 第2のワイヤー 7 導電性フィルム DESCRIPTION OF SYMBOLS 1 Island 2 Semiconductor chip 3 Suspension lead 3A Wide part 4 Internal lead 5 Pad 6 Wire 6A First wire 6B Second wire 7 Conductive film
Claims (5)
と、このアイランドを保持しアイランドに接続する部分
が他の部分より幅が広く形成された吊りリードと、前記
アイランドの周辺部に設けられた内部リードと、前記内
部リードの先端と前記半導体チップのパッドとを接続す
るワイヤーと、前記半導体チップと前記アイランドと前
記吊りリードと前記内部リードと前記ワイヤーとを封止
する樹脂とを含む樹脂封止型半導体装置において、前記
内部リードの先端と前記吊りリードの少なくとも1つの
幅の広い部分を接続する第1のワイヤーと、前記幅の広
い部分と前記パッドとを接続する第2のワイヤーとを有
することを特徴とする樹脂封止型半導体装置。1. A semiconductor chip mounted on an island, a suspension lead holding and connecting the island to the island wider than other portions, and an internal lead provided on a peripheral portion of the island. And a resin connecting the tip of the internal lead and the pad of the semiconductor chip, and a resin sealing the semiconductor chip, the island, the suspension lead, the internal lead, and the wire. In the semiconductor device, a first wire connecting the tip of the internal lead and at least one wide portion of the suspension lead, and a second wire connecting the wide portion and the pad are provided. A resin-sealed semiconductor device characterized by the above-mentioned.
なくとも2本の第1のワイヤーと第2のワイヤーがそれ
ぞれ接続されている請求項1記載の樹脂封止型半導体装
置。2. The resin-encapsulated semiconductor device according to claim 1, wherein at least two first wires and at least two second wires are connected to one wide portion of the suspension lead.
と、このアイランドを保持しアイランドに接続する部分
が他の部分より幅が広く形成された吊りリードと、前記
アイランドの周辺部に設けられた内部リードと、前記内
部リードの先端と前記半導体チップのパッドとを接続す
るワイヤーと、前記半導体チップと前記アイランドと前
記吊りリードと前記内部リードと前記ワイヤーとを封止
する樹脂とを含む樹脂封止型半導体装置において、前記
吊りリードの少なくとも1つの幅の広い部分には絶縁層
を介して導電性フィルムが固着されるとともに、前記吊
りリードの先端と前記導電性フィルムに第1のワイヤー
が接続され、前記導電性フィルムと前記パッドに第2の
ワイヤーが接続されていることを特徴とする樹脂封止型
半導体装置。3. A semiconductor chip connected to an island, a suspension lead in which a portion holding the island and connecting to the island is formed wider than other portions, and an internal lead provided in a peripheral portion of the island. And a resin connecting the tip of the internal lead and the pad of the semiconductor chip, and a resin sealing the semiconductor chip, the island, the suspension lead, the internal lead, and the wire. In the semiconductor device, a conductive film is fixed to at least one wide portion of the suspension lead via an insulating layer, and a first wire is connected to a tip of the suspension lead and the conductive film, A resin-sealed semiconductor device, wherein a second wire is connected to the conductive film and the pad.
ぞれ複数本形成されている請求項3記載の樹脂封止型半
導体装置。4. The resin-encapsulated semiconductor device according to claim 3, wherein a plurality of first wires and a plurality of second wires are formed.
求項3記載の樹脂封止型半導体装置。5. The resin-encapsulated semiconductor device according to claim 3, wherein the insulating layer is a polyimide film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9228054A JP2968769B2 (en) | 1997-08-25 | 1997-08-25 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9228054A JP2968769B2 (en) | 1997-08-25 | 1997-08-25 | Resin-sealed semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH1168014A JPH1168014A (en) | 1999-03-09 |
JP2968769B2 true JP2968769B2 (en) | 1999-11-02 |
Family
ID=16870482
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9228054A Expired - Fee Related JP2968769B2 (en) | 1997-08-25 | 1997-08-25 | Resin-sealed semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2968769B2 (en) |
-
1997
- 1997-08-25 JP JP9228054A patent/JP2968769B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH1168014A (en) | 1999-03-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100199262B1 (en) | Semiconductor device and the method of manufacturing thereof | |
JPH06105721B2 (en) | Semiconductor device | |
JPH0722454A (en) | Semiconductor integrated circuit device | |
JP2908350B2 (en) | Semiconductor device | |
JP2968769B2 (en) | Resin-sealed semiconductor device | |
JP2000124235A (en) | Resin-sealed semiconductor device | |
US6208017B1 (en) | Semiconductor device with lead-on-chip structure | |
JP3702152B2 (en) | Semiconductor device | |
JP2885786B1 (en) | Semiconductor device manufacturing method and semiconductor device | |
JP2567870B2 (en) | Semiconductor memory device | |
JP2500643B2 (en) | Semiconductor device | |
JP2539763B2 (en) | Semiconductor device mounting method | |
JPH0529528A (en) | Semiconductor integrated circuit device and lead frame used for same | |
JP2756436B2 (en) | Semiconductor device and manufacturing method thereof | |
JP3406147B2 (en) | Semiconductor device | |
JP2971594B2 (en) | Semiconductor integrated circuit device | |
US6323541B1 (en) | Structure for manufacturing a semiconductor die with copper plated tapes | |
JP2680969B2 (en) | Semiconductor memory device | |
JP2871987B2 (en) | Semiconductor storage device | |
JP2577879B2 (en) | Semiconductor device | |
JP2577880B2 (en) | Semiconductor device | |
JP2551354B2 (en) | Resin-sealed semiconductor device | |
KR950002001A (en) | Semiconductor package | |
JP2633513B2 (en) | Method for manufacturing semiconductor device | |
JP2963952B2 (en) | Semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19990721 |
|
LAPS | Cancellation because of no payment of annual fees |