JP2953163B2 - 半導体装置実装用基板の製造方法 - Google Patents

半導体装置実装用基板の製造方法

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Publication number
JP2953163B2
JP2953163B2 JP34916291A JP34916291A JP2953163B2 JP 2953163 B2 JP2953163 B2 JP 2953163B2 JP 34916291 A JP34916291 A JP 34916291A JP 34916291 A JP34916291 A JP 34916291A JP 2953163 B2 JP2953163 B2 JP 2953163B2
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Prior art keywords
semiconductor
substrate
thin plate
mounting
aluminum
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JPH05160288A (ja
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秀昭 吉田
宏和 田中
誠 鳥海
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三菱マテリアル株式会社
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    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
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    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
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Description

【発明の詳細な説明】
【0001】
【産業上の利用分野】本発明は、半導体装置実装用基板
の製造方法に関し、詳しくはセラミックス基板表面に被
着したアルミニウム等の薄板を化学的に研磨したセラミ
ックス基板を製造する場合、この薄板の表面が変質しな
いようにした半導体装置実装用基板の製造方法に関す
る。
【0002】
【従来の技術】従来、例えばICチップ等の半導体装置
を搭載する半導体装置実装用基板は、セラミックス基板
にアルミニウムまたはアルミニウム合金の薄板が被着さ
れ、この薄板の所定部分にニッケルがメッキされてい
た。
【0003】この従来の半導体装置実装用基板の製造方
法を図11〜図17を用いて説明する。まず、アルミナ
等のセラミックス基板21を準備し(図11)、このセ
ラミックス基板21の両面に回路パターン形成用、ヒー
トシンク接合用のアルミニウムまたはアルミニウム合金
の薄板22をそれぞれ被着していた(図12)。次に、
この薄板22に機械的研磨(図13)および化学的研磨
(図14)を順番に施していた。なお、機械的研磨は、
上記薄板22の表面の酸化層を除去するために行ってい
る。そして、化学的研磨は、上記薄板22とニッケルと
の接合強度を上げるために行っている。次に、この薄板
22の一部分に所定パターンのレジスト23を塗布して
いた(図15)。次に、レジスト23が塗布されてない
薄板22の表面にニッケル24をメッキしていた(図1
6)。次に、このレジスト24を除去することにより、
上記薄板22の他の一部分にニッケル24がメッキされ
るものである(図17)。
【0004】
【発明が解決しようとする課題】しかしながら、このよ
うな従来の半導体装置実装用基板の製造方法にあって
は、化学的研磨の後、レジスト工程でアルミニウムまた
はアルミニウム合金の薄板表面が変質してしまう。その
結果、ニッケルメッキが剥げてしまう。従って、半導体
装置実装用基板の信頼性が低下してしまうという課題が
あった。
【0005】
【発明の目的】そこで、本発明は、アルミニウムまたは
アルミニウム合金の薄板表面からのニッケルメッキの剥
離を防止し、半導体装置実装用基板の信頼性を向上させ
た半導体装置実装用基板の製造方法を提供することを、
その目的としている。
【0006】
【課題を解決するための手段】本発明は、半導体装置が
実装されるセラミックス基板面にアルミニウムまたはア
ルミニウム合金の層を形成する工程と、この層の全面に
機械的研磨を施す工程と、この機械的研磨された面に所
定パターンのレジストを被着する工程と、このレジスト
が被着されていない機械研磨面の所定部分に化学的研磨
を施す工程と、この所定部分にニッケルメッキ層を形成
する工程と、を備えた半導体装置実装用基板の製造方法
である。
【0007】
【作用】本発明に係る半導体装置実装用基板の製造方法
にあっては、アルミニウムまたはアルミニウム合金の薄
板の面の所定部分についてはレジストプロセスにより変
質するが、この変質した面に化学的研磨を施し、この所
定部分にニッケルメッキ層を形成している。このため、
変質した部分が化学的研磨により除去され、変質のない
状態の面にニッケルメッキが施されることとなる。よっ
て、アルミニウムまたはアルミニウム合金層に対するニ
ッケルメッキ層の剥離は完全に防止されることとなる。
【0008】
【実施例】以下、本発明に係る半導体実装用基板の製造
方法を実施例に基づいて説明する。図1〜図10は、本
発明の一実施例を説明するためのものである。
【0009】まず、絶縁性のセラミックス基板として、
例えば所定の厚さの純度96%のAl23焼結体である
アルミナ基板11を使用するものとする(図1)。そし
て、このアルミナ基板11の上面には、例えば純度が9
9.99%のアルミニウム製の回路形成用薄板12が、
例えばAl−Si合金およびAl−Ge合金からなるろ
う材により接着されている。さらに、アルミナ基板11
の下面には、例えば同じく純度99.99%のアルミニ
ウム製のヒートシンク接合用薄板18がろう材により接
着されている(図2)。
【0010】これらの接着は、ろう材を薄板12と薄板
18との圧延加工時に30μmの厚さにクラッドしてろ
う付け板材(ブレージングシート)とし、これらの材料
を積み重ねた状態で、ろう材に適合した430〜610
℃の温度範囲内に真空中で10分間保持した条件でろう
付けして積層接合体とし、350℃で30分間の熱処理
後室温まで徐冷することによって行っている。なお、薄
板材12の回路形成は、接合前の形成回路の打ち抜き、
または、接合後のエッチング加工等により行っている。
【0011】上記薄板12および薄板18としては、純
アルミニウムの他にも、例えばAl−2.5%(重量
%、以下同じ)Mg−0.2%Cr合金、Al−1%M
n合金、Al−0.02%Ni合金、Al−0.005%
B合金等を用いることができる。
【0012】次に、薄板12の上面およびに薄板18の
下面に、例えばポリシング等の機械的研磨を施す(図
3)ことにより、これらの表面上の酸化膜を除去する。
次に、この薄板12上面にフォトレジスト膜13を被
着、露光等することにより所定のパターンのフォトレジ
スト膜13を形成する(図4)。このとき、薄板12上
面でこのレジストプロセスによってレジストが除去され
て露出した部分は変質している可能性がある。
【0013】次に、薄板12の上面でフォトレジスト膜
13が形成されていない部分および薄板18の下面に化
学的研磨を施す(図5)。例えば50〜90℃の温度範
囲で、リン酸20〜60%、硝酸2〜40%に硫酸20
〜60%を添加した液中に、数秒〜数分間浸漬させて行
う。この化学的研磨により、機械的研磨により生じた凸
部を化学的に溶解させ平滑にするものである。
【0014】次に、化学研磨されている面、すなわちフ
ォトレジスト膜13が形成されていない薄板12の上面
および薄板18の下面全面に厚さ5μmのニッケルメッ
キ層14を通常の無電解メッキ法により被着する(図
6)。そして、フォトレジスト膜13を除去することに
より、ニッケルメッキ層14は、薄板12の所定面と薄
板18の下面に形成されるものである(図7)。
【0015】そして、この半導体装置実装用基板に半導
体装置を実装する場合は、例えばダイボンディングとワ
イヤボンディングとを施す。つまり、まずニッケルメッ
キ層14にPb−Sn製のはんだ15を被着する(図
8)。このはんだ15を介して、ICチップ16等を実
装し固定する(図9)。そして、超音波エネルギーを用
いて、ICチップ16等のパッドと上記薄板22の回路
パターンの所定部分とを直径25〜300μmの純度9
9.99%のアルミニウム線17で接続する。さらに、
薄板12、18と同じ材料のヒートシンク19をはんだ
15を介して基板に接合するものである。
【0016】このように化学的研磨してニッケルメッキ
を施した結果、このニッケルメッキ層14のアルミニウ
ム薄板12、18に対する密着不良は生じることなく、
ニッケルメッキ14がもろくなったり、これにピットや
シミ等が発生するこもない。これにより、はんだ15の
ニッケルメッキ層14へののりが良くなり、ICチップ
16やヒートシンク19の接合強度が向上する。したが
って、半導体実装装置用基板の品質が向上する。
【0017】なお、上記実施例にあっては、アルミナ基
板11に薄板18とニッケルメッキ層15とを介しない
で、ヒートシンク19をアルミナ基板11に直接ろう材
を介して接着してもよい。
【0018】
【発明の効果】本発明によれば、アルミニウムまたはア
ルミニウム合金の薄板表面において変質した部分を除去
することができ、この部分にニッケルメッキを施してい
る。この結果、ニッケルメッキの剥離を防止することが
できる。したがって、半導体装置実装用基板の信頼性を
向上させることができる。
【図面の簡単な説明】
【図1】本発明の一実施例に係る半導体装置実装用基板
の製造方法の一工程を示す断面図である。
【図2】本発明の一実施例に係る半導体装置実装用基板
の製造方法の一工程を示す断面図である。
【図3】本発明の一実施例に係る半導体装置実装用基板
の製造方法の一工程を示す断面図である。
【図4】本発明の一実施例に係る半導体装置実装用基板
の製造方法の一工程を示す断面図である。
【図5】本発明の一実施例に係る半導体装置実装用基板
の製造方法の一工程を示す断面図である。
【図6】本発明の一実施例に係る半導体装置実装用基板
の製造方法の一工程を示す断面図である。
【図7】本発明の一実施例に係る半導体装置実装用基板
の製造方法の一工程を示す断面図である。
【図8】本発明の一実施例に係る半導体装置実装用基板
の製造方法の一工程を示す断面図である。
【図9】本発明の一実施例に係る半導体装置実装用基板
の製造方法の一工程を示す断面図である。
【図10】本発明の一実施例に係る半導体装置実装用基
板の製造方法の一工程を示す断面図である。
【図11】従来の半導体装置実装用基板の製造方法の一
工程を示す断面図である。
【図12】従来の半導体装置実装用基板の製造方法の一
工程を示す断面図である。
【図13】従来の半導体装置実装用基板の製造方法の一
工程を示す断面図である。
【図14】従来の半導体装置実装用基板の製造方法の一
工程を示す断面図である。
【図15】従来の半導体装置実装用基板の製造方法の一
工程を示す断面図である。
【図16】従来の半導体装置実装用基板の製造方法の一
工程を示す断面図である。
【図17】従来の半導体装置実装用基板の製造方法の一
工程を示す断面図である。
【符号の説明】
11 アルミナ基板 12 回路形成用薄板 14 ニッケルメッキ層 16 ICチップ 18 ヒートシンク接合用薄板
フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01L 23/12 H05K 3/24

Claims (1)

    (57)【特許請求の範囲】
  1. 【請求項1】 半導体装置が実装されるセラミックス基
    板面にアルミニウムまたはアルミニウム合金の層を形成
    する工程と、 この層の全面に機械的研磨を施す工程と、 この機械的研磨された面に所定パターンのレジストを被
    着する工程と、 このレジストが被着されていない機械研磨面の所定部分
    に化学的研磨を施す工程と、 この所定部分にニッケルメッキ層を形成する工程と、を
    備えたことを特徴とする半導体装置実装用基板の製造方
    法。
JP34916291A 1991-12-06 1991-12-06 半導体装置実装用基板の製造方法 Expired - Lifetime JP2953163B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34916291A JP2953163B2 (ja) 1991-12-06 1991-12-06 半導体装置実装用基板の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34916291A JP2953163B2 (ja) 1991-12-06 1991-12-06 半導体装置実装用基板の製造方法

Publications (2)

Publication Number Publication Date
JPH05160288A JPH05160288A (ja) 1993-06-25
JP2953163B2 true JP2953163B2 (ja) 1999-09-27

Family

ID=18401892

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2953163B2 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8188376B2 (en) 2004-08-17 2012-05-29 Mitsubishi Materials Corporation Insulation substrate, power module substrate, manufacturing method thereof, and power module using the same

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7306748B2 (en) * 2003-04-25 2007-12-11 Saint-Gobain Ceramics & Plastics, Inc. Methods for machining ceramics
JP6152626B2 (ja) * 2012-03-30 2017-06-28 三菱マテリアル株式会社 パワーモジュール用基板の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8188376B2 (en) 2004-08-17 2012-05-29 Mitsubishi Materials Corporation Insulation substrate, power module substrate, manufacturing method thereof, and power module using the same

Also Published As

Publication number Publication date
JPH05160288A (ja) 1993-06-25

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