JP2915963B2 - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor deviceInfo
- Publication number
- JP2915963B2 JP2915963B2 JP11005490A JP11005490A JP2915963B2 JP 2915963 B2 JP2915963 B2 JP 2915963B2 JP 11005490 A JP11005490 A JP 11005490A JP 11005490 A JP11005490 A JP 11005490A JP 2915963 B2 JP2915963 B2 JP 2915963B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- semiconductor device
- semiconductor body
- mask
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Description
【発明の詳細な説明】 ［産業上の利用分野］ 本発明は半導体装置の製造方法に関し、例えば、ガリ
ウム砒素ショットキーバリアダイオード等の半導体装置
の製造方法に適用して有効な技術に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a technique effective when applied to a method of manufacturing a semiconductor device such as a gallium arsenide Schottky barrier diode.
［従来の技術］ 半導体装置として例えばガリウム砒素ショットキーバ
リアダイオードを形成するにあたり、半導体装置を形成
する半導体本体上に酸化シリコン膜等の絶縁膜を形成
し、その絶縁膜に矩形の穴を開け、絶縁膜の残部をマス
クとして半導体本体に凹部を形成し、その凹部にエピタ
キシャル成長により選択的に不純物領域を形成する。こ
の不純物領域形成後の構造（参考までに第２図の破線で
示されている領域）を第３図（Ａ）（第２図III A-III
Aにおける断面図）及び同図（Ｂ）（第２図III B-III B
における断面図）に基づいて説明する。[Related Art] For example, in forming a gallium arsenide Schottky barrier diode as a semiconductor device, an insulating film such as a silicon oxide film is formed on a semiconductor body forming the semiconductor device, and a rectangular hole is formed in the insulating film. A recess is formed in the semiconductor body using the remaining portion of the insulating film as a mask, and an impurity region is selectively formed in the recess by epitaxial growth. The structure after the formation of the impurity regions (regions indicated by broken lines in FIG. 2 for reference) is shown in FIG. 3 (A) (FIG.
A cross section in FIG. A) and FIG.
Will be described with reference to FIG.
半導体本体１の表面に形成した矩形の凹部４に順次N+
領域3b及びＮ領域3aからなるＮ型不純物領域３が形成さ
れており、この不純物領域３の表面は半導体本体１から
膨出し、錐台をなしている。膨出部を除く半導体本体１
の表面は酸化シリコン膜等の絶縁膜２で覆われている。N + is sequentially inserted into rectangular recesses 4 formed on the surface of semiconductor body 1.
An N-type impurity region 3 including a region 3b and an N region 3a is formed, and the surface of the impurity region 3 protrudes from the semiconductor body 1 and forms a frustum. Semiconductor body 1 excluding bulges
Is covered with an insulating film 2 such as a silicon oxide film.
このような半導体装置の製造方法について第２図およ
び第３図を参考にして具体的に説明する。A method for manufacturing such a semiconductor device will be specifically described with reference to FIGS.
半導体装置を形成する表面が（100）面である半導体
本体１上に酸化シリコン膜等を絶縁膜２を形成する。さ
らにその上にホトレジストを塗布し、マスクを用いて露
光、現像する。この際、辺の延びる方向が［011］、［0
1］となるような矩形のマスクパターンを有するマス
クを用いる。次に、ホトレジストの残部をマスクとし
て、エッチングにより絶縁膜２の一部を矩形状に除去す
る。さらに、絶縁膜２の残部をマスクとして、エッチン
グにより半導体本体１に凹部４を形成する。次に、この
凹部４に絶縁膜２の残部をマスクとしてエピタキシャル
成長により選択的にN+領域3b及びＮ領域3aを順次形成す
る。An insulating film 2 such as a silicon oxide film is formed on a semiconductor body 1 having a (100) surface on which a semiconductor device is formed. Further, a photoresist is applied thereon, and is exposed and developed using a mask. At this time, the extending directions of the sides are [011], [0
A mask having a rectangular mask pattern as shown in [1] is used. Next, a part of the insulating film 2 is removed in a rectangular shape by etching using the remaining photoresist as a mask. Further, using the remaining portion of the insulating film 2 as a mask, a concave portion 4 is formed in the semiconductor body 1 by etching. Next, an N + region 3b and an N region 3a are sequentially formed in the recess 4 selectively by epitaxial growth using the remaining portion of the insulating film 2 as a mask.
［発明が解決しようとする課題］ しかし、従来の製造方法により形成された膨出部（錐
台）の周側面と半導体本体１の表面とのなす角度は90度
（第３図（Ａ）参照）あるいは54.7度（第３図（Ｂ）参
照）となり、急峻である。これは、矩形の穴の辺の延び
る方向が［011］、［01］であることに起因する。つ
まり、［011］方向に交差する周側面は結晶学上（011）
面及び（０）面となるので、これら（011）面及び
（０）面と（100）面とのなす角は必然的に結晶学
上90度となる。また、［01］方向に交差する周側面は
結晶学上（11）面及び（１１）面となるので、（10
0）面とのなす角は必然的に結晶学上54.7度となる。[Problem to be Solved by the Invention] However, the angle between the peripheral side surface of the bulging portion (frustum) formed by the conventional manufacturing method and the surface of the semiconductor body 1 is 90 degrees (see FIG. 3A). ) Or 54.7 degrees (see FIG. 3B), which is steep. This is because the directions in which the sides of the rectangular hole extend are [011] and [01]. In other words, the peripheral side surface that intersects the [011] direction is crystallographically (011)
The (011) plane, the (0) plane, and the (100) plane necessarily form an angle of 90 degrees in crystallography. Further, since the peripheral side surfaces intersecting in the [01] direction are (11) and (11) planes in crystallography, (10)
0) The angle between the plane and the plane is inevitably 54.7 degrees in crystallography.
このように、従来技術により製造された半導体装置で
は、周側面の勾配が急であるため、例えば、蒸着により
形成された配線用アルミニウム等に段切れが生じ、それ
によって導通不良が引き起こされ、品質劣化を招くおそ
れがある、という問題が生じる。As described above, in the semiconductor device manufactured by the conventional technique, since the peripheral side surface has a steep gradient, for example, a step break occurs in aluminum for wiring formed by vapor deposition and the like, thereby causing a conduction failure and causing a poor quality. There is a problem that deterioration may be caused.
そこで本発明の主たる目的は、半導体装置本体の表面
に対して、緩やかな勾配の周側面が形成される半導体装
置と、その製造方法を提供することにある。Therefore, a main object of the present invention is to provide a semiconductor device in which a peripheral side surface having a gentle slope is formed with respect to the surface of a semiconductor device main body, and a method of manufacturing the same.
この発明の前記ならびにそのほかの目的と新規な特徴
については、本明細書の記述および添付図面から明らか
になるであろう。The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
［課題を解決するための手段］ 本願において開示される発明のうち代表的なものの概
要を説明すれば、下記のとおりである。[Means for Solving the Problems] The outline of a typical invention among the inventions disclosed in the present application is as follows.
本発明の半導体装置の製造方法は、ガリウム砒素より
なる半導体装置を形成する表面が（100）面である半導
体本体上に、絶縁膜を形成し、該絶縁膜に矩形の穴を開
け、該絶縁膜の残部をマスクとして前記半導体本体に凹
部を形成し、該絶縁膜の残部をマスクとして該凹部にエ
ピタキシャル成長により選択的に不純物領域を形成する
にあたり、前記穴の辺の延びる方向が［010］及び［00
1］になるように前記絶縁膜に穴を開けるようにしたも
のである。According to the method of manufacturing a semiconductor device of the present invention, an insulating film is formed on a semiconductor body having a (100) surface on which a semiconductor device made of gallium arsenide is formed, and a rectangular hole is formed in the insulating film. A recess is formed in the semiconductor body using the remaining portion of the film as a mask, and selectively forming an impurity region by epitaxial growth in the recess using the remaining portion of the insulating film as a mask. [00
1] so that a hole is formed in the insulating film.
［作用］ 本発明の半導体装置の製造方法によれば、辺の延びる
方向が［010］及び［001］となるような矩形のマスクパ
ターンを有するマスクを用いて凹部を形成し、その凹部
にエピタキシャル成長により選択的に不純物領域を形成
するため、請求項１又は２に示す構造の半導体装置を容
易に製造することができる。[Operation] According to the method of manufacturing a semiconductor device of the present invention, a concave portion is formed using a mask having a rectangular mask pattern whose sides extend in a direction of [010] and [001], and epitaxial growth is performed in the concave portion. Accordingly, the impurity region is selectively formed, whereby the semiconductor device having the structure described in claim 1 or 2 can be easily manufactured.
［実施例］ 本発明を適用した一実施例を第１図（Ａ）（第２図I
A-I Aにおける断面図）及び同図（Ｂ）（第２図I B-I B
における断面図）に基づいて説明する。Embodiment An embodiment to which the present invention is applied is shown in FIG.
Cross section of AI A) and (B) (Fig. 2 I BI B
Will be described with reference to FIG.
半導体本体１の表面に形成した矩形の凹部４に順次N+
領域3b及びＮ領域3aからなるＮ型不純物領域３が形成さ
れており、この不純物領域３の表面は半導体本体１から
膨出し、錐台をなしている。この膨出部の全ての周側面
と半導体本体１の表面とが略45度の角度をなしている。
これは、矩形の穴（第２図参照）の辺の延びる方向が
［010］、［001］であることに起因する。つまり、［01
0］方向に交差する周側面は結晶学上（110）面及び（１
０）面となるので、これら（110）面及び（１０）
面と（100）面とのなす角は必然的に結晶学上45度とな
る。また、［001］方向に交差する周側面は結晶学上（1
01）面及び（10）面となるので、（100）面とのなす
角は必然的に結晶学上45度となる。膨出部を除く半導体
本体１の表面は酸化シリコン膜等の絶縁膜２で覆われて
いる。N + is sequentially inserted into rectangular recesses 4 formed on the surface of semiconductor body 1.
An N-type impurity region 3 including a region 3b and an N region 3a is formed, and the surface of the impurity region 3 protrudes from the semiconductor body 1 and forms a frustum. All peripheral side surfaces of the bulging portion and the surface of the semiconductor body 1 form an angle of approximately 45 degrees.
This is because the directions in which the sides of the rectangular hole (see FIG. 2) extend are [010] and [001]. That is, [01
0] direction, the (110) plane and (1)
0) plane, these (110) plane and (10) plane
The angle between the plane and the (100) plane is necessarily 45 degrees in crystallography. In addition, the peripheral side crossing the [001] direction is crystallographically (1
Since the planes are the (01) plane and the (10) plane, the angle between the (100) plane and the (100) plane is necessarily 45 degrees in crystallography. The surface of the semiconductor body 1 excluding the bulge is covered with an insulating film 2 such as a silicon oxide film.
次に、上記半導体装置の製造方法について第２図を参
考にして説明する。Next, a method of manufacturing the semiconductor device will be described with reference to FIG.
半導体装置を形成する表面が（100）面である半導体
本体１上に酸化シリコン膜等の絶縁膜２を形成する。さ
らにその上にホトレジストを塗布し、マスクを用いて露
光、現像する。この際、辺の延びる方向が［010］、［0
01］となるような矩形のマスクパターンを有するマスク
を用いる。次に、ホトレジストの残部をマスクとして、
エッチングにより絶縁膜２の一部を矩形状に除去する。
さらに、絶縁膜２の残部をマスクとして、エッチングに
より半導体本体１に凹部４を形成する。次に、この凹部
４に絶縁膜２の残部をマスクとして選択的にN+領域3b及
びＮ領域3aを順次エピタキシャル成長する。この際、不
純物領域３が半導体本体１の表面より膨出する（盛り上
がる）までエピタキシャル成長させれば、第１図（Ａ）
及び（Ｂ）に示すような構造が得られる。そして、第１
図（Ａ）及び（Ｂ）に示す構造が得られたなら、例えば
N+領域3bを一部露出させ、N+領域3b及びＮ領域3aに電極
（図示せず）を取り付ける等によってプレーナ型のショ
ットキーバリアダイオードが得られる。An insulating film 2 such as a silicon oxide film is formed on a semiconductor body 1 having a (100) surface on which a semiconductor device is formed. Further, a photoresist is applied thereon, and is exposed and developed using a mask. At this time, the extending directions of the sides are [010], [0
[01] is used. Next, using the rest of the photoresist as a mask,
A part of the insulating film 2 is removed in a rectangular shape by etching.
Further, using the remaining portion of the insulating film 2 as a mask, a concave portion 4 is formed in the semiconductor body 1 by etching. Next, the N + region 3b and the N region 3a are selectively epitaxially grown sequentially in the concave portion 4 using the remaining portion of the insulating film 2 as a mask. At this time, if epitaxial growth is performed until the impurity region 3 swells (bulges) from the surface of the semiconductor body 1, FIG.
And a structure as shown in FIG. And the first
If the structure shown in FIGS. (A) and (B) is obtained, for example,
N + region 3b was partially exposed, N + region (not shown) 3b and N region 3a in electrode planar Schottky barrier diode obtained by the mounting or the like.
以上説明したように、本実施例によれば、半導体本体
１より膨出する錐台状の膨出部の全ての周側面が半導体
本体１の表面に対し最も緩やかな勾配をなしているた
め、膨出部の上面から半導体本体１の表面に亘って、そ
の上に配線用アルミニウム等を例えば蒸着により形成し
た際に、周側面の勾配が急峻である場合に発生しやすい
段切れを抑止でき、ひいては品質の向上につながる、と
いう効果が得られる。また、辺の延びる方向が［01
0］、［001］となるような矩形のマスクパターンを有す
るマスクを用いて凹部４を形成し、その凹部４にエピタ
キシャル成長により選択的に不純物領域３を形成するた
め、本実施例に示す構造の半導体装置を容易に製造する
ことができる。As described above, according to the present embodiment, all the peripheral side surfaces of the frustum-shaped bulging portion bulging out of the semiconductor main body 1 have the gentlest gradient with respect to the surface of the semiconductor main body 1. When aluminum for wiring or the like is formed on the surface of the semiconductor body 1 by, for example, vapor deposition from the upper surface of the bulging portion to the surface of the semiconductor body 1, it is possible to suppress a disconnection that is likely to occur when the gradient of the peripheral side surface is steep, As a result, the effect of improving the quality can be obtained. The direction in which the side extends is [01
0] and [001], the recess 4 is formed using a mask having a rectangular mask pattern, and the impurity region 3 is selectively formed in the recess 4 by epitaxial growth. A semiconductor device can be easily manufactured.
以上本発明者によってなされた発明を実施例に基づき
具体的に説明したが、本発明は上記実施例に限定される
ものではなく、その要旨を逸脱しない範囲で種々変更可
能であることはいうまでもない。例えば、不純物領域３
形成のためのエピタキシャル成長を半導体本体１の表面
と面一となった時点で停止しても良い。また、不純物領
域がP+領域及びＰ領域からなるＰ型不純物領域として構
成されていても良い。Although the invention made by the inventor has been specifically described based on the embodiments, the present invention is not limited to the above-described embodiments, and various changes can be made without departing from the gist of the invention. Nor. For example, the impurity region 3
The epitaxial growth for formation may be stopped when it becomes flush with the surface of the semiconductor body 1. Further, the impurity region may be configured as a P-type impurity region including a P + region and a P region.
以上の説明では主として本発明者によってなされた発
明をその背景となった利用分野であるガリウム砒素ショ
ットキーバリアダイオード及びその製造技術について説
明したが、それに限定されるものではなく、一般に、半
導体装置及びその製造技術に利用できる。In the above description, the gallium arsenide Schottky barrier diode and the manufacturing technique thereof, which are the fields of application that have been the background of the invention made by the present inventor, have been described. However, the present invention is not limited thereto. Available for its manufacturing technology.
［発明の効果］ 本願において開示される発明のうち代表的なものによ
って得られる効果を簡単に説明すれば下記のとおりであ
る。[Effects of the Invention] The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows.
本発明の半導体装置の製造方法によれば、ガリウム砒
素よりなる半導体装置を形成する表面が（100）面であ
る半導体本体上に、絶縁膜を形成し、該絶縁膜に矩形の
穴を開け、該絶縁膜の残部をマスクとして前記半導体本
体に凹部を形成し、該絶縁膜の残部をマスクとして該凹
部にエピタキシャル成長により選択的に不純物領域を形
成するにあたり、前記穴の辺の延びる方向が［010］及
び［001］になるように前記絶縁膜に穴を開けるように
したため、請求項１又は２記載の構造の半導体装置を容
易に製造することができる。According to the method of manufacturing a semiconductor device of the present invention, an insulating film is formed on a semiconductor body having a (100) surface on which a semiconductor device made of gallium arsenide is formed, and a rectangular hole is formed in the insulating film. A recess is formed in the semiconductor body using the remaining portion of the insulating film as a mask, and an impurity region is selectively formed by epitaxial growth in the recess using the remaining portion of the insulating film as a mask. ] And [001], a hole is formed in the insulating film, so that the semiconductor device having the structure described in claim 1 or 2 can be easily manufactured.
第１図（Ａ）及び（Ｂ）は本発明の実施例の半導体装置
の製造途中の断面図、 第２図は本発明の実施例の半導体装置における不純物領
域形成後の平面図、 第３図（Ａ）及び（Ｂ）は従来の技術による半導体装置
の製造途中の断面図である。 １……半導体本体、２……絶縁膜、３……不純物領域、
４……凹部。1 (A) and 1 (B) are cross-sectional views of a semiconductor device according to an embodiment of the present invention during manufacture, FIG. 2 is a plan view of the semiconductor device according to the embodiment of the present invention after formation of an impurity region, and FIG. 7A and 7B are cross-sectional views of a semiconductor device according to a conventional technique during manufacturing. 1 ... semiconductor body, 2 ... insulating film, 3 ... impurity region,
4 ... recess.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 竹本 菊郎 兵庫県伊丹市昆陽北１丁目１番１号 住 友電気工業株式会社内 (72)発明者 松島 彰 兵庫県伊丹市昆陽北１丁目１番１号 住 友電気工業株式会社内 (56)参考文献 実開 昭58−18356（ＪＰ，Ｕ) (58)調査した分野(Int.Cl.6，ＤＢ名) H01L 29/872 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Kikuro Takemoto 1-1-1, Koyokita, Itami-shi, Hyogo Sumitomo Electric Industries, Ltd. No. 1 within Sumitomo Electric Industries, Ltd. (56) References: Japanese Utility Model Reference Sho 58-18356 (JP, U) (58) Field surveyed (Int. Cl. 6 , DB name) H01L 29/872
Claims (1)
る表面が（100）面である半導体本体上に、絶縁膜を形
成し、該絶縁膜に矩形の穴を開け、該絶縁膜の残部をマ
スクとして前記半導体本体に凹部を形成し、該絶縁膜の
残部をマスクとして該凹部にエピタキシャル成長により
選択的に不純物領域を形成するにあたり、前記穴の辺の
延びる方向が［010］及び［001］になるように前記絶縁
膜に穴を開けるようにしたことを特徴とする半導体装置
の製造方法。An insulating film is formed on a semiconductor body having a (100) surface on which a semiconductor device made of gallium arsenide is formed, and a rectangular hole is formed in the insulating film, and the remaining portion of the insulating film is masked. When a concave portion is formed in the semiconductor body and an impurity region is selectively formed by epitaxial growth in the concave portion using the remaining portion of the insulating film as a mask, the directions in which the sides of the hole extend become [010] and [001]. Wherein a hole is formed in the insulating film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11005490A JP2915963B2 (en) | 1990-04-27 | 1990-04-27 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11005490A JP2915963B2 (en) | 1990-04-27 | 1990-04-27 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0410573A JPH0410573A (en) | 1992-01-14 |
| JP2915963B2 true JP2915963B2 (en) | 1999-07-05 |
Family
ID=14525924
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11005490A Expired - Lifetime JP2915963B2 (en) | 1990-04-27 | 1990-04-27 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2915963B2 (en) |
-
1990
- 1990-04-27 JP JP11005490A patent/JP2915963B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0410573A (en) | 1992-01-14 |
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