JP2872548B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device which enables a thin package and a package having a three-dimensional connection structure to be thinly connected.

[0002]

2. Description of the Related Art Generally, TAB (Tape Automated Bonding)
A package is a type of surface mount package technology in which metal bumps are used to bond large-scale integrated circuits (hereinafter, LSI) on a metal tape. As the metal tape, a pattern of copper Cu functioning as a lead frame and a wire is mainly used. Compared to conventional wire bonding,
TAB can be said to be a more advanced connection technology because it can directly bond an LSI to a lead frame.

In recent years, in order to satisfy the demands of users,
Increasingly high functionality, large capacity, small size,
In addition, thinning has been demanded. Accordingly, in response to this, multi-function, multi-pin, high-speed, high-reliability, and surface-mount type semiconductor LSIs have been developed.

Due to this trend, semiconductor packages have been developed with a focus on thinner packages and finer spacing of external leads, and in order to satisfy such requirements, a thin quad flat (TQF) has been developed. Package, TSO (Thin Small Outline) Package, and T
AB package is starting to catch the spotlight.

[0005] The TQF package and the TSO package among them can be manufactured by using an existing package assembling process. However, the TAB package needs to secure various technologies for a bump forming process, and investment by this is prior. In recent years, he has devoted himself to bump formation technology.

Unlike the existing wire bonding, the bump is a metal protrusion that enables connection between a pad of a semiconductor chip and a lead frame of a TAB package without using a wire, and is the same as a wire in wire bonding. Play an important role.

Further, research on the surface mounting type package technology is generally induced by the tendency of increasing the number of pins, thinning, reducing the board area, and increasing the mounting density with the increase of the input / output terminals of the semiconductor chip. It is being actively promoted in order to respond to typical changes in packaging technology.

The following three methods are known as examples of connection techniques used for conventional thin packages and packages having a three-dimensional connection structure. (The corresponding literature is
ISHM92 Proceedings “3D Stacking of TSOP Plastic Packag
es) ", pp. 370-375, and" Development of S
older Bump Fabrication in Multichip Modules) "3
15-316, 1991, Japan and "Development of Automatic High-Densit
y Solder BallMounter) ”on page 93, with Japan. The first method is a method of designing an internal circuit on a semiconductor chip and then forming a wire bonding terminal on one side surface of the wafer with a metal wire by using a wafer assembling technique.

The second method is to form a wire bonding terminal after attaching a bumped semiconductor chip to a film carrier using an area TAB package.

A third method is to attach a semiconductor chip to a film carrier and then wire bond the semiconductor chip.
This is a method in which semiconductor chips are stacked, the outer shell is molded, and the end faces are cut to form wire bonding terminals.

The first method will be described in more detail. This method includes a deposition step, a photolithography step, and an etching step for forming a metal projection on a semiconductor chip pad located at an end of a semiconductor chip. In this method, a terminal is pulled out to a desired portion of a semiconductor chip through a process.

In the second method, the range TAB package is connected to bumps located on pads formed on four sides of the semiconductor chip. In the TAB package according to this technique, an internal pattern is formed on one desired surface, and this internal pattern is connected to an external terminal.

In the third method, after the semiconductor chip is attached on the tape, wire bonding is performed. After bonding such a unit using epoxy as an adhesive, the whole is sealed by a technique such as potting or molding. Then, the wire bonding portion is cut by a diamond blade device to form a terminal.

However, in the above-mentioned conventional method of manufacturing a semiconductor device, since all use a photolithography process and a tape carrier, there is a problem that the manufacturing process is complicated and equipment investment and manufacturing cost are increased. .

[0015]

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a semiconductor device having a simple manufacturing process and capable of keeping capital investment and manufacturing costs low, and a method of manufacturing the same.

[0016]

According to the present invention, there is provided a method of manufacturing a semiconductor device for forming a bump electrode, comprising the steps of: forming an electrode pad and a surface protective film on a semiconductor substrate; Removing the surface protection film and exposing the electrode pads to form openings; forming a barrier metal layer for forming bump electrodes on the exposed electrode pads; Forming a solder bump electrode on the electrode pad by arranging a solder ball on the barrier metal layer using the first metal mask pattern while the semiconductor substrate is positioned on the magnet. In this state, a conductive paste is applied between the solder bump electrodes using a second metal mask pattern on the semiconductor substrate on which the solder bump electrodes are formed, thereby distributing the elements between the elements. Forming a pattern and forming a protective layer sealed with a molding resin to protect the surface of the semiconductor substrate and the solder bump electrodes formed on the electrode pads and the wiring pattern between the solder bump electrodes; And a step of performing.

In a semiconductor device in which a bump electrode is formed using a metal mask, the semiconductor device includes an electrode pad formed in a predetermined region on a semiconductor substrate, and a first metal mask formed on the electrode pad. A solder bump electrode formed by injecting a solder ball through the pattern, and a metal formed on a scribe line between two semiconductor chips after applying a conductive paste between the solder bump electrodes using a second metal mask pattern. The semiconductor device includes a wiring pattern and a protective layer for protecting an upper portion of the semiconductor substrate, and is laminated on a three-dimensional structure by being adhered up / down with epoxy respectively.

[0018]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a semiconductor device manufacturing method according to an embodiment of the present invention; In the drawings, the same parts are denoted by the same reference numerals.

FIGS. 1 and 2 are process flow charts for explaining a method of manufacturing a semiconductor device for forming a bump electrode as an embodiment according to the present invention.

First, as shown in FIG. 1A, an electrode pad 3 is formed on a predetermined portion of an upper portion of a semiconductor wafer 1.
The electrode pad 3 is formed by forming a metal layer such as aluminum Al or an aluminum alloy on the surface of the semiconductor wafer 1 and then forming a pattern by etching. A surface protection film 5 is applied on the semiconductor wafer 1 and the electrode pads 3. The semiconductor wafer 1 may be a semiconductor chip cut one by one. Next, after applying a photoresist on the surface protective film 5, a pattern is formed by a usual lithography method. Subsequently, the surface protection film 5 is removed by a normal etching process using the photoresist pattern as a mask, thereby exposing the electrode pads 3. Subsequently,
The photoresist pattern is removed. The opening 7 is formed on the electrode pad 3 by such a process.

After the semiconductor wafer 1 on which the electrode pads 3 are formed is washed with water from which ions have been removed, that is, pure water, the oxide film layer of the electrode pads 3 is cleaned with hydrofluoric acid H.
Remove with F.

Next, for a plating step, a mixed solution of palladium chloride PdCl ₂ powder dissolved in HCl solution is allowed to act on the semiconductor wafer 1 to form an activation layer on the electrode pads 3. Here, the palladium Pd
Is activated, for example, by an aqueous solution of palladium chloride 1
For 6 seconds at room temperature, a mixed solution obtained by mixing 00 mg / liter and 1 ml / liter of an aqueous hydrochloric acid solution is used.

After exposing the electrode pads 3 as shown in FIG. 1 (a), as shown in FIG. 1 (b), in order to form bumps on the electrode pads 3 of the semiconductor wafer 1, an electroless plating method is used. Is plated on the electrode pads 3 to form the barrier metal layer 9. At this time, annealing is performed to increase the strength. Thus, the barrier metal layer 9 is formed so as to protrude into the opening 7 of the surface protection film 5.

After forming the barrier metal layer as shown in FIG. 1B, the solder bump 17 is formed as shown in FIG.
As shown in FIG. 1 (c) and FIG. 1 (d), the solder ball 15 is raised above the barrier metal layer 9 formed on the electrode pad 3, and first, a surface cleaning agent flux is applied onto the semiconductor wafer 1. Heat treatment at about 90 ° C. for 20 minutes.

Next, after the semiconductor wafer 1 is positioned on the magnet 11, an opening is formed in a predetermined pattern and a window is opened corresponding to the pattern of the barrier metal layer 9. Metal mask 1 for use
3 is adjusted so that the opening portion of the mask is located on the electrode pad 3.

Next, the separately prepared brazing ball 15 is rolled and placed on the electrode pad 3 of the semiconductor wafer 1, and is reflowed to form the spherical brazing bump 1 on the electrode pad 3.
7 is formed. Subsequently, the flux applied on the semiconductor wafer 1 is removed by cleaning. The flux serves to catalytically promote the chemical reaction in the chemical reaction. Flux must be present during the formation of the bond between the metals, but once bonded, the flux must be removed to remove any remaining flux at the binding site since it is no longer needed. Also, in most cases, the flux must be removed to maintain the integrity of the braze joint and prevent it from being chemically weakened. In addition, the flux residues are inert and must be removed from the surface because they will be solidified or remain active.

Thus, after removing the flux,
As shown in FIGS. 2A and 2B, the semiconductor wafer 1 having the solder bumps 17 formed on the electrode pads 3 is positioned on the magnet 11 again. In particular, the second metal mask 19 for the patterned wiring pattern is aligned, and the opening of the mask is positioned so as to correspond to the upper part of the solder bump 17 formed on the electrode pad 3 of the semiconductor wafer 1. Let it.

Subsequently, a wiring pattern is printed on the wax bumps 17 by a screen printing method using a conductive paste 21 for conductive bonding, for example, a silver paste conductive ink, on the wax bumps 17 as in the case of printing of a copy plate, and dried, and then hardened. Let it. Here, the applied conductive paste 2
1 forms an input / output terminal. The conductor paste 21 or the conductor ink is a paste for printing a conductor pattern, that is, a wiring pattern of bumps between elements.

After forming the wiring pattern in this manner,
As shown in FIG. 2 (b), in order to protect the solder bumps 17 formed on the surface of the semiconductor wafer 1 and the electrode pads 3 and the wiring pattern between the solder bumps 17, it is sealed with a polyimide resin which is a molding resin. The protection layer 23 to be stopped is formed, and the assembly of the semiconductor wafer 1 is completed. FIG.
Indicates a state in which the chip thus assembled is cut along the scribe line.

The method of forming a bump electrode on the semiconductor wafer 1 through the above-described steps employs an existing photolithography step or a method using two metal mask openings which are not expensive, such as sputtering and electroplating. doing.

FIG. 3 is a plan view of the semiconductor wafer 1 after the step of FIG. A wiring pattern is formed on a scribe line 25 between the two semiconductor chips.

FIG. 5 is a diagram in which a large number of semiconductor chips 27 formed as described above are laminated using an adhesive epoxy 29, and a wiring pattern printed by the conductive paste 21 is formed by a vacuum technique which is usually used. The semiconductor device manufacturing process according to the present invention is completed by forming a stacked semiconductor package having a three-dimensional connection structure by holding the semiconductor device and connecting it to the vertical metal pattern 31.

As described above, according to the present invention, in a method of manufacturing a semiconductor device for forming bumps and wiring patterns to form a thin package and a three-dimensional connection package, a photolithography method used in a conventional wafer assembly process. Use the openings of two metal masks for bump formation and wiring pattern formation without using a lithography process, sputtering method or tape carrier. The input / output terminals are made.

It goes without saying that various changes can be made without departing from the technical idea of the present invention.

[0035]

Therefore, in the method of manufacturing a semiconductor device according to the present invention, a bump as a terminal is formed on a semiconductor chip using a metal mask without using an expensive process such as photolithography. Since the wiring pattern between the elements is formed, there is an advantage that the manufacturing cost of the semiconductor device can be reduced and the capital investment can be minimized.

[Brief description of the drawings]

FIGS. 1 (a) to 1 (d) are the first half of a process sequence diagram for explaining a method of manufacturing a semiconductor device for forming a bump electrode according to an embodiment of the present invention.

FIGS. 2 (a) to 2 (c) are the latter half of a process sequence diagram for explaining a method of manufacturing a semiconductor device for forming a bump electrode according to an embodiment of the present invention.

FIG. 3 is a plan view of the semiconductor wafer after the step of FIG. 2 (b).

FIG. 4 is a perspective view of a semiconductor device showing a structure obtained as a result of all the steps in FIGS. 1 and 2;

FIG. 5 is a perspective view of a stacked semiconductor device having a three-dimensional structure according to the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 3 electrode pad 5 surface protection film 7 opening 9 barrier metal layer 11 magnet 13 first metal mask 15 solder ball 17 solder bump electrode 19 second metal mask 21 conductor paste 23 protection layer

Claims (11)

(57) [Claims] 1. A method of manufacturing a semiconductor device for forming a bump electrode, comprising: forming an electrode pad and a surface protection film on a semiconductor substrate; removing the surface protection film to expose the electrode pad; Forming a barrier metal layer for forming a bump electrode on the exposed electrode pad; and using a first metal mask pattern with the semiconductor substrate positioned on a magnet. Forming a solder bump electrode on the electrode pad by disposing a solder ball on top of the barrier metal layer; and forming a solder bump electrode on the semiconductor substrate on which the solder bump electrode is formed while the semiconductor substrate is again positioned on the magnet. (2) forming a wiring pattern between the elements by applying a conductive paste between the bump electrodes using a metal mask pattern; Forming a protective layer that is sealed with a molding resin to protect the solder bump electrodes formed on the electrode pads and the wiring patterns between the solder bump electrodes. Manufacturing method. 2. The method according to claim 1, wherein the semiconductor substrate is in a wafer state. 3. The step of forming the electrode pad includes forming a metal layer such as aluminum Al or an aluminum alloy on the surface of the semiconductor substrate and then patterning the layer by etching. A method for manufacturing a semiconductor device according to claim 1. 4. The method according to claim 1, wherein a step of removing an oxide film layer of the electrode pad using hydrofluoric acid HF is performed before forming the barrier metal layer. 5. An active layer is formed on an electrode pad using a mixed solution of palladium chloride PdCl ₂ powder in a hydrochloric acid HCl solution for a plating process before forming the barrier metal layer. 2. The method of manufacturing a semiconductor device according to claim 1, wherein 6. The method according to claim 1, wherein the barrier metal layer is formed by plating nickel Ni by an electroless plating method. 7. The method according to claim 5, wherein the barrier metal layer is formed so as to protrude into an opening of the surface protection film. 8. A flux is applied to the semiconductor wafer before the semiconductor substrate is positioned on the magnet.
2. The method according to claim 1, wherein the heat treatment is performed at 20 [deg.] C. for 20 minutes. 9. The method of forming a solder bump according to claim 1, wherein the solder ball formed in the opening of the first metal mask is rolled and positioned on a pad of the electrode to form a spherical solder bump. The method for manufacturing a semiconductor device according to claim 1. 10. The method according to claim 1, wherein the step of forming the wiring pattern between the elements is performed by a screen printing method. 11. The semiconductor device according to claim 10, wherein the wiring pattern between the elements is formed of one substance arbitrarily selected from the group consisting of a conductive paste for bonding conductive wires and a conductive ink. Manufacturing method.