JP2836371B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device having a buried layer of a contact hole made of a silicon film containing impurities and a method of manufacturing the same.

[0002]

2. Description of the Related Art Heretofore, as a buried layer of a contact hole provided at a predetermined position on a semiconductor substrate, there has been known a material made of an alloy such as tungsten silicide. As a method of forming a buried layer using this alloy as a material, a sufficient amount of alloy to fill a contact hole is deposited on a semiconductor device by using a sputtering method, and then this alloy is formed by using a dry etching technique. It is formed by leaving the buried layer in the inner contact hole and removing the other.

There has also been a semiconductor device in which one type of silicon film containing impurities is buried in a contact hole to form a buried layer. An example of this forming method will be described below. First, a polycrystalline silicon film is formed by a low pressure CVD method, an impurity such as phosphorus is implanted into the film by an ion implantation method, and then a heat treatment is performed to reduce the resistivity of the polycrystalline silicon film. After diffusion, the same etching was performed in the case of the above alloy, leaving a buried layer.

As another method for forming a contact hole buried layer made of one kind of silicon film containing impurities, a low pressure CVD method using phosphine as a doping gas and either silane or disilane as a film forming gas is used. After forming a silicon film doped with phosphorus during the film formation, heat treatment and etching other than the inside of the contact hole are performed to form a buried layer having a low resistivity.

[0005]

When the above-mentioned method is used for a contact hole having a high aspect ratio (that is, a small opening and a deep shape) in recent years, various problems have occurred. For example, in the sputtering method, there is a problem that the tungsten silicide molecules adhere to the upper portion of the side surface of the contact hole first and the opening portion is closed. Therefore, it becomes difficult to completely fill the inside of the contact hole as the aspect ratio becomes higher. Regarding the method of performing thermal diffusion after implanting impurities by ion implantation, since it is difficult to control the amount of impurities implanted in the depth direction of a high-aspect-ratio contact hole, impurities are diffused into the deep contact hole. In order to perform this, a process of film formation → injection → thermal diffusion must be performed a plurality of times, and there is a problem that the number of process steps increases. Next, in the case of a buried layer formed by a CVD technique using only silane as a film forming gas and phosphine as a doping gas, the growth temperature during film formation is 570 ° C. or higher in order to obtain a growth rate according to mass production. is necessary. However, the silicon film containing impurities grown at this temperature has a high resistivity due to small crystal grains even after the heat treatment, and there is a problem that a thin film having a thickness of 1000 angstroms or less has a particularly high resistivity. For this reason, a buried layer of a contact hole formed using silane as a film-forming gas has an excessively high plug resistance when used for a contact hole with a small opening diameter in recent years, and is difficult to apply to a semiconductor device. Was.

In the case of a buried layer formed by a CVD technique using disilane as a film forming gas and phosphine as a doping gas, unlike the case of forming a film using a silane gas as described above, the formation at a relatively low temperature of about 490 ° C. A film can be formed, so that the crystal diameter after the heat treatment becomes large, and a low-resistance film can be formed. Also, there is almost no problem that a thin film has a high resistivity. However, this membrane
Due to the property of poor step coverage, a film is formed using disilane as a gas and phosphine as a doping gas for the purpose of forming a buried layer for a contact hole having a small opening diameter, as shown in FIG. A void 22 is generated at the center of the buried layer of the silicon film 23 in the contact hole formed in the film 13, and this void remains even in the product stage, resulting in an increase in contact hole resistance or disconnection. There has been a problem that the reliability of the semiconductor device is reduced.

[0007]

SUMMARY OF THE INVENTION The present invention solves the above problems.
Semiconductor device having a predetermined contact hole
A silicon film containing impurities is grown on the
In the process of filling the hole,
After growing the first silicon film having large crystal grains, the silane
Growing a second silicon film having small crystal grains by using
Semiconductor device characterized by burying a contact hole
A method of manufacturing the device is provided.

In the method of manufacturing a semiconductor device according to the present invention, the step of filling a contact hole includes the step of growing a silicon film containing an impurity using a first gas system and the step of growing an impurity-containing silicon film using a second gas system. May be provided between the step of growing the silicon film containing the heat treatment.

[0009]

1 is a sectional view of a semiconductor device according to one embodiment of the present invention. This contact hole is formed by the following manufacturing method.

First, a diffusion layer 12 is selectively formed on a semiconductor substrate 11 by ion implantation using a photoresist as a mask. Next, an interlayer film 13 of a silicon oxide film is formed to a thickness of 1 μm by a low pressure CVD method. A photoresist is applied to the surface of the interlayer film, and a contact pattern is formed at a predetermined position by lithography technology.
A contact hole 14 is formed therein, and the photoresist is removed. FIG. 3 is a sectional view showing the state up to this step.

According to the present invention, there is provided a structure having two layers of silicon films having different crystallinities containing impurities in contact holes provided at predetermined positions on a semiconductor substrate, for example, the contact holes of FIG. There is a feature in the film forming method. The structure in the contact hole and the embedding method will be described below.

FIG. 2A is a film forming condition table showing one embodiment of the film forming according to the present invention. In FIG. 2A, the horizontal axis indicates the time from the start of growth, and the vertical axis indicates the flow rates of the film forming gas and the doping gas on the left side, and the furnace temperature on the right side.

The growth is first performed using disilane as a film forming gas and phosphine as a doping gas. The phosphine used was diluted to 1% with helium. The furnace temperature during film formation is about 490 ° C., and the furnace pressure is about 0.25 Torr. The gas flow rate is disilane 100
A film is formed at a time of t1 with a sccm and a diluted phosphine of 80 sccm. FIG. 4A is a cross-sectional view of the semiconductor device at the time t1 in each process. The first contact hole 21 and the surface of the interlayer film 13
Silicon film 14 is formed of. t1 is the first silicon
It is assumed that the time when the film 14 has grown by about 100 angstroms. At the time t1, the supply of the reaction gas is stopped once,
Raise the furnace temperature to 570 ° C and stabilize it. After the stable time t2, silane is used as a deposition gas. The furnace pressure was raised to 0.60 Torr and the flow rate of silane was 800 s.
Film formation is performed until the target film thickness is reached at ccm and a flow rate of phosphine of 120 sccm, where the second silicon film 12 is formed. FIG. 4B is a cross-sectional view of each step at the time when the second film formation is completed. At this point, since the first and second silicon films remain in portions other than the contact hole portion, the entire surface is next etched back using a dry etching technique. The first and second silicon films other than the contact hole portion are removed by the etch-back process to form a buried layer 16 of the contact. FIG. 5 shows a cross-sectional view of the process at this point. After this, after performing nitrogen annealing, a metal such as aluminum is deposited using a sputtering method,
The wiring layer 17 is formed by using a lithography technique, a dry etching technique, or the like, and a semiconductor device according to an embodiment of the present invention is completed. FIG. 1 shows a cross-sectional view of the completed semiconductor device.

The two-layer film of silicon containing phosphorus as an impurity formed by this method can realize low-temperature film formation having a large crystal diameter only at the initial stage of growth, so that excellent step coverage of a film using silane as a film formation gas is obtained. And low resistance in a thin film formed by film formation using disilane as a film formation gas. As a result of actually forming a film by this method,
No void was generated even for a contact hole having an aspect ratio of 5 and a coating diameter of 0.2 μm and a depth of 1 μm.

The contact resistance (including the plug resistance) of the semiconductor device manufactured in this embodiment was as low as about 800Ω even for a contact having a diameter of 0.2 μm and a depth of 1 μm. As for the resistivity, a good value of 800 μm · cm was obtained even with a thin film of 500 Å.

FIG. 2B is a film forming condition table showing another embodiment of the film forming method according to the present invention. The horizontal axis and vertical axis in the figure are the same as those in FIG. First deposition gas disilane is identical conditions as an example of the film formation, is a film formation using 1% phosphine as doping gas, at t ₃ when the film thickness in this embodiment becomes about 150 Å Suspend the supply of the reaction gas. FIG. 4A is a cross-sectional view of each process at t ₃ . Next, nitrogen is fed into the furnace to atmospheric pressure, then the furnace temperature is raised to 620 ° C., and after stabilization, annealing is performed in a furnace in which nitrogen flows for about one hour.
After the annealing, the temperature of the furnace is lowered to 570 ° C. by natural cooling and stabilized. The time at the time of stabilization is defined as t ₄ . t ₄
FIG. 4B is a cross-sectional view of the process in FIG. t ₄ later performs film formation using deposition gas to silane until the film thickness of the target under the same conditions as an example, a 1% phosphine as doping gas. Thereafter, nitrogen annealing is performed in the same manner as in the first embodiment, Al or the like is deposited by sputtering, and the wiring layer 1 is formed using lithography and dry etching.
7 is formed.

The silicon film containing phosphorus as an impurity obtained by the above method has excellent step coverage by film formation using silane as a film formation gas and low resistance in a thin film formed by film formation using disilane as a film formation gas. Has sex. Furthermore, as compared with the embodiment, the crystallinity of the film obtained in the initial stage of growth is increased and stabilized, so that a film having lower resistance can be obtained. As a result of film formation by this method, no void was generated even in a contact hole having an aspect ratio of 5 and a coating diameter of 0.2 μm and a depth of 1 μm, and good embedding property was confirmed.

The contact resistance (including the plug resistance) of the semiconductor device manufactured by the method of another embodiment is about 5 even for a contact having a diameter of 0.2 μm and a depth of 1 μm.
A value as low as 00Ω was obtained.

The film thickness (first silicon film + silicon film) obtained by performing nitrogen annealing after film formation at 750 ° C. for 1 hour
FIG. 7 shows the relationship between the second silicon film) and the specific resistance. As can be seen from FIG. 7, the overall resistivity is lower than that of the embodiment, and even with a thin film of 500 Å, 600 to
A low resistance value of 650 μΩ · cm was obtained.

[0020]

As described above, the present invention provides a
In semiconductor devices with tact holes, silicon
Step of growing a contact film and filling the contact hole
In the first step, the first silicon particles having large crystal grains are formed using disilane.
After growing the capacitor film, the silane
Grow the second silicon film and fill the contact hole
Film with excellent step coverage and low resistivity
Can be formed.

[0021]

Alternatively, of the two stages of film formation, the first stage
If heat treatment is performed immediately after film formation on the floor, excellent step coverage
There is also an effect that a film having even lower resistivity can be formed.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention.

FIG. 2 (a) is a film forming condition diagram of one embodiment of the present invention,
(B) is a film forming condition diagram of one embodiment of the present invention.

FIG. 3 is a sectional view (1) of each step of the embodiment of the present invention.

4A is a sectional view (2) of an embodiment of the present invention, and FIG. 4B is a sectional view of an embodiment of the present invention.

FIG. 5 is a cross-sectional view of another embodiment of the present invention, step by step (part 4).

FIG. 6 is a cross-sectional view of a conventional contact hole having a void.

FIG. 7 is a diagram showing the film thickness dependence of the specific resistance of the film grown in the example of the present invention and the film grown only by one of silane and disilane.

[Explanation of symbols]

 Reference Signs List 11 semiconductor substrate 12 diffusion layer 13 interlayer film 14 first silicon film 15 second silicon film 16 buried layer 17 wiring layer 21 contact hole 22 void 23 silicon film formed by disilane

Claims (2)

(57) [Claims] 1. A semiconductor device having a predetermined contact hole.
A silicon film containing impurities is grown on the
In the process of filling the hole,
After growing the first silicon film having large crystal grains, the silane
Growing a second silicon film having small crystal grains by using
Semiconductor device characterized by burying a contact hole
Manufacturing method of the device. 2. The step of burying the contact hole,
The first silicon film having large crystal grains using disilane
Growing the crystal grains using silane
A heat treatment step is included during the step of growing the second silicon film.
2. The manufacturing of a semiconductor device according to claim 1, wherein
Construction method.