JPH0685081A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To form an bedding layer having a low resistivity and an excellent coverability for level difference by forming a silicon film with two layers of silicon films having different crystalinities when the bedding layer of a contact hole is formed with a silicon film containing impurities. CONSTITUTION:After forming a diffusion layer 12 selectively by using a photoresist as mask on a semiconductor substrate 11, an interlayer film 13 of a silicon oxide film is formed. Then, photoresist is applied to the surface of this interlayer film 13, a contact pattern is formed at a predetermined position, and a contact hole is formed in the interlayer film 13 using said pattern as mask. Then, first and second silicon films 14 and 15 are sequentially formed inside the contact hole and on the surface of the interlayer film 13, etchback is applied to the whole surface, the silicon films 14 and 15 other than the contact hole are removed, and an embedding layer 16 of contact are formed. Thereafter, a metal such as aluminum is adhered and a wiring layer 17 is formed by using dry etching technique and then a desired semiconductor device is completed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a semiconductor device having a contact hole filling layer made of a silicon film containing impurities and a method for manufacturing the same.

[0002]

2. Description of the Related Art Heretofore, as a buried layer for a contact hole provided at a predetermined position on a semiconductor substrate, there has been one made of an alloy such as tungsten silicide as a material. As a method of forming a buried layer using this alloy as a material, a sufficient amount of an alloy for filling a contact hole is deposited on a semiconductor device by using a sputtering method, and then this alloy is dried by using a dry etching technique. It was formed by leaving the buried layer in the inner contact hole and removing the rest.

In some semiconductor devices, a contact layer is filled with one type of silicon film containing impurities to form a buried layer. An example of this forming method will be described below. First, a polycrystalline silicon film is formed by a low pressure CVD method, impurities such as phosphorus are implanted into this film by an ion implantation method, and then a heat treatment is performed to reduce the resistivity of the polycrystalline silicon film to remove impurities. After the diffusion, the same etching was carried out in the case of the above alloy, and the buried layer was left.

As another method of forming a contact hole burying layer formed of one type of silicon film containing impurities, a low pressure CVD method using phosphine as a doping gas and silane or disilane as a film forming gas is used. After forming a silicon film in which phosphorus is doped during film formation, heat treatment and etching other than in the contact hole are performed to form a buried layer having a low resistivity.

[0005]

When the above-mentioned method is used for a contact hole having a high aspect ratio (that is, a small opening and a deep shape) in recent years, various problems have occurred. For example, in the sputtering method, there is a problem that the tungsten silicide molecules are first attached to the upper side surface of the contact hole and the opening is blocked, so that it becomes difficult to completely fill the inside of the contact hole as the aspect ratio becomes higher. Regarding the method of performing thermal diffusion after implanting impurities by the ion implantation method, it is difficult to control the implantation amount of impurities in the depth direction of a high aspect ratio contact hole. In order to do so, the steps of film formation → implantation → thermal diffusion must be carried out multiple times, and there was a problem that the process procedure increased. Next, in the case of a buried layer formed by a CVD technique using only silane as a film forming gas and phosphine as a dope gas, the growth temperature during film formation is 570 ° C. or higher in order to obtain a growth rate according to mass production. is necessary. However, the silicon film containing impurities grown at this temperature has a high resistivity because the crystal grains are small even after the heat treatment, and there is a problem that the thin film having a thickness of 1000 angstroms or less has a remarkably high resistivity. For this reason, the contact hole burying layer formed by using silane as a film forming gas has a too high plug resistance when used for a contact hole having a small opening diameter in recent years, which makes it difficult to apply to a semiconductor device. It was

In the case of a buried layer formed by a CVD technique using disilane as a film forming gas and phosphine as a doping gas, unlike the case of forming a film using the above-mentioned silane gas, the formation at a relatively low temperature of about 490 ° C. It is possible to form a film, so that the crystal diameter after heat treatment becomes large and a low resistance film can be formed. Moreover, there is almost no problem that the thin film has a high resistivity. However, this membrane
Since disilane is used as a gas and phosphine is used as a dope gas for the purpose of forming a buried layer of a contact hole having a small opening diameter because of the poor step coverage, as shown in FIG. A void 22 is generated at the center of the buried layer formed by the silicon film 23 in the contact hole formed in the film 13, and the void remains at the product stage, resulting in a high contact hole resistance or disconnection. Therefore, there is a problem in that the reliability of the semiconductor device is deteriorated.

[0007]

According to the present invention, there is obtained a semiconductor device in which a silicon film containing an impurity buried in a buried layer of a contact hole comprises two layers of a first silicon film and a second silicon film. Further, according to the present invention, regarding the step of filling the contact hole, a silicon film containing impurities is grown by using the first gas system, and then a silicon film containing impurities is grown by using the second gas system. A method of manufacturing a semiconductor device in which a semiconductor device is embedded is obtained.

In the method of manufacturing a semiconductor device according to the present invention, the step of filling the contact hole includes the step of growing a silicon film containing impurities using the first gas system and the step of growing impurities using the second gas system. A heat treatment step may be included between the step of growing the silicon film containing a.

[0009]

1 is a sectional view of a semiconductor device according to an embodiment of the present invention. This contact hole is formed by the following manufacturing method.

First, the diffusion layer 12 is selectively formed on the semiconductor substrate 11 by an ion implantation technique using a photoresist as a mask. Next, an interlayer film 13 of a silicon oxide film is formed to a thickness of 1 μm by the low pressure CVD method. Photoresist is applied to the surface of the interlayer film, a contact pattern is formed at a predetermined position by a lithographic technique, and the interlayer film 13 is formed by using this as a mask and a plasma etching apparatus.
A contact hole 14 is formed inside and the photoresist is removed. A sectional view of the state up to this step is shown in FIG.

The present invention has a structure in which there are two layers of silicon films containing impurities and having different crystallinity in contact holes provided at predetermined positions on a semiconductor substrate, the contact hole of FIG. 2 being an example. The film forming method is characterized. The structure in the contact hole and the burying method will be described below.

FIG. 2A is a film forming condition table showing an embodiment of film forming according to the present invention. In FIG. 2A, the horizontal axis represents the time from the start of growth, the vertical axis represents the film forming gas and doping gas flow rates on the left side, and the furnace temperature on the right side.

First, the growth is performed using disilane as a film forming gas and phosphine as a doping gas. The phosphine used is diluted to 1% with helium. The temperature in the furnace during film formation is about 490 ° C., and the pressure in the furnace is about 0.25 Torr. The gas flow rate is disilane 100
Film formation is performed at a sccm of 80 sccm of diluted phosphine until time t ₁ . FIG. 4A is a cross-sectional view of the semiconductor device in each process at hell t ₁ . During the period from the start of film formation to t ₁ , the _first contact hole 21 and the surface of the interlayer film 13
The silicon film 41 is formed. Let t _{1 be} the time when the first silicon film 41 has grown to about 100 Å. At time t ₁ , the supply of the reaction gas is stopped once,
The temperature inside the furnace is raised to 570 ° C and stabilized. After the stable time t ₂ , silane is used as a film forming gas. The furnace pressure was raised to 0.60 Torr and the flow rate of silane was 800s.
The film formation is performed until the target film thickness is obtained with the flow rate of ccm and phosphine of 120 sccm, and the second silicon film 12 is formed here. FIG. 4B is a cross-sectional view for each step when the second film formation is completed. At this point, the first and second silicon films are left in addition to the contact hole portion, so that the entire surface is next etched back using the dry etching technique. By the etch back process, the first and second silicon films other than the contact hole portion are removed to form the contact buried layer 16. FIG. 5 shows cross-sectional views for each step at this point. After this, after performing nitrogen annealing, a metal such as aluminum is deposited by using a sputtering method,
The wiring layer 17 is formed by using the lithography technique and the dry etching technique, and the semiconductor device according to the embodiment of the present invention is completed. A sectional view of the completed semiconductor device is shown in FIG.

Since the two-layer film of silicon containing phosphorus as an impurity formed by this method can realize low-temperature film formation with a large crystal diameter only in the initial stage of growth, excellent step coverage of a film using silane as a film-forming gas. And a low resistance in a thin film formed by using disilane as a film forming gas. As a result of actually forming a film by this method,
As a coating shape, no void was generated even in a contact hole having an aperture ratio of 0.2 μm and a depth of 1 μm and an aspect ratio of 5.

Further, the contact resistance (including the plug resistance) of the semiconductor device manufactured in this example was as low as about 800Ω for a contact having a diameter of 0.2 μm and a depth of 1 μm. Regarding the resistivity, a good value of 800 μm · cm was obtained even with a thin film of 500 Å.

FIG. 2B is a film forming condition table showing another embodiment of the film forming method according to the present invention. The horizontal and vertical axes in the figure are the same as those in FIG. At the beginning of film formation, disilane was used under the same conditions as in Example 1 as a film forming gas and 1% phosphine was used as a doping gas. In this example, the film thickness was about 150 angstroms at time t ₃ . The supply of the reaction gas is temporarily stopped. A sectional view for each step at t ₃ is shown in FIG. Next, nitrogen is fed into the furnace to bring it to atmospheric pressure, then the temperature in the furnace is raised to 620 ° C., and after stabilizing, annealing is performed in the furnace in which nitrogen flows for about 1 hour.
After the annealing is completed, the temperature of the furnace is lowered to 570 ° C by natural cooling to stabilize it. The time when it becomes stable is t ₄ . t ₄
4B is a cross-sectional view of each process in FIG. t ₄ later performs film formation using deposition gas to silane until the film thickness of the target under the same conditions as an example, a 1% phosphine as doping gas. After that, nitrogen annealing is performed in the same manner as in the first embodiment, Al or the like is deposited by the sputtering method, and the wiring layer 1 is formed by using the lithography technique and the dry etching technique.
Form 7.

The silicon film containing phosphorus as an impurity obtained by the above method has excellent step coverage by film formation using silane as a film forming gas and low resistance in a thin film formed by film formation using disilane as a film forming gas. It has both sex. Further, as compared with the one embodiment, the crystallinity of the film obtained at the initial stage of growth increases and becomes stable, so that a film having lower resistance can be obtained. As a result of forming a film by this method, voids did not occur even in a contact hole with an aperture ratio of 0.2 μm and a depth of 1 μm and an aspect ratio of 5, and good embeddability was confirmed.

The contact resistance (including plug resistance) of the semiconductor device manufactured by the method of the other embodiment is about 5 even for a contact having a diameter of 0.2 μm and a depth of 1 μm.
A low value of 00Ω was obtained.

Further, the film thickness (first silicon film +
The relationship between the second silicon film) and the specific resistance is shown in FIG. As can be seen from FIG. 7, the overall resistivity is lower than that of one example, and even a thin film of 500 angstroms has a resistivity of 600 to 600.
A low resistance value of 650 μΩ · cm was obtained.

[0020]

As described above, according to the present invention, a silicon film containing two kinds of impurities having different crystallinities is used for a buried layer in a contact hole of a semiconductor device having a predetermined contact hole. There is an effect that a semiconductor device having a silicon plug contact having a contact resistance of a contact having a diameter and a depth of 1 μm as low as about 500Ω can be obtained.

In addition, when the contact gas is formed halfway using the first gas system in the filling step and then the second gas system is continuously used, the step coverage is excellent and 800 μΩ for a thin film of 500 Å.
There is also an effect that a film having a low resistivity of cm can be formed.

Alternatively, if a heat treatment is performed immediately after the film formation in the first step of the two-step film formation, the step coverage is excellent, and 600 μΩ · c for a thin film of 500 Å.
There is also an effect that a film having a lower resistivity of m can be formed.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 2A is a film formation condition diagram of one embodiment of the present invention,
(B) is a film-forming condition figure of one Example of this invention.

FIG. 3 is a sectional view (step 1) according to steps of an embodiment of the present invention.

FIG. 4A is a sectional view of each embodiment of the present invention by step (No. 2), and FIG. 4B is a sectional view of each embodiment of the present invention by step.

FIG. 5 is a cross-sectional view (4) for each step of an embodiment of the present invention.

FIG. 6 is a cross-sectional view of a conventional contact hole having a void.

FIG. 7 is a diagram of the film thickness dependence of the specific resistance of the film grown in the example of the present invention and the film grown by only one of the silane system and the disilane system.

[Explanation of symbols]

 11 semiconductor substrate 12 diffusion layer 13 interlayer film 14 first silicon film 15 second silicon film 16 buried layer 17 wiring layer 21 contact hole 22 void 23 silicon film formed by disilane

Claims (3)

[Claims] 1. A semiconductor device having a predetermined contact hole, wherein a buried layer of the contact hole is a silicon film containing impurities, wherein the silicon film has a first crystal film and a second silicon film having different crystallinity. A semiconductor device comprising two layers of 2. In a step of growing a silicon film having impurities in a semiconductor device having a predetermined contact hole and filling the contact hole, a first silicon film having impurities is grown using a first gas system. After doing
A method of manufacturing a semiconductor device, wherein a second silicon film containing an impurity is grown using a second gas system and the contact hole is filled. 3. The step of filling the contact hole comprises growing the first silicon film containing impurities using a first gas system, and the second step containing impurities using a second gas system. The method for manufacturing a semiconductor device according to claim 2, wherein a heat treatment step is included between the steps of growing the silicon film.