JP2702007B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device. More specifically, the present invention relates to a method for forming a contact hole (electrically conductive portion). .

[0002]

2. Description of the Related Art In recent years, with the miniaturization of semiconductor elements, the diameter of a contact hole has been reduced, and the ratio of the depth to the diameter (aspect ratio) of the contact hole has been increasing. Then, it is becoming difficult to cover the inside of the contact hole with the wiring material.
Conventionally, there is a chemical vapor deposition method (hereinafter referred to as a CVD method) of a refractory metal such as tungsten to solve this problem. When tungsten is formed by the CVD method, it does not grow on the insulating film by appropriately selecting conditions,
It has a feature of so-called selective growth that grows only on Si, silicide (for example, WSix) or metal. By utilizing this property, tungsten is grown in the contact hole to bury the contact hole to reduce the aspect ratio and reduce the aspect ratio. Wiring layers are being planarized.

[0003]

Conventionally, as shown in FIG. 5, a contact hole 50 is formed in a Si substrate 56 having a gate 55 having a polysilicon film 53 as a lower layer and a tungsten silicide (WSix) film 54 as an upper layer. , 50, 51, the tungsten (W) film 52 is selectively grown by the CVD method.
It is necessary to grow tungsten simultaneously on the WSix film 54 and on the Si substrate 56 having the source 57 and the drain 58. On the WSix film 54, the initial growth rate of tungsten is such that the contact hole 51 is finally over-etched. Since it is formed, the growth of tungsten occurs because it is slightly affected by the surface state of the WSix film 54, and the contact hole 51 is about 0.1 to 0.2 μm thicker than the contact holes 50 on the source 57 and the drain 58. This causes a problem that the thickness of the grown film becomes small, and the disconnection of the Al wiring 59 easily occurs (see FIG. 6).

As described above, in recent years, LSIs have been increasingly miniaturized and the aspect ratio of contact holes has been increased, so that the variation in tungsten filling has become severe, and the delay in tungsten growth on WSix cannot be ignored. come. The present invention has been made in consideration of the above circumstances, and eliminates a delay in the growth of tungsten in an initial growth process on a WSix film of a gate, and reduces a difference in growth film thickness from tungsten grown on a Si substrate to achieve uniformity. Another object of the present invention is to provide a method of manufacturing a semiconductor device in which a contact hole can be embedded in a semiconductor device.

[0005]

According to the present invention, (i) an interlayer insulating film is laminated on the entire surface of a Si substrate having an impurity diffusion layer and a gate having a multilayer structure in which at least the uppermost layer is formed of a WSix film; (ii) etching the interlayer insulating film to form a first contact hole reaching the impurity diffusion layer; and (iii) subsequently forming a second contact hole on the entire surface of the Si substrate including the first contact hole.
After forming a mask pattern for forming a contact hole, etching of the interlayer insulating film is performed again, and the W
Forming a second contact hole reaching the Six film, and (iv) further etching the exposed WSix film surface using a mask pattern for forming the second contact hole to perform etching used in forming the second contact hole. (V) Then, a tungsten film is simultaneously buried in the first and second contact holes by a selective CVD-tungsten method, and (vi)
This is a method for manufacturing a semiconductor device, which comprises forming a wiring pattern on a Si substrate including these embedded wiring films.

That is, according to the present invention, after a gate made of WSix is formed on a silicon substrate, an insulating layer is formed, the insulating layer is etched to open a contact hole reaching the Si substrate, and then the WSix film is formed. After etching only the upper insulating layer to form a contact hole reaching the WSix film, WS
The surface of the ix film is light-etched, for example, by several hundred Å, and then tungsten wiring is formed by selective CVD-tungsten method using WF ₆ and SiH ₄ in respective contact holes reaching the Si film and the WSix film. This eliminates the delay of the conventional tungsten growth on the WSix film, and enables the tungsten wiring buried in the contact hole to have the same growth film thickness in any contact hole, thereby enabling uniform burying.

The tungsten wiring as the buried wiring film in the present invention is for inputting or outputting a signal to an element having, for example, an N ⁺ layer or a P ⁺ layer as a source and a drain and a WSix film as a gate. WF ₆ and SiH ₄
And tungsten can be buried by the selective CVD-tungsten method.

In the present invention, the impurity diffusion layer is formed between the layers.
Before forming the insulating film, ion the dopant as an impurity
It is formed by injection. Selective CVD data according to the present invention
The Nungsten method is performed under conditions known in the art.
May be used. Tungsten in CVD equipment
And heat the Si substrate to 250-350 ° C₆
And SiH_FourAnd WF for example₆/ SiH _Four30 / 24-30 in ratio
/ 16 and the pressure is, for example, 0.01 to 0.12 Torr.
The embedded wiring film is usually formed to a thickness of 1.0 to 1.2 μm.
You. Also, the thickness of the contact hole on the WSix film and the Si-based
Thickness of contact hole on impurity diffusion layer formed in the plate
Can be the same depth or different depths
No.

In the present invention, as a method for etching the exposed WSix film surface, a method known per se is used depending on the contact surface altered layer generated by the etching used in forming the second contact hole. For example, a plasma etching method or a wet etching method is a preferable method. The plasma etching conditions are set at a temperature of 10 to 26 ° C. using CF ₄ and O ₂ gas. Furthermore, a semiconductor device can be manufactured by forming a metal wiring or the like on the tungsten wiring layer.

[0010]

The operation is performed through the contact hole of the gate WSix film.
Only the surface of the Six film is removed, for example, by a plasma etching method to a thickness of several hundred Å, and then WF ₆ and SiH ₄ are simultaneously used for the contact hole on the WSix film and the contact hole formed on the impurity diffusion layer. Since a tungsten wiring is formed by the selective CVD-tungsten method,
The difference in the thickness of the grown tungsten on the WSix film of the gate and the impurity diffusion layer in the i-substrate can be reduced, and the contact holes can be uniformly buried even if the contact holes have different bases.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to the drawings, but the present invention is not limited to the following embodiments. 1 to 4 show an example of burying a contact in an SRAM, forming a contact hole reaching a WSix film, then performing a light etch on the WSix film through the contact hole, and forming a tungsten growth film using a selective CVD-tungsten method. The semiconductor manufacturing method described above will be described.

First, as shown in FIG.
(11) A semiconductor device comprising an element isolation region 1, a gate electrode 2 having a laminated structure of a WSix layer (2b) and a poly-Si layer (2a), an N ⁺ diffusion layer (3) and a P ⁺ diffusion layer (4). Is formed, for example, SiO ₂ And BPSG interlayer insulating film
(5) is deposited by a known CVD method, and the interlayer insulating film is etched by a photolithography method to form an N ⁺ layer 3.
And a contact hole [first contact hole] on layer 4
(6) Open.

Next, as shown in FIG. 2, the interlayer insulating film (5) is etched by photolithography to form a gate electrode.
A contact hole [second contact hole] (8) is opened on the WSix layer (2b) of (2). Then this resist
(4) CF ₄ / O ₂ only on the WSix layer using (7) as a mask
System or is subjected to light etching of 200 Å aim using SF ₆ -based gas. That is, the surface of the WSix film is over-etched by a thickness of 200 ° through the contact hole (see FIG. 3).

At this time, the conditions of the light etching are, for example, 160 sccm for CF ₄ , 40 sccm for O ₂ ,
250 mTorr, RF power is 100 W, and etching time is 45 seconds. Also, contact holes (6) (8)
Are 0.6 μm in diameter and 1.2 μm in depth. After performing a light etch and removing the resist (7), the silicon substrate (11) is immersed in 1% buffered hydrofluoric acid for 45 seconds,
After removing the natural oxide film on the device, as shown in FIG. 4, the film formation temperature was 270 ° C., the pressure was 0.02 Torr, WF ₆ and SiH ₄
With the flow rates of 10 sccm and 8 sccm, respectively, a tungsten layer (9) was grown for 240 seconds until the contact holes (6) and (8) could be filled with 1.2 μm. Subsequently, Al is formed on the entire surface of the silicon substrate (11) including the contact holes (6) and (8) embedded with the tungsten layer (9).
After stacking the layers, an Al wiring (not shown) is patterned to form an SRAM.

As described above, in this embodiment, before the selective CVD tungsten is buried in the high-aspect contact hole in which the bases of different materials including the impurity diffusion layer and the gate WSix film are mixed, only the contact hole on the WSix film is written. By performing the etching, the conventional tungsten growth delay on WSix is eliminated, and the thickness of tungsten grown on Si and on WSix are made the same, thereby enabling uniform filling.

[0016]

As described above, according to the present invention, it is possible to suppress the growth delay of tungsten in the initial growth process of the gate WSix film, and to form a tungsten buried film formed in the contact hole leading to the impurity diffusion layer on the Si substrate. Thus, the difference in the thickness of the grown film can be reduced so that the contact hole can be evenly embedded and a stable metal wiring can be formed.

[Brief description of the drawings]

FIG. 1 is a structural explanatory view showing a first step of a manufacturing method according to an embodiment of the present invention.

FIG. 2 is a structural explanatory view showing a second step of the manufacturing method in the embodiment.

FIG. 3 is a structural explanatory view showing a third step of the manufacturing method in the embodiment.

FIG. 4 is a structural explanatory view showing a fourth step of the manufacturing method in the embodiment.

FIG. 5 is a configuration explanatory view showing a conventional example.

FIG. 6 is an explanatory diagram of a main part configuration showing a conventional example.

[Explanation of symbols]

2a poly-Si layer 2b WSix layer 3 N ⁺ diffusion layer 4 P ⁺ diffusion layer 5 SiO ₂ film (interlayer insulating film) 6 first contact hole 7 resist 8 second contact hole 9 buried tungsten film 11 silicon substrate

Claims (1)

(57) [Claims] (I) Si having an impurity diffusion layer and a gate having a multilayer structure in which at least the uppermost layer is formed of a WSix film.
An interlayer insulating film is laminated on the entire surface of the substrate; (ii) the interlayer insulating film is etched to form a first contact hole reaching the impurity diffusion layer; and (iii) a Si including the first contact hole. After forming a mask pattern for forming a second contact hole on the entire surface of the substrate, the above-mentioned interlayer insulating film is etched again to form a second contact hole reaching the WSix film of the gate, (iv) Using the mask pattern for forming the second contact hole, the exposed WSix film surface is etched to remove the deteriorated WSix contact layer generated by the etching used at the time of forming the second contact hole. (V) A tungsten film is simultaneously buried in the first and second contact holes by a selective CVD-tungsten method, and (vi) a wiring pattern is formed on a Si substrate including these buried wiring films. The method of manufacturing a semiconductor device consists in.