JPH02162722A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable a metal to be selectively deposited on a thin film for diffusion barrier by a method wherein a pattern of metallic film is formed on a silicon nitride or oxide and after ion-implanting a metal reducible to the silicon nitride or oxide, the metallic film is selectively reduced and then the second metallic film is selectively formed by chemical vapor deposition process. CONSTITUTION:After depositing a silicon nitride film 3 and a titanium film 4 on a single crystal silicon substrate 1 with an impurity diffused layer 2 formed on the part near the surface thereof, the titanium film 4 is etched away to expose the silicon nitride film 3 which is ion-implanted with titanium and then heat-treated. A titanium silicide film 5 is formed near the surface of the diffused layer 2 by ion-implanting with titanium slightly deeper than the thickness of the silicon nitride film 3; a part of the silicon nitride film 3 is turned into a titanium nitride 6 and another titanium silicide film 7 is formed on the surface. Next, the titanium film 4 is selectively removed and then a metallic film 8 (copper) is selectively deposited only on the regenerated part of the silicon nitride by chemical vapor deposition process. Through these procedures, the metallic film 8 can be selectively formed on the titanium nitride 6 so that a metal may be buried in a fine contact hole.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device in the formation of wiring.

[Conventional technology]

In silicon semiconductor integrated circuits, sprocket aluminum is mainly used as a wiring material.

However, with the miniaturization and multilayering of interconnects in semiconductor devices, it has become difficult to fill contact holes that connect interconnects between upper and lower layers with metal. Further, in order to form multilayered and fine wiring patterns, it has become essential to flatten the wiring.

In response to these demands, a selective growth method using different underlying materials using chemical vapor deposition has been proposed. Since this method enables the filling of material into micropores and microgrooves, extensive studies are being continued, particularly regarding the growth of tungsten films using reduction of tungsten hexafluoride. In addition, a selective growth phenomenon has been discovered in aluminum and copper using, for example, triisobutylaluminum and hexafluoroacetylacetonatocopper as raw materials (Patent Application No. 62).
-118147, Japanese Patent Application No. 63-124006).

[Problem to be solved by the invention]

Incidentally, as diffusion layers in semiconductor devices have become thinner in recent years, deterioration of the reliability of semiconductor devices due to diffusion reactions between metal and silicon has become a problem.

As a countermeasure to this problem, a structure in which titanium nitride is sandwiched between silicon and metal as a diffusion barrier is being considered. but,
Selective growth of metal does not occur on ordinary titanium nitride films,
Selective growth was also difficult to occur on oxides and nitrides of other metals.

The present invention has been made to solve the above-mentioned drawbacks.
In particular, the purpose is to selectively grow metal on a diffusion barrier thin film in the wiring formation of semiconductor devices, to enable connection between the upper and lower layers of a multilayer wiring metal film with fine dimensions, and to flatten a multilayer wiring structure. That is.

[Means to solve the problem]

The method for manufacturing a semiconductor device according to the present invention includes a step of forming a first metal film pattern on silicon nitride or silicon oxide formed on the main surface side of the semiconductor substrate, and a step of forming a first metal film pattern on the silicon nitride or silicon oxide formed on the main surface side of the semiconductor substrate. A step of modifying the exposed silicon nitride or silicon oxide into a thin film containing a metal compound by ion-implanting a metal capable of reducing the nitride or silicon oxide, and forming a pattern of the first metal film. a step of selectively forming a second metal film only on the silicon nitride or silicon oxide that has been selectively removed and modified by metal ion implantation using a chemical vapor deposition method; There is.

Also, a step of depositing silicon nitride on the main surface side of the semiconductor substrate, a step of depositing an insulating film and a first metal film on the silicon nitride, and a step of depositing a part of the first metal film and the insulating film. By etching away the silicon nitride to form holes or grooves and exposing the silicon nitride, and by implanting titanium ions into the main surface side of the semiconductor substrate and heat-treating, the already exposed silicon nitride and the implanted titanium are removed. After selectively removing the first metal film, a second metal film is selectively applied only to the holes or grooves using a chemical vapor deposition method. and a step of depositing a film.

[For production]

A second metal film is selectively formed only on silicon nitride or silicon oxide modified by metal ion implantation.

Furthermore, titanium nitride and titanium silicide are formed by ion implantation of titanium, and a second metal film is formed on the titanium silicide.

〔Example〕

Embodiments Next, embodiments of the present invention will be described with reference to the drawings. FIGS. 1(a) to 1(d) are cross-sectional views of a semiconductor device showing a first embodiment of the present invention.

First, as shown in FIG. 2(a), a semiconductor substrate 1 made of single crystal silicon with an impurity diffusion layer 2 formed near the surface.
After depositing a silicon nitride film 3 thereon, a titanium film 4 corresponding to the first metal film is deposited.

After that, the titanium film 4 is etched using, for example, a reactive ion etching method.
The silicon nitride film 3 on the diffusion layer 2 is exposed by etching.

Subsequently, as shown in FIG. 6(b), titanium ions are implanted onto the main surface side of the semiconductor substrate 1.
6030 (using the method described in Japanese Patent No. 6030), heat treatment is performed in an inert gas at a predetermined temperature (for example, 700° C.) for a predetermined time (for example, 30 minutes). In this case, by making the titanium ion implantation range slightly deeper than the thickness of the silicon nitride film 3, the titanium silicide film 5 is formed near the surface of the diffusion layer 2, and the silicon nitride film 3 is changed to a titanium compound. However, a portion of the silicon in the silicon nitride film 3 is replaced with titanium to form titanium nitride 6, and the remaining silicon is deposited on the surface. If the amount of titanium injected is large enough, titanium silicide II will form on the surface! 7 is formed.

Next, as shown in FIG. 4C, the titanium film 4 is selectively removed using, for example, an etching solution of ammonia, hydrogen peroxide, and water in a ratio of 1:1:4.

Then, as shown in Figure (d), by chemical vapor deposition (for example, using the method described in Japanese Patent Application No. 63-124006), only the portions where the previously formed silicon nitride has been modified are grown. A metal film 8 selectively corresponding to the second metal film (
copper).

The conditions for depositing copper are described in detail in Japanese Patent Application No. 124006/1982, but for example, hexafluoroacetylacetonate copper is heated to 60°C and the flow rate is 100cc/1.
The pressure in the reaction chamber is 1
000 Pa and sample temperature of 350° C. to perform selective growth of copper by performing low pressure chemical vapor deposition.

Coal Loss 1 FIGS. 2(a) to 2(f) are cross-sectional views of a semiconductor device showing a second embodiment of the present invention.

First, as shown in Figure (a), a semiconductor substrate 1 made of single crystal silicon with impurity diffusion N2 formed near the surface.
After depositing a silicon nitride film 3 thereon, for example, a silicon oxide film 9 is deposited as an insulating film, and then a titanium film 4 is deposited.

Thereafter, as shown in FIG. 2B, the titanium film 4 and the silicon oxide film 9 are etched using, for example, a reactive ion etching method to form holes or grooves and expose the silicon nitride film 3 on the diffusion film 2. do.

Subsequently, as shown in FIG. 6(c), titanium ions are implanted onto the main surface side of the semiconductor substrate 1, for example, by Japanese Patent Application No. 63-116.
using the method described in No. 030), and further at a predetermined temperature (
For example, heat treatment is performed at 700° C. for a predetermined time (for example, 30 minutes) in an inert gas.

In this case, the titanium ion implantation range is set to the silicon nitride film 3.
By making the thickness slightly deeper than , titanium silicide film 5 is formed near the surface of diffusion layer 2, and silicon nitride can also be changed to a titanium compound. However, a portion of the silicon in the silicon nitride film 3 is replaced with titanium to form titanium nitride 6, and the remaining silicon is deposited on the surface.

If the amount of titanium implanted is large enough, a titanium silicide film 7 will be formed on the surface.

Figure (d) is an enlarged view of a section marked A in figure (C).

Next, as shown in FIG. 3(e), the titanium film 4 on the silicon oxide film 9 is coated with, for example, ammonia, hydrogen peroxide, or water.
: Selectively remove with a 1:4 etching solution.

Then, as shown in Figure Cf), a metal film is selectively formed only at the bottom of the previously formed hole or groove by chemical vapor deposition (for example, using the method described in Japanese Patent Application No. 124006/1983). Grow 8 (copper).

Selective growth process of metal of Example 1.2 shown in Figures 1 (a) to (d) and Figures 2 (a) to (f) Figures 1 (d) and 2 ( In f) aluminum can be selectively grown instead of copper.

Regarding the selective growth method of aluminum, please refer to the patent application 1986-1.
Although the reaction apparatus and reaction conditions are shown in detail in Japanese Patent No. 18147, FIG. 1(a) to (c) or FIG. 2(a) to
Heating blocks are installed at a distance of 5 mm from the semiconductor substrate on the top and bottom of the semiconductor substrate that has undergone the step (e), and the temperature of the heating block on the main surface side of the semiconductor substrate is set to 320°C, for example.
℃, the temperature of the heating block on the back side of the semiconductor substrate was set to 200℃.
℃. Then, by subsequently introducing triisobutylaluminum gas into the reaction chamber and increasing the gas pressure to 65 Pa, aluminum is modified with silicon nitride as shown in FIG. 1(d) or FIG. 2(f). selectively deposits only on

Scrap carbon This can be carried out by the silane reduction method of tungsten hexafluoride. For example, Fig. 1 (a) to (c) or Fig. 2 (a) to (e)
The semiconductor substrate that has gone through the process is treated with tungsten hexafluoride gas pressure IPa, silane gas pressure IPa, and hydrogen gas pressure 40P using a normal cold wall type CVD equipment.
By heating the semiconductor substrate to 250° C. under the conditions of a, tungsten is selectively applied only to the portions where silicon nitride has been modified, as shown in the metal film 8 in FIGS. 1(d) and 2(f). can be formed into

Embodiment 5 FIGS. 3(a) to 3(f) are cross-sectional views of a semiconductor device showing a fifth embodiment of the present invention. Here, the manufacturing method of the present invention will be described as a MOS) transistor source.

A case will be described in which the present invention is applied to the lead-out portion of the drain electrode. In the figure, 10a is a source region of a MOS transistor, 10b is a drain region, 11a is silicon oxide for element isolation, llb is silicon oxide for a gate, and 12 is polycrystalline silicon for a gate electrode.

First, as shown in FIG. 2(a), a MOS transistor is formed by a conventional method, and a source region 10a and a drain region fo are formed.
b is exposed and a silicon nitride film 3 is deposited.

Next, as shown in FIG. 2B, an insulating film such as a silicon oxide film 9 and a metal film such as a titanium film 4 are successively deposited on the main surface of the semiconductor substrate. Thereafter, a hole or groove is formed in part of the titanium film 4 and the silicon oxide film 9 by etching, and the silicon nitride film 3 is exposed.

Furthermore, as shown in Figure (C), titanium is ion-implanted in a predetermined amount at a predetermined energy onto the main surface side of the semiconductor substrate l, and then a heat treatment is performed at 700°C for 30 minutes in an argon atmosphere, and silicon nitride is The film 3 and the silicon immediately below it are modified into titanium nitride 6 and titanium silicide film 5, respectively. Further, during this heat treatment, a titanium silicide film 7 is deposited on the surface of the titanium nitride 6.

Figure (d) is an enlarged view of symbol B in figure (c).

Thereafter, as shown in FIG. 2(e), the titanium film 4 on the silicon oxide film 9 is coated with a mixture of ammonia, hydrogen peroxide, and water.
selectively remove.

Then, as shown in FIG. 3(e), a metal film 8 (for example, copper, aluminum, tungsten, molybdenum) is deposited on the bottom of the previously formed hole or groove according to any of the methods described in Example 2.3.4. Choose to grow.

Figures 4(a) to 4(d) are cross-sectional views of a semiconductor device showing a sixth embodiment of the present invention. Here, a case will be described in which the manufacturing method of the present invention is applied to extracting the source and drain electrodes of a MOS transistor in the same manner as in FIG.

First, as shown in FIG. 5A, the surfaces of the polycrystalline silicon 12 for source and drain regions 10a, 10b and gate electrodes of the MOS transistor are exposed and selectively made into silicide 13 by a known method.

Thereafter, as shown in FIG. 3B, a silicon nitride film 3 is deposited on the main surface side of the semiconductor substrate. Next, for example, a silicon oxide film 9 as an insulating film and a titanium film 4 as a metal are deposited. Then, a hole or groove is formed by etching a portion of the silicon oxide film 9 and the titanium film 4, and the silicon nitride film 3 is exposed. Further, by implanting titanium ions and performing heat treatment, the silicon nitride film 3 is modified to form a titanium nitride 6 having a titanium silicide film 7 on its surface.

Figure (c) is an enlarged view of symbol C in figure (b).

Next, as shown in FIG. 4(d), the titanium film 4 on the silicon oxide film 9 is removed, and the metal film 8 (for example, copper, aluminum, tungsten, molybdenum) selectively grows at the bottom of previously formed holes or grooves.

FIGS. 5(a) to 5(f) are cross-sectional views of a semiconductor device showing a seventh embodiment of the present invention. Here, a case will be described in which the manufacturing method of the present invention is applied to planarized wiring.

As shown in FIG. 5A, an insulating film such as a silicon nitride film 14 is deposited on the element isolation oxide film 11a, and a first metal film such as a titanium film 15 is deposited on the silicon nitride film 14. .

Thereafter, as shown in FIG. 2B, a part of the titanium 15 is removed by etching, and subsequently, the exposed silicon nitride film 14 is removed by etching to a predetermined depth to form a groove for wiring backing. .

Then, as shown in FIG. 3(c), titanium ions are implanted and heat treated to modify the bottom of the groove formed by the exposed silicon nitride film 14 into titanium nitride 16, and to add titanium to the surface of the titanium nitride. Silicide 17 is precipitated.

Figure (d) is an enlarged view of the symbol in figure (C).

Thereafter, as shown in FIG. 3(e), the titanium film 15 is selectively removed.

Then, as shown in FIG. 3(f), a metal film 18 corresponding to the second metal film is selectively grown only in the opening portion by chemical vapor deposition.

FIGS. 6(a) to 6(d) are cross-sectional views of a semiconductor device showing an eighth embodiment of the present invention. Here, a case will be described in which a flat polycrystalline wiring is formed by combining the above embodiments.

Figures (a) to (c) show examples in which silicon nitride 3 is deposited on the semiconductor substrate 1, on the insulating film 11a, and on the metal 8, respectively, and the metal explained in the above embodiment is selectively grown. By combining these steps (a) to (C) in the same figure, a flattened multilayer wiring as shown in (d) in the same figure can be formed.

〔Effect of the invention〕

As explained above, the present invention has the following effects because metal can be selectively formed on a semiconductor substrate.

(1) It is now possible to selectively form a metal film on titanium nitride, preventing reactions between the metal and the underlying silicon, and at the same time making it possible to fill minute contact holes with metal, resulting in flat wiring. This enables high integration and high integration.

(2) Portions other than the contact hole are covered with a silicon nitride film, which can prevent metal from diffusing toward the substrate.

(3) A flat wiring structure can be formed without lithography and etching.

[Brief explanation of the drawing]

1(a) to (d) are cross-sectional views of a semiconductor device showing a first embodiment according to the present invention, and FIGS. 2(a) to <r> are cross-sectional views of a semiconductor device showing a second embodiment according to the present invention. Cross-sectional view of Figure 3 (a
) to <f> are cross-sectional views of a semiconductor device showing a fifth embodiment of the present invention, and FIGS. 4(a) to (d) are cross-sectional views of a semiconductor device showing a sixth embodiment of the present invention. Figure 5 (a) to (f)
is a cross-sectional view of a semiconductor device showing Example 7 according to the present invention,
FIGS. 6(a) to 6(d) are cross-sectional views of a semiconductor device showing an eighth embodiment of the present invention. ■...Semiconductor substrate, 2...Diffusion layer, 3...Silicon nitride film, 4...Titanium film, 5...Titanium silicide film, 6...Titanium nitride, 7...Titanium silicide Film, 8...Metal film. Patent applicant: Nippon Telegraph and Telephone Corporation Agent: Masaki Yamakawa (and one other person) Diagrams

Claims (2)

[Claims] (1) forming a first metal film pattern on the silicon nitride or silicon oxide formed on the main surface side of the semiconductor substrate; a step of modifying the exposed silicon nitride or silicon oxide into a thin film containing a metal compound by ion-implanting a metal that can reduce the metal; and selectively removing the pattern of the first metal film. and a step of selectively forming a second metal film only on silicon nitride or silicon oxide modified by metal ion implantation using a chemical vapor deposition method. Method of manufacturing the device. (2) a step of depositing silicon nitride on the main surface side of a semiconductor substrate; a step of depositing an insulating film and a first metal film on the silicon nitride; and a step of depositing the first metal film and the insulating film. a step of removing a part of the silicon nitride by etching to form a hole or groove and exposing the silicon nitride; and a step of implanting titanium ions into the main surface side of the semiconductor substrate and heat-treating the silicon nitride, which was exposed in the previous step. A step of reacting silicon nitride with ion-implanted titanium to form titanium nitride and titanium silicide, and after selectively removing the first metal film, forming the hole or groove using a chemical vapor deposition method. 1. A method for manufacturing a semiconductor device, comprising the step of selectively depositing a second metal film only on the surface of the semiconductor device.