US5731225A - Method for fabricating semiconductor device having buried contact structure - Google Patents

Method for fabricating semiconductor device having buried contact structure Download PDF

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US5731225A
US5731225A US08/634,402 US63440296A US5731225A US 5731225 A US5731225 A US 5731225A US 63440296 A US63440296 A US 63440296A US 5731225 A US5731225 A US 5731225A
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layer
chamber
tungsten
semiconductor substrate
fluorine
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Atsushi Yamamori
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Renesas Electronics Corp
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NEC Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76862Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/907Continuous processing
    • Y10S438/908Utilizing cluster apparatus

Definitions

  • the present invention relates to a method of producing a semiconductor device having the so-called buried contact structure and, more particularly, to an improvement in method for forming such a buried contact structure that employ a tungsten (W) plug.
  • an electrical connection between lower-level and upper-level wiring layers or between a wiring layer and a semiconductor region is performed by providing a contact-hole or a via-hole in an interlayer insulating film inervening therebetween.
  • the aspect ratio of contact or via-hole size to depth increases.
  • a conductive wiring layer such as a metal generally made of aluminum or an alloy consisting of aluminum and other metals such as silicon and copper is deposited by a spattering method to fill and connect the holes.
  • a conductive wiring layer such as a metal generally made of aluminum or an alloy consisting of aluminum and other metals such as silicon and copper is deposited by a spattering method to fill and connect the holes.
  • an aluminum layer deposited by the spattering method cannot completely fill a hole having a large aspect ratio. Therefore, it has been proposed that the hole provided in the interlayer insulating film be filled with a refractory metal plug such as tungsten. Such a structure is called buried contact structure.
  • the hole with the tungsten plug is formed as follows: First, a silicon substrate having a diffusion region or a polysilicon layer serving as a lower-level wiring layer is covered with a silicon oxide film as an interlayer insulating film, and the silicon oxide film is selectively removed to form a contact-hole exposing a part of the diffusion region or a via-hole exposing a part of the lower-level wiring layer. Thereafter, a titanium (Ti) layer and a titanium nitride (TIN) layer are deposited in that order on the entire surface of the substrate, followed by forming a blanket tungsten layer by the CVD method using WF 6 H 2 on the entire surface of the substrate.
  • Ti titanium
  • TIN titanium nitride
  • the blanket tungsten layer is then etched back using SF 6 until the surface of the TiN layer is exposed.
  • the tungsten plug filling the hole is thus formed.
  • an aluminum or aluminum alloy is deposited over the entire layer and then patterned to form an aluminum wiring layer.
  • fluorine is adhered on the TiN layer when the blanket tungsten layer is etched back the fluorine and titanium react to form using SF 6 and thereafter, grains of titanium fluoride on the TiN layer when the wafer is exposed to the atmosphere for a long time.
  • FIG. 3 shows the result of this study wherein the X axis represents the exposure time of the wafer in the atmosphere after the blanket tungsten layer is etched back by using SF 6 and the Y axis represents the number of occurring grains of titanium fluoride.
  • the number of grains of titanium fluoride hardly increases within 4 hours in the atmosphere after the blanket tungsten layer is etched back using SF 6 but rapidly increases after 4 hours exposure. That is, substantially only fluorine will adhere to the titanium nitride in the first 4 hours.
  • the grains of titanium fluoride on the TiN layer may be removed by soaking the titanium nitride film in an alkali solution such as ammonia to slightly etch the surface of the film.
  • the grains of titanium flouoride may be removed by etching using argon gas.
  • both methods etch the entire surface on the substrate. That is, since the tungsten plugs also are etched, a resistance between the lower-level layer and the upper-level layer increases. It is difficult to remove fluoride itself.
  • the first method removing fluorine on the TiN layer is to remove the wafer with the fluorine on the TiN layer from the CVD chamber and heating the wafer in an inert gas before the fluorine reacts with titanium in the TiN layer.
  • the second method is to soak the wafer in pure water to wash off the fluorine it reacts with the titanium.
  • the apparatus to remove fluorine is often used to produce other semiconductor products when the step of etching back the blanket tungsten using SF 6 is finished.
  • the same etching apparatus may be needed for treating other semiconductor products.
  • the apparatus conditions used for etching the surface on the substrate and the apparatus conditions used to remove fluorine are difference. Accordingly, the wafer finishing to etch the blanket tungsten using SF 6 may be moved from the etching apparatus and left in the atmosphere.
  • the etching apparatus is usually used continuously more than 4 hours. It becomes impossible to practice the first or second method for removing fluorine within 4 hours after the blanket tungsten is etched back using SF 6 in fact.
  • a method of fabricating semiconductor device of the present invention comprises the steps of:
  • FIGS. 1A to 1E are cross sectional views illustrati of respective steps of producing a semiconductor device according to a embodiment of the present invention
  • FIG. 2 is a schematic diagram of a semiconductor device fabrication system employed in the method shown in FIG. 1 for explaining an embodiment of the present invention.
  • FIG. 3 is a graph for explaining advantages of the present invention and disadvantages of the prior art.
  • a silicon oxide film 13 is formed on a silicon substrate 11 with a diffusion layer 10.
  • a polysilicon layer 12 serving as a lower-level wiring layer is formed and pattern-etched.
  • the surface of the layer 12 is further covered with a silicon oxide film 13.
  • a contact-hole 13a reaching the diffusion layer 10 and a via-hole 13b reaching the polysilicon layer 12 is formed at a desired position of the silicon oxide film 12 by a selective etching process.
  • a titanium film 14 and a titanium nitride film 15 are formed in that order by sputtering up to a thickness of 10 to 100 nm and a thickness of 50 to 200 nm respectively.
  • the titanium film 14 is necessary to decrease contact resistances with the silicon substrate 11 and the polysilicon layer 12.
  • the titanium film 14 has a thickness of 10 nm or more at the bottom of the contact-hole 13a or the via-hole 13b and the film thickness is determined by the depth and diameter of the contact-hole 13a or the via-hole 13a.
  • the titanium nitride film 15 is necessary to prevent a substrate or a polysilicon layer and WF 6 serving as a source gas for depositing tungsten from reacting each other.
  • a blanket tungsten layer 16 is formed up to a thickness of 0.5 to 1.0 ⁇ m by low-pressure chemical vapor deposition.
  • the blanket tungsten layer 16 is mainly formed by a method of reducing WF 6 by hydrogen having a preferable covering property.
  • the system has 4 chambers. Each of the chambers has a vacuum pump (not shown).
  • a load-lock chamber 1 has a gate valve 6 connected to outside of the system.
  • An etching chamber 3 has a gas valve 5 such as an inert gas.
  • a post-treatment chamber 4 has a gas valve 5 such as nitrogen gas.
  • a vacuum chamber 2 has gate valves 7, 8, 9 connected to the chamber 1, 4, 3 respectively. The vacuum chamber 2 transfers a wafer among the chambers 1, 3, 5 while keeping a vacuum atmosphere.
  • a wafer formed the blanket tungsten layer 16 on the substrate is placed in load-lock chamber 1. Then, the wafer transferred to etching chamber 3 through a vacuum chamber 2.
  • the whole surface of the blanket tungsten layer 16 is dry-etched in SF 6 gas to expose the surface of the titanium nitride film 15 at a flat portion and leave the tungsten only in the via-hole 13b or the contact-hole 13a.
  • a tungsten plug 16a,b filling the hole 13a, 13b respectively are thus formed.
  • the fluorine 18 is adhered on titanium nitride film 15.
  • the wafer is transferred to a post-treatment chamber 4 through the vacuum chamber 2. Then, the wafer may be left in the vacuum chamber 2 for a long time, for example, more than 4 hours.
  • the fluorine 18 on the surface of the titanium nitride film 16 is dissociated and removed by setting the treatment pressure in the post-treatment chamber 4 to 0.3 Torr or lower, raising the wafer temperature to 220° C. or higher, and blowing nitrogen on the wafer surface for 20 sec or more.
  • the fluorine also can be dissociated and removed by setting the treatment pressure in the vacuum chamber to 0.3 Torr or lower in the nitrogen gas, raising the wafer temperature 220° C. or higher. It is not fully understood why fluorine can be removed by this method. However, it is believed that the fluorine is removed by chemical action.
  • FIG. 3 shows residence relation between the time of the wafer in the atmosphere after the above treatment is applied to the wafer and the number of grains of titanium fluoride format by a broken line. As the result, titanium fluoride is not formed even if a wafer is left in the atmosphere for a long time.
  • an aluminum alloy film is deposited by sputtering. Thereafter, the aluminum alloy film, titanium nitride film 15, and titanium film. 14 are formed into desired shapes and patterned to form aluminum wiring layer 17a, 17b by photolithography and dry etching. Thus, a semiconductor device having a buried contact structure is produced.
  • the steps of etching back the blanket tungsten layer and removing fluorine are accomplished in their respective chambers. Because fluorine remains on the inner wall of a etching chamber 3 when the blanket tungsten layer is etched back using SF 6 , therefore, fluorine attaches onto a titanium nitride film again.
  • the intermolecular binding energy between fluorine and hydrogen is 153 kcal/mol. Therefore, it is possible to separate or disassociates the bound titanium and fluorine from each other by plasma and remove the fluorine by a chemical reaction of hydrogen-gas plasma without applying thermal treatment.
  • the semiconductor device fabrication method of the present invention dry-etches a tungsten film on a titanium nitride film by a gas containing fluorine, then transfers the etched film to a post-treatment chamber from the etching chamber without exposing it to the atmosphere, and removing fluorine from the titanium nitride film in the post-treatment chamber. Therefore, it is possible to completely remove fluorine from the surface of the titanium nitride film and prevent grains of titanium fluoride from occurring on the surface of the titanium nitride film.
  • the present invention makes it possible to form an aluminum wiring having a via-hole covered with a tungsten film at a high adhesiveness without causing a short circuit between wires and improve the yield and reliability of semiconductor devices.

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
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Abstract

A method of forming a tungsten plug is disclosed in which a blanket tungsten layer 16 is deposited on a conductive layer including a titanium nitride film 15 and thereafter etched back using SF6 plasma until the surface of the titanium nitride (TIN) film 15 is exposed. At this time, fluorine in SF6 adheres to the surface of the TiN film. The wafer thus treated is maintained in a vacuum atmosphere and then a removing step is performed to remove fluorine from the surface of the TiN film.

Description

BACKGROUND OF THE INVENTION
The present invention relates to a method of producing a semiconductor device having the so-called buried contact structure and, more particularly, to an improvement in method for forming such a buried contact structure that employ a tungsten (W) plug.
In a semiconductor device, an electrical connection between lower-level and upper-level wiring layers or between a wiring layer and a semiconductor region is performed by providing a contact-hole or a via-hole in an interlayer insulating film inervening therebetween. As device integration density increases, the aspect ratio of contact or via-hole size to depth increases.
A conductive wiring layer such as a metal generally made of aluminum or an alloy consisting of aluminum and other metals such as silicon and copper is deposited by a spattering method to fill and connect the holes. However, an aluminum layer deposited by the spattering method cannot completely fill a hole having a large aspect ratio. Therefore, it has been proposed that the hole provided in the interlayer insulating film be filled with a refractory metal plug such as tungsten. Such a structure is called buried contact structure.
The hole with the tungsten plug is formed as follows: First, a silicon substrate having a diffusion region or a polysilicon layer serving as a lower-level wiring layer is covered with a silicon oxide film as an interlayer insulating film, and the silicon oxide film is selectively removed to form a contact-hole exposing a part of the diffusion region or a via-hole exposing a part of the lower-level wiring layer. Thereafter, a titanium (Ti) layer and a titanium nitride (TIN) layer are deposited in that order on the entire surface of the substrate, followed by forming a blanket tungsten layer by the CVD method using WF6 H2 on the entire surface of the substrate. The blanket tungsten layer is then etched back using SF6 until the surface of the TiN layer is exposed. The tungsten plug filling the hole is thus formed. Subsequently, an aluminum or aluminum alloy is deposited over the entire layer and then patterned to form an aluminum wiring layer.
In the method above-mentioned, however, fluorine is adhered on the TiN layer when the blanket tungsten layer is etched back the fluorine and titanium react to form using SF6 and thereafter, grains of titanium fluoride on the TiN layer when the wafer is exposed to the atmosphere for a long time.
It has found that when a wafer is exposed to the atmosphere, moisture in the atmosphere reacts with the fluorine to form hydrogen fluoride (HF), the surface of the titanium nitride film is fluorinated by the hydrogen fluoride, and grains of titanium fluoride is formed. Moreover, the aluminum alloy film the forming wires may not be smoothly etched due to the grains of titanium fluoride or a short circuit may be formed between wires. The adherence of the aluminum alloy may be impaired resulting in reduced yield and reliability of the semiconductor devices.
The inventor has studied relationship between the number of occurring grains of titanium fluoride with time exposure of the wafer to the atmosphere after the blanket tungsten layer is etched back using SF6. FIG. 3 shows the result of this study wherein the X axis represents the exposure time of the wafer in the atmosphere after the blanket tungsten layer is etched back by using SF6 and the Y axis represents the number of occurring grains of titanium fluoride.
Referring to FIG. 3, the number of grains of titanium fluoride hardly increases within 4 hours in the atmosphere after the blanket tungsten layer is etched back using SF6 but rapidly increases after 4 hours exposure. That is, substantially only fluorine will adhere to the titanium nitride in the first 4 hours.
Then, the fluorine on the TiN layer and the grains of titanium fluoride are removed using methods as disclosed in Japanese Laid-open Patent Application No. Hei 6-140372.
For example, the grains of titanium fluoride on the TiN layer may be removed by soaking the titanium nitride film in an alkali solution such as ammonia to slightly etch the surface of the film. Alternatively, the grains of titanium flouoride may be removed by etching using argon gas.
However, both methods etch the entire surface on the substrate. That is, since the tungsten plugs also are etched, a resistance between the lower-level layer and the upper-level layer increases. It is difficult to remove fluoride itself.
Accordingly, it is better to remove the fluorine before fluorine reacts with titanium.
The first method removing fluorine on the TiN layer is to remove the wafer with the fluorine on the TiN layer from the CVD chamber and heating the wafer in an inert gas before the fluorine reacts with titanium in the TiN layer. The second method is to soak the wafer in pure water to wash off the fluorine it reacts with the titanium.
A plurality of processes is required in series to complete production of semiconductor products. Therefore, the apparatus to remove fluorine is often used to produce other semiconductor products when the step of etching back the blanket tungsten using SF6 is finished. However, the same etching apparatus may be needed for treating other semiconductor products. Moreover, the apparatus conditions used for etching the surface on the substrate and the apparatus conditions used to remove fluorine are difference. Accordingly, the wafer finishing to etch the blanket tungsten using SF6 may be moved from the etching apparatus and left in the atmosphere. However, the etching apparatus is usually used continuously more than 4 hours. It becomes impossible to practice the first or second method for removing fluorine within 4 hours after the blanket tungsten is etched back using SF6 in fact.
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to provide a method for completely removing fluorine from the surface of a titanium nitride film even if a wafer is left for a long time after etching the whole surface of a blanket tungsten layer. It is another object of the present invention to provide a method for ensuring removal of the fluorine on a titanium nitride film within 4 hours after etching the whole surface of a blanket tungsten layer. It is still another object of the present invention to provide a method for improving the fabrication yield and reliability of semiconductor devices.
A method of fabricating semiconductor device of the present invention comprises the steps of:
forming a barrier layer containing titanium nitride on a semiconductor substrate;
depositing a blanket tungsten layer on the barrier layer;
etching back the blanket tungsten layer using a reactive gas containing fluorine until the surface of titanium nitride is exposed in a first chamber;
removing fluroine on the titanium nitride in a second chamber; and
keeping the wafer in a vacuum atmosphere when transferring the wafer in the first chamber into the second chamber.
BRIEF DESCRIPTION OF THE DRAWINGS
The above and other objects, advantages, and featur of the present invention will be more apparent from the following description taken in conjunction with the accompanying drawings, in which:
FIGS. 1A to 1E are cross sectional views illustrati of respective steps of producing a semiconductor device according to a embodiment of the present invention;
FIG. 2 is a schematic diagram of a semiconductor device fabrication system employed in the method shown in FIG. 1 for explaining an embodiment of the present invention; and
FIG. 3 is a graph for explaining advantages of the present invention and disadvantages of the prior art.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring now to FIG. 1, the description will be made below on the first embodiment of the present invention.
First, as shown in FIG. 1A, a silicon oxide film 13 is formed on a silicon substrate 11 with a diffusion layer 10. A polysilicon layer 12 serving as a lower-level wiring layer is formed and pattern-etched. The surface of the layer 12 is further covered with a silicon oxide film 13. Thereafter, a contact-hole 13a reaching the diffusion layer 10 and a via-hole 13b reaching the polysilicon layer 12 is formed at a desired position of the silicon oxide film 12 by a selective etching process.
Then, as shown in FIG. 1B, a titanium film 14 and a titanium nitride film 15 are formed in that order by sputtering up to a thickness of 10 to 100 nm and a thickness of 50 to 200 nm respectively. The titanium film 14 is necessary to decrease contact resistances with the silicon substrate 11 and the polysilicon layer 12. Moreover, it is preferable that the titanium film 14 has a thickness of 10 nm or more at the bottom of the contact-hole 13a or the via-hole 13b and the film thickness is determined by the depth and diameter of the contact-hole 13a or the via-hole 13a. Furthermore, the titanium nitride film 15 is necessary to prevent a substrate or a polysilicon layer and WF6 serving as a source gas for depositing tungsten from reacting each other.
Then, as shown in FIG. 1C, a blanket tungsten layer 16 is formed up to a thickness of 0.5 to 1.0 μm by low-pressure chemical vapor deposition. To completely flatten a contact-hole 13a or a via-hole 13b, it is necessary to form the film 16 up to a thickness approximately equal to or more than the width (diameter) of the contact-hole 13a or the via-hole 13b. Moreover, the blanket tungsten layer 16 is mainly formed by a method of reducing WF6 by hydrogen having a preferable covering property. Before forming the layer 16, however, it is preferable to deposit a thin tungsten film by reducing WF6 by SiH4 in order to stably form the blanket tungsten layer 16. Deposition of the blanket tungsten layer 16 is performed at a temperature of 400° to 500° C. and a pressure of several hundreds of mTorr.
Then, a post-treatment method etching back the whole surface of the blanket tungsten layer 16 is described below by referring to the semiconductor device fabrication system shown in FIG. 3. The system has 4 chambers. Each of the chambers has a vacuum pump (not shown). A load-lock chamber 1 has a gate valve 6 connected to outside of the system. An etching chamber 3 has a gas valve 5 such as an inert gas. A post-treatment chamber 4 has a gas valve 5 such as nitrogen gas. A vacuum chamber 2 has gate valves 7, 8, 9 connected to the chamber 1, 4, 3 respectively. The vacuum chamber 2 transfers a wafer among the chambers 1, 3, 5 while keeping a vacuum atmosphere.
First, a wafer formed the blanket tungsten layer 16 on the substrate is placed in load-lock chamber 1. Then, the wafer transferred to etching chamber 3 through a vacuum chamber 2.
Then, as shown in FIG. 1D, the whole surface of the blanket tungsten layer 16 is dry-etched in SF6 gas to expose the surface of the titanium nitride film 15 at a flat portion and leave the tungsten only in the via-hole 13b or the contact-hole 13a. A tungsten plug 16a,b filling the hole 13a, 13b respectively are thus formed. Just then, the fluorine 18 is adhered on titanium nitride film 15.
After the whole surface of the blanket tungsten layer on the wafer is etched back in the etching chamber 3, the wafer is transferred to a post-treatment chamber 4 through the vacuum chamber 2. Then, the wafer may be left in the vacuum chamber 2 for a long time, for example, more than 4 hours.
The fluorine 18 on the surface of the titanium nitride film 16 is dissociated and removed by setting the treatment pressure in the post-treatment chamber 4 to 0.3 Torr or lower, raising the wafer temperature to 220° C. or higher, and blowing nitrogen on the wafer surface for 20 sec or more. The fluorine also can be dissociated and removed by setting the treatment pressure in the vacuum chamber to 0.3 Torr or lower in the nitrogen gas, raising the wafer temperature 220° C. or higher. It is not fully understood why fluorine can be removed by this method. However, it is believed that the fluorine is removed by chemical action.
FIG. 3 shows residence relation between the time of the wafer in the atmosphere after the above treatment is applied to the wafer and the number of grains of titanium fluoride format by a broken line. As the result, titanium fluoride is not formed even if a wafer is left in the atmosphere for a long time.
It is possible to use not only nitrogen but also an inert gas such as helium, neon, or argon for the above treatment.
Referring to FIG. 1E, an aluminum alloy film is deposited by sputtering. Thereafter, the aluminum alloy film, titanium nitride film 15, and titanium film. 14 are formed into desired shapes and patterned to form aluminum wiring layer 17a, 17b by photolithography and dry etching. Thus, a semiconductor device having a buried contact structure is produced.
The steps of etching back the blanket tungsten layer and removing fluorine are accomplished in their respective chambers. Because fluorine remains on the inner wall of a etching chamber 3 when the blanket tungsten layer is etched back using SF6, therefore, fluorine attaches onto a titanium nitride film again.
Then, the method of removing the fluorine on the surface of the titanium nitride film according to the second embodiment of the present invention is described below. The method from FIG. 1A to 1D is the same method. Then, a wafer is exposed to hydrogen-gas plasma in the post-treatment chamber 4.
Fluorine adhering to the surface of a titanium nitride film on the wafer transferred to the post-treatment chamber 4 intermolecular binding energy between the titanium and the fluorine of 136 kcal/mol. However, the intermolecular binding energy between fluorine and hydrogen is 153 kcal/mol. Therefore, it is possible to separate or disassociates the bound titanium and fluorine from each other by plasma and remove the fluorine by a chemical reaction of hydrogen-gas plasma without applying thermal treatment.
As described above, the semiconductor device fabrication method of the present invention dry-etches a tungsten film on a titanium nitride film by a gas containing fluorine, then transfers the etched film to a post-treatment chamber from the etching chamber without exposing it to the atmosphere, and removing fluorine from the titanium nitride film in the post-treatment chamber. Therefore, it is possible to completely remove fluorine from the surface of the titanium nitride film and prevent grains of titanium fluoride from occurring on the surface of the titanium nitride film. Thus, the present invention makes it possible to form an aluminum wiring having a via-hole covered with a tungsten film at a high adhesiveness without causing a short circuit between wires and improve the yield and reliability of semiconductor devices.
It is apparent that the present invention is not limited to the above embodiments but may be modified and changed without from the scope and spirit of the invention.

Claims (3)

What is claimed is:
1. A method of fabricating a semiconductor device comprising the steps of:
forming over a semiconductor substrate a conductive layer including titanium;
forming a tungsten film on said conductive layer;
etching back said tungsten film by using a reactive gas containing fluorine until a surface of said conductive layer is exposed; and
heating said semiconductor substrate in a temperature of 220° C. or higher in an inert gas to thereby remove fluorine from the surface of said conductive layer without etching said conductive layer;
wherein said semiconductor substrate is kept in a vacuum atmosphere after the step of etching back until the step of heating.
2. A method of fabricating a semiconductor device comprising the steps of:
forming an insulating film on a semiconductor substrate;
selectively forming a hole in said insulating film to expose a part of said semiconductor substrate;
forming a barrier layer containing titanium nitride in contact with said insulating film and said part of said semiconductor substrate;
depositing tungsten on said barrier layer to form a tungsten blanket layer;
etching back said tungsten blanket layer by using a reactive gas containing fluorine until a surface of said barrier layer is exposed to thereby form a tungsten plug filling said hole;
keeping said semiconductor substrate having said tungsten plug in a vacuum atmosphere containing an inert gas;
releasing said semiconductor substrate from said vacuum atmosphere; and
heating said semiconductor substrate in 220° C. or higher in an inert gas to thereby remove fluorine from said surface of said barrier layer without etching said barrier layer.
3. A method of fabricating a semiconductor device using such an apparatus that has a first chamber, a second chamber and a vacuum chamber coupled between said first and second chambers, said method comprising the steps of:
loading a semiconductor wafer into said first chamber, said semiconductor wafer including a conductive layer containing titanium and a tungsten layer formed on said conductive layer;
etching back said tungsten layer in said first chamber; taking out said wafer from said first chamber and loading said wafer into said second chamber through said vacuum chamber; and
heating said semiconductor substrate in 220° C. or higher in an inert gas in said second chamber to thereby remove fluorine from said surface of said barrier layer without etching said barrier layer.
US08/634,402 1995-04-27 1996-04-18 Method for fabricating semiconductor device having buried contact structure Expired - Lifetime US5731225A (en)

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JP7125677A JP2836529B2 (en) 1995-04-27 1995-04-27 Method for manufacturing semiconductor device
JP7-125677 1995-04-27

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US6498095B2 (en) * 1998-03-16 2002-12-24 Nec Corporation Cvd method for producing an interconnection film by depositing a lower layer to fill a recess performing a cleaning step to remove dissociated reactant gas, and consequently depositing an upper layer that has a smaller impurity concentration than the lower layer
US6670267B2 (en) * 2001-06-13 2003-12-30 Mosel Vitelic Inc. Formation of tungstein-based interconnect using thin physically vapor deposited titanium nitride layer
US6835646B2 (en) 2001-10-12 2004-12-28 Promos Technologies, Inc. Forming conductive layers on insulators by physical vapor deposition
US6982226B1 (en) * 1998-06-05 2006-01-03 Agere Systems Inc. Method of fabricating a contact with a post contact plug anneal
US20060046457A1 (en) * 2004-08-26 2006-03-02 Elpida Memory, Inc. Method of manufacturing semiconductor device
US20070249849A1 (en) * 2004-10-27 2007-10-25 Lars Wiebe Process
US20140120684A1 (en) * 2012-07-26 2014-05-01 Micron Technology, Inc. Methods of Forming Capacitors
US9224798B2 (en) 2008-01-08 2015-12-29 Micron Technology, Inc. Capacitor forming methods
US20170011988A1 (en) * 2013-07-31 2017-01-12 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor Device Having Backside Interconnect Structure on Through Substrate Via and Method of Forming the Same
US10465287B2 (en) * 2018-02-09 2019-11-05 United Microelectroncis Corp. Semiconductor device and method of forming the same

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KR20030052828A (en) * 2001-12-21 2003-06-27 동부전자 주식회사 Fabricating method of metal wire in semiconductor

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Cited By (20)

* Cited by examiner, † Cited by third party
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US5946596A (en) * 1996-10-18 1999-08-31 Taiwan Semiconductor Manufacturing Co., Ltd. Method for preventing polycide line deformation by polycide hardening
US6498095B2 (en) * 1998-03-16 2002-12-24 Nec Corporation Cvd method for producing an interconnection film by depositing a lower layer to fill a recess performing a cleaning step to remove dissociated reactant gas, and consequently depositing an upper layer that has a smaller impurity concentration than the lower layer
US6982226B1 (en) * 1998-06-05 2006-01-03 Agere Systems Inc. Method of fabricating a contact with a post contact plug anneal
US6670267B2 (en) * 2001-06-13 2003-12-30 Mosel Vitelic Inc. Formation of tungstein-based interconnect using thin physically vapor deposited titanium nitride layer
US6787914B2 (en) 2001-06-13 2004-09-07 Mosel Vitelic, Inc. Tungsten-based interconnect that utilizes thin titanium nitride layer
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US20060046457A1 (en) * 2004-08-26 2006-03-02 Elpida Memory, Inc. Method of manufacturing semiconductor device
US7371680B2 (en) * 2004-08-26 2008-05-13 Elpida Memory Inc. Method of manufacturing semiconductor device
US20070249849A1 (en) * 2004-10-27 2007-10-25 Lars Wiebe Process
US7683187B2 (en) * 2004-10-27 2010-03-23 Danisco A/S Process for producing delta-lactones
US9224798B2 (en) 2008-01-08 2015-12-29 Micron Technology, Inc. Capacitor forming methods
US20140120684A1 (en) * 2012-07-26 2014-05-01 Micron Technology, Inc. Methods of Forming Capacitors
US9196673B2 (en) * 2012-07-26 2015-11-24 Micron Technology, Inc. Methods of forming capacitors
US20160055973A1 (en) * 2012-07-26 2016-02-25 Micron Technology, Inc. Methods Of Forming Capacitors
US9799658B2 (en) * 2012-07-26 2017-10-24 Micron Technology, Inc. Methods of forming capacitors
US20170011988A1 (en) * 2013-07-31 2017-01-12 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor Device Having Backside Interconnect Structure on Through Substrate Via and Method of Forming the Same
US10510641B2 (en) * 2013-07-31 2019-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having backside interconnect structure on through substrate via and method of forming the same
US11056419B2 (en) 2013-07-31 2021-07-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having backside interconnect structure on through substrate via and method of forming the same
US11823979B2 (en) 2013-07-31 2023-11-21 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming semiconductor device having backside interconnect structure on through substrate via
US10465287B2 (en) * 2018-02-09 2019-11-05 United Microelectroncis Corp. Semiconductor device and method of forming the same

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DE69622781T2 (en) 2003-04-10
KR100259692B1 (en) 2000-06-15
TW298673B (en) 1997-02-21
EP0740336A2 (en) 1996-10-30
EP0740336A3 (en) 1998-01-21
DE69622781D1 (en) 2002-09-12
JP2836529B2 (en) 1998-12-14
EP0740336B1 (en) 2002-08-07
JPH08306781A (en) 1996-11-22
KR960039157A (en) 1996-11-21

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