JP2817667B2 - Variable frequency sine wave generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a variable frequency sine wave generating circuit, and more particularly, to a multi-valued FSK (Frequency SSK) used in a radio transceiver for digital communication.
high-keying) modulation circuit and a frequency hopping level whose hopping level (frequency change width) is relatively low.
The present invention relates to a variable frequency sine wave generation circuit used for a synthesizer or the like.

[0002]

2. Description of the Related Art Conventionally, this type of variable frequency sine wave generating circuit obtains a sine wave output of a desired frequency by an analog control voltage.
There is a technology described in Japanese Patent Publication No.

FIG. 5 is a block diagram showing this technique, and FIG. 6 is a timing chart of signals during operation. This frequency variable type sine wave generation circuit includes an adder 19, a one-timing delay circuit 20, and a sine wave converter 21 as shown in FIG. The sine wave converter 21
A memory 22 for storing sine wave data and a DA converter 23 are provided. In FIG. 5, V is the analog DC voltage, T is the clock time, n is zero or a positive integer, and V (nT) is the DC voltage V controlled by the nth clock, and after nT time It represents a pulse voltage input to the adder 19.

The pulse voltage φ (nT) of the output of the adder 19
Is supplied to the sine wave converter 21 and the one timing delay circuit 20. Then, the pulse voltage φ (nT) given to one timing delay circuit 20 is given to adder 19 with a delay of one clock time T, and pulse voltage φ [(n−1)
T]. Therefore, the pulse voltage φ (nT) of the adder 19 after the elapse of the nT time is V (nT) + φ
[(N-1) T]. As a result, the output voltage of the adder 19 has a sawtooth waveform as shown by b or c in FIG. When the saw-tooth waveform b or c reaches a predetermined maximum voltage value Vf, the adder 19 overflows, resets and returns to zero, and performs the first addition operation from here, and performs the saw-tooth waveform. Waveform b is repeatedly output.

In this case, the value of the input DC voltage V in the sawtooth waveforms b and c is smaller in the case of b than in the case of c.
The memory 22 is accessed using the sawtooth waveform digital signal as shown by b or c as an address signal, and sine wave data is read. That is, for each of the saw-tooth waves b or c shown in FIG. 6A, one-cycle sine wave data of T1 and T2 is read from the memory 22 and input to the DA converter 23. Is done. Then, an analog sine wave as shown in FIG. 6B or 6C is output from here.

In this case, as the frequency of the generated sine wave output increases, that is, as the value of the analog control voltage V increases, the number of sine waveform data read out from the memory 22 decreases. For this reason,
The sine waveform output from the DA converter 23 tends to be stepped. This tendency is smoothed by connecting a low-pass filter to the output side of the DA converter 23 to remove unnecessary high-frequency components, and can be avoided.

[0007]

However, in the above-mentioned conventional frequency-variable sine wave generating circuit, when the value of the analog DC voltage V (nT) shown in FIG. (N-1) T] and the output value of the sine wave converter 21 and the voltage V (nT).
A large level difference occurs with the output value of For this reason, abrupt phase discontinuity occurs, and the occupied frequency bandwidth is unduly widened, and the signal-to-noise ratio is reduced. As a result, there arises a problem that the transmission characteristic is deteriorated and interference occurs with other communication channels and the like.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has a variable frequency sine wave generation circuit capable of suppressing frequency spread at discontinuous points and maintaining a constant quality of generated sine waves. The purpose is to provide.

[0009]

According to a first aspect of the present invention, there is provided a frequency synthesizer for generating a sine wave signal based on a predetermined reference signal. A plurality of systems including a waveform shaper that generates a clock signal based on a sine wave signal, a presettable phase counter that generates a sawtooth wave digital signal based on the clock signal, and a sawtooth output from the plurality of systems A selector for selecting any one of the waveform digital signals; a sine waveform data ROM for reading sine waveform data based on the sawtooth digital signal selected by the selector; and a sine waveform data ROM. A DA converter for converting the read sine wave waveform data into an analog sine wave, and a presettable phase clock of a system to be selected next After confirming a stable oscillation state of the data,
The output value of the sawtooth wave digital signal output from the presettable phase counter of the currently selected system is taken in as an initial phase value, and the presettable phase counter of the next selected system is driven from the initial phase value. And a frequency switching control circuit for controlling the selector so as to select the output.

According to a second aspect of the present invention, after the frequency switching control circuit receives a lock detection signal from a presettable phase counter of a system to be selected next and confirms the stable oscillation state, the frequency switching control circuit sets the preset timing trigger to the predetermined timing. By outputting to the presettable phase counter of the next selected system, the output value of the sawtooth wave digital signal output from the presettable phase counter of the currently selected system is reset to the preset of the next selected system. As well as letting the double phase counter take in the initial phase value, and selecting the output of the presettable phase counter of this system,
It is configured to control the selector.

According to a third aspect of the present invention, in the frequency variable sine wave generating circuit according to the second aspect, the selector inputs the sawtooth wave digital signal output from the presettable phase counter of each system. The frequency switching control circuit has a plurality of state buffers, and the frequency switching control circuit operates a three-state buffer corresponding to the presettable phase counter to be selected next.

[0012]

According to the first aspect of the invention, a sine wave signal is oscillated from the frequency synthesizer of each system, and a clock signal is generated from the waveform shaper based on the sine wave signal. Then, in the presettable phase counter, a sawtooth wave digital signal is generated based on the clock signal from the waveform shaper. Then, the sine wave waveform data RO
At M, the sine wave waveform data is read out based on the sawtooth wave digital signal selected by the selector among the sawtooth wave digital signals output from the plurality of systems, and this sine wave waveform data is stored in the D-A It is converted to an analog sine wave by the converter. In such an operation state, when the frequency switching control circuit confirms the stable oscillation state of the presettable phase counter of the system to be selected next, the sawtooth output from the presettable phase counter of the currently selected system is output. The output value of the waveform digital signal is taken as an initial phase value by a presettable phase counter of a system to be selected next, and the presettable phase counter is driven from this initial phase value. Then, the output is selected by the selector, and the frequency of the analog sine wave output from the DA converter is switched.

According to the second aspect of the present invention, when the frequency switching control circuit receives the lock detection signal from the presettable phase counter of the system to be selected next and confirms the stable oscillation state, the frequency switching control circuit switches the preset timing trigger to the next. Is output to the presettable phase counter of the system to be selected. Thus, the output value of the sawtooth wave digital signal output from the presettable phase counter of the currently selected system is taken into the presettable phase counter of the next selected system as the initial phase value, and the preset value of this system is reset. The frequency switching control circuit controls the selector so as to select the output of the double phase counter.

According to the third aspect of the present invention, the frequency switching control circuit operates the three-state buffer corresponding to the presettable phase counter to be selected next among the plurality of three-state buffers of the selector. The sawtooth digital signal from the presettable phase counter is input to the sine waveform data ROM.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 is a block diagram showing a variable frequency sine wave generating circuit according to a first embodiment of the present invention. The frequency variable type sine wave generation circuit of the present embodiment includes frequency synthesizers 2 and 10, waveform shapers 3 and 11, presettable phase counters 4 and 12, selector 5, sine wave waveform data ROM 7, D- It has two systems consisting of an A converter 8 and a low-pass filter 9.

The frequency synthesizers 2 and 10 have a function of generating two sets of frequency-variable sine waves S1-1 and S2-1, and the waveform shapers 3 and 11 output signals from the frequency synthesizers 2 and 10 respectively. Sine waves S1-1 and S2-1
Are converted into clock signals C1 and C2, respectively, and output. In addition, the presettable phase counters 4, 1
Reference numeral 2 denotes a sawtooth digital signal S1-3, S2- having a slope (time / level characteristic) corresponding to the frequency of the clock signals S1-2 and S2-2 output from the waveform shapers 3 and 11.
3 is a device that generates

The selector 5 selects one of the sawtooth digital signals S1-3 and S2-3 from the presettable phase counters 4 and 12 under the control of the frequency switching control circuit 6, and outputs the sinusoidal waveform data ROM7. Is output to

The sine wave waveform data ROM 7 stores the sine wave waveform data D, and has a function of reading the sine wave waveform data D addressed by the outputs of the presettable phase counters 4 and 12 selected by the selector 5. This is the memory that we have.

The DA converter 8 outputs the sine wave waveform data RO
This is a device that converts the sine wave waveform data D read from M7 into an analog sine wave A.
An unnecessary high-frequency component is removed from the analog sine wave A output from the A-A converter 8 and smoothed.
This is a filter that outputs out.

The frequency synthesizer 2 includes a programmable divider 201, a phase comparator 202, a low-pass filter 203, and a VCO 204. Accordingly, the frequency synthesizer 2 inputs the hopping frequency data C1 from the outside to the programmable divider 201, and divides the oscillation frequency of the VCO 204 by the programmable divider 201 using the phase of the oscillation signal from the reference signal generator 1 as a reference phase. I do.

Then, the phase comparator 202 compares the reference phase of the reference signal generator 1 with the reference phase, and controls the oscillation frequency of the VCO 204 so that the phase error output from the phase comparator 202 becomes zero. Therefore, the frequency synthesizer 2
Can generate a sine wave S1-1 having a frequency substantially equal to the oscillation frequency accuracy of the reference signal generator 1. The frequency synthesizer 10 also uses the reference signal generator 1 as a reference phase shifter, and has the same configuration as the frequency synthesizer 2.

More specifically, the hopping frequency data C1 of the two frequency synthesizers 2 and 10 is discretely switched to change the oscillation frequency, and the corresponding waveform shapers 3, 1
The one after 1 is selected by the selector 5. When the system of the frequency synthesizer 2 is selected, when the clock signal S1-2 at the rate output from the frequency synthesizer 2 via the waveform shaper 3 is input to the presettable phase counter 4, the presettable phase counter 4 outputs a sawtooth wave digital signal S1-3 by the integration operation.

When the presettable phase counter 4 counts a predetermined coefficient possible value, it overflows and returns to a state where the initial count value is zero, counts the clock again, and increases the sawtooth which increases in proportion to time. It has a function of outputting the wave-shaped digital signal S1-3.

The sine wave waveform data ROM 7 has a resolution corresponding to the shortest period clock output from the waveform shapers 3 and 11, that is, the frequency synthesizers 2 and 10
The sine wave waveform data D is stored in advance with a resolution corresponding to the upper limit cycle of the sine wave frequency output from. That is, in the sine wave waveform data ROM 7, the address value corresponds to the time axis of the sine wave, and the sine wave waveform data D stored at each address indicates the amplitude of the sine wave at the corresponding time of each address. .

Therefore, the sawtooth-wave digital signal S1-3 output from the presettable phase counter 4 is added to the sine-wave waveform data ROM 7 as an address value, and the sine-wave waveform data D is read out. By inputting, an analog sine wave A is obtained.

As a result, the presettable phase counter 4 counts a predetermined countable value and outputs the cycle of the sawtooth digital signal S1-3 and the analog signal generated via the DA converter 8. The period of the sine wave A matches.

Conversely, when the frequency synthesizer 10 is selected by the frequency switching control circuit 6, the frequency of the analog sine wave A of the DA converter 8 is output by the integrating operation of the presettable phase counter 4. Sine wave S1
The sine wave S2- output from the frequency synthesizer 10 from the frequency of -1 to the frequency of the hopping frequency data C1
When changing to the frequency of 1, the waveform of the analog sine wave A maintains phase continuity at this frequency change point. The waveform of the analog sine wave A output from the DA converter 8 is a stepped sine wave having a resolution corresponding to the number of bits of the sine wave waveform data D input to the DA converter 8. This stepped sine wave is smoothed through the low-pass filter 9 to make a smooth sine wave signal Sout.

Next, the operation of this embodiment will be described with reference to FIG. FIG. 2 is a timing chart at the time of operation of the frequency variable sine wave generation circuit of the present embodiment. The frequency synthesizer 2 reads the hopping frequency data C1 of the frequency f1 from the outside into the programmable divider 201, and serially inputs the data at the timing of the read clock C2. Thereafter, the data is stored at the rising edge of the read strobe Y1, and the generation of the sine wave S1-1 having the frequency f1 is started. When the frequency of the generated sine wave S1-1 locks to f1, the phase comparator 202 changes the lock detection signal L1 of the status signal from logic L to logic H indicating the lock state, and outputs it to the frequency switching control circuit 6. .

After receiving the read strobe Y1 and detecting that the lock detection signal L1 becomes logic H, the frequency switching control circuit 6 outputs a preset timing trigger T1 and outputs a sawtooth output from the presettable phase counter 12. The output value of the wave-shaped digital signal S2-3 is taken into the presettable phase counter 4 as a preset phase value.

The presettable phase counter 4 reads the preset phase value at the rising timing of the preset timing trigger T1, and starts outputting the sawtooth wave digital signal S1-3 as an initial value. After outputting the preset timing trigger T1, the frequency switching control circuit 6 changes the switching control signal C from logic L to logic H, controls the selector 5, and outputs the output of the selector 5 to the sawtooth digital signal of the presettable phase counter 12. The signal is switched from the signal S2-3 to the sawtooth wave digital signal S1-3 of the presettable phase counter 4. Thus, the low-pass filter 9 outputs a sine wave signal Sout having the output frequency f1.

Next, the sine wave signal Sou of the low-pass filter
When the output frequency of t is changed to f2, the system on the frequency synthesizer 10 side generates the output frequency f1 by the system on the frequency synthesizer 2 side in order to maintain phase continuity at the transition point from the frequency f1 to the frequency f2. Control is performed similarly. That is, the frequency synthesizer 10 serially inputs the hopping frequency data C1 of the frequency f2 from the outside at the timing of the read clock C2, stores the data at the rising edge of the read strobe Y1, and stores the sine wave S of the frequency f2.
The generation of 2-1 starts. When the frequency of the generated sine wave S2-1 is locked to f2, the lock detection signal L2 is changed from logic L to logic H indicating the locked state and output to the frequency switching control circuit 6.

The frequency switching control circuit 6 receives the read strobe Y2, detects that the lock detection signal L2 becomes logic H, outputs a preset timing trigger T2, and outputs a sawtooth output from the presettable phase counter 4. The output value of the waveform digital signal S1-3 is taken into the presettable phase counter 12 as a preset value.

The presettable phase counter 12 detects the rising timing of the preset timing trigger T2,
This preset phase value is read, and the output of the sawtooth wave digital signal S2-3 is started as an initial value. And
The switching control signal C is changed from logic H to logic L to control the selector 5, and the output of the selector 5 is changed from the sawtooth digital signal S1-3 of the presettable phase counter 4 to the sawtooth digital signal of the presettable phase counter 12. S
Switch to 2-3.

Thus, the sine wave signal Sout having the output frequency f2 is output from the low-pass filter. Thereafter, in response to changing the hopping frequency data C1 from f1 'to f2', the system on the frequency synthesizer 2 side and the system on the frequency synthesizer 10 side are alternately switched at the same timing as described above, so that the low pass filter The frequency of the sine wave signal Sout switches from f1 'to f2'.

(Second Embodiment) FIG. 3 is a block diagram showing a variable frequency sine wave generating circuit according to a second embodiment of the present invention. In the present embodiment, the two systems of the frequency synthesizer, the waveform shaper, and the presettable phase counter of FIG. 1 are extended to n systems. Correspondingly, the selector 5 of the first embodiment
, An extended selector 50 is provided. That is, n presettable phase counters 4 and 1 of each system
18 are inserted into buses by inserting n 3-state buffers 13, 14,. The frequency switching control circuit 6 connects the n switching control signals K1, K2 to Kn to the three-state buffers 13, 14,... I made it possible.

Then, n frequency synthesizers 2,
15 and read strobes Y1 to Yn input to the frequency switching control circuit 6, frequency synthesizers 2,
The lock detection signals L1 to Ln input to the frequency switching control circuit 6 from 10... 15 and the preset timing triggers T1 to Tn and 3 output from the frequency switching control circuit 6 to the presettable phase counters 4, 12,.
The switching control signals K1 to Kn input to the state buffers 13, 14,... Thus, by lowering the impedance of the selected three-state buffer by the switching control signal held in the output status of logic H, the saw-tooth waveform digital signal is output from the three-state buffer to the sine wave waveform data ROM 7. can do.

FIG. 4 is a timing chart at the time of operation of the frequency variable sine wave generation circuit of the present embodiment.
Hopping frequency data C
1, read clock C2, read strobe Y1
When switching from 1 → 2... → n → 1 by Yn,
As shown in FIG. 4, the frequency of the sine wave signal Sout output from the low-pass filter 9 is f1 → f2 → fn → f1
'Is switched. The system can be switched not by the cyclic switching as described above but by the hopping frequency data C1, the read clock C2, and the read strobes Y1 to Yn, so as to obtain the optimum output frequency. Of course. The other configurations and operations are the same as those of the first embodiment, and thus the description thereof is omitted.

[0038]

As described above, according to the frequency-variable sine wave generating circuit of the present invention, when the frequency of the output signal is switched, the spread of the frequency at the discontinuous point can be greatly suppressed. There is an effect that the quality of the output signal can be kept constant regardless of the reading speed of the data ROM.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a variable frequency sine wave generation circuit according to a first embodiment of the present invention.

FIG. 2 is a timing chart at the time of operation of the frequency variable sine wave generation circuit of the present embodiment.

FIG. 3 is a block diagram showing a variable frequency sine wave generation circuit according to a second embodiment of the present invention.

FIG. 4 is a timing chart at the time of operation of the frequency variable sine wave generation circuit of the present embodiment.

FIG. 5 is a block diagram showing a conventional variable frequency sine wave generation circuit.

6 is a timing chart of signals when the frequency-variable sine wave generation circuit of FIG. 5 operates.

[Explanation of symbols]

 2,10 Frequency synthesizer 3,11 Waveform shaper 4,12 Presettable phase counter 5 Selector 6 Frequency switching control circuit

Claims (3)

(57) [Claims] 1. A frequency synthesizer that oscillates a sine wave signal based on a predetermined reference signal, a waveform shaper that generates a clock signal based on the sine wave signal, and a sawtooth digital signal based on the clock signal A plurality of systems including a presettable phase counter for generating a signal, a selector for selecting any of the sawtooth digital signals output from the plurality of systems, and a sawtooth digital signal selected by the selector A sine wave waveform data ROM for reading sine wave waveform data based on the sine wave waveform data, a DA converter for converting the sine wave waveform data read from the sine wave waveform data ROM to an analog sine wave, After confirming the stable oscillation state of the presettable phase counter of the system, the presettable phase counter of the currently selected The output value of the applied sawtooth wave digital signal is taken in as an initial phase value, and from this initial phase value, the presettable phase counter of the next selected system is driven, and the selector is selected so as to select the output. A frequency switching type sine wave generation circuit, comprising: a frequency switching control circuit for controlling. 2. The system according to claim 1, wherein said frequency switching control circuit receives a lock detection signal from a presettable phase counter of a system to be selected next, checks its stable oscillation state, and then selects a preset timing trigger next to said system. By outputting to the presettable phase counter of
The output value of the sawtooth wave digital signal output from the presettable phase counter of the currently selected system is taken into the presettable phase counter of the next selected system as an initial phase value, and the preset value of this system is set. 2. The frequency-variable sine wave generation circuit according to claim 1, wherein the selector controls the selector so as to select an output of the double phase counter. 3. The selector has a plurality of three-state buffers for inputting the sawtooth wave digital signals output from the presettable phase counters of the respective systems, and the frequency switching control circuit selects the next one. 3. The frequency-variable sine wave generation circuit according to claim 2, wherein the three-state buffer corresponding to the presettable phase counter is operated.