JP2792085B2 - Control method of reactive power compensator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a factory power supply or the like to which a variable load such as an arc furnace is connected, using a filter facility for harmonic countermeasures,
Static reactive power compensation (SVC)
If an SVC device is installed in which the advanced phase of the filter equipment and phase-advancing capacitor (hereinafter referred to as SC) is larger than the lag of the thyristor control reactor (TCR), The purpose of the present invention is to minimize the rise in the voltage of the existing leading phase by flowing the current of the TCR section to the maximum when the generation of reactive power is small, such as when leaving the warehouse.

[Prior Art and Problems] An SVC device is used to suppress voltage transformation of a system bus to which a rapidly changing load such as an arc furnace is connected.

The SVC device is composed of a TCR that connects an antiparallel thyristor to a high-impedance transformer and supplies a delay component to the system, and a filter, SC, and the like that supplies a lead component to the system.

In this case, the capacity of the SVC requires a large capacity SVC in order to compensate for the possible variation of the total reactive power, but the flicker is affected only by the abrupt reactive power variation ΔQ in, since it comprises a SVC of large capacity is uneconomical, conventionally, defined in variable load is predicted similarly to the maximum reactive power Q _max predicted, the base reactive power Q _B constantly occurs, its to accommodate differential value Q _C = Q _max -Q _B, it defines the capacity of the SVC on the basis of Q _C.

However, in practice base reactive power Q _B is not constant, because of the slowly varying long period, as the aforementioned base reactive power Q _B, the SVC as a fixed bias, can be used for example to control the thyristor And base reactive power
It must be configured with a static bias Q _B also anticipate a change in Q _B, resulting SVC above the sudden change reactive power fluctuation ΔQ in
There is a problem that a capacity is required.

For the purpose of solving such a problem, a control method as shown in FIG. 2 has been proposed. Hereinafter, the configuration will be described. The system bus 3 is connected to the power supply 1. 2
Is a power source side impedance. Variable load on system bus 3
10. A normal load 24 is connected, whereas a high-impedance transformer 4 or a thyristor-controlled reactor TCR in which a thyristor switch 5 is connected in series with the reactor in an anti-parallel manner is installed and connected to the system bus 3. A transformation signal is input to the reactive power (Q) detector 13 from the PT 8 through the phase transformer 12 and a current signal from the CT 9 coupled to the load circuit is input to calculate the reactive power. The output signal is input to the adder 16 via the average value circuit 14 and directly, and a subtraction is performed between the input Q from the direct Q detector 13 and the input Qref from the average value circuit 14 to _obtain a long cycle. The fluctuation is removed, and the reactive power fluctuation ΔQ is obtained.

Reference numeral 25 denotes a fixed bias input to the adder 16. This fixed bias is 1/2 of the steep reactive power fluctuation ΔQ, and is determined from the actual plane based on the maximum fluctuation of ΔQ generated in advance. It was done. This ΔQ.1 / 2 is applied to the adder 16 as a positive bias. The signal to which such a positive bias ΔQ.1 / 2 has been added is input to the pulse generator 22 and converted into a control pulse, and the energization control of the TCR is performed to reduce the energization current to match the ΔQ. Alternatively, ΔQ is compensated for by increasing the value, and steep voltage fluctuation is suppressed.

However, in the case where metal is melted in an electric furnace, generally, during melting from the start of melting, if the operation is performed by the SVC control method, the effect is remarkable, but the voltage fluctuation becomes small, and the load operation is stopped at the time of leaving the warehouse. In this case, the system voltage may rise due to the influence of a capacitor, a filter, and the like that are input to the system. However, only 50% SVC operation can be performed by the bias. In this case, the system voltage rises. The suppression effect is halved.

On the other hand, a load reactive power control circuit and a system voltage control circuit are provided. For example, when the voltage exceeds a certain fixed voltage, the voltage control circuit (AVR control) performs priority control, and at this time, control is performed so as to increase the SVC current. A method of suppressing a voltage rise of a power supply has also been proposed. FIG. 4 shows this method.

This method uses a variable reactive power .DELTA.Q
Further, a bus voltage signal is obtained in a voltage detector 26, and this voltage signal V is compared with _Vref corresponding to a predetermined constant voltage, and a controller (AVR control) 27 detects ΔV exceeding the predetermined voltage _Vref. The adder 16 adds ΔQ to ΔV, passes this through a coefficient circuit 28, and a function circuit 29
An R control pulse is created to suppress the rise in system voltage by increasing the TCR current. FIG. 3 shows an operation waveform diagram.

However, as described above, this method requires two circuits, a reactive power control circuit and a system voltage control circuit. Since the voltage control circuit is an AVR control (feedback control), high-speed control cannot be expected, Since it is always in the control state, it has an adverse effect on flicker suppression control (Q control) in normal times, so that delicate adjustments such as gain distribution and time constant determination of both are required.

[Problems to be Solved by the Invention] As described above, both of the two systems have a function of suppressing voltage flicker, and the latter has an additional function of suppressing system voltage rise. It does not work for suppression, the latter also having a negative effect on voltage flicker suppression during suppression of system voltage rise.

The present invention resides in a control method of a reactive power compensator that can clearly distinguish between reactive power control and system voltage control only with a Q detection control circuit and that can suppress an increase in system voltage without impairing the original reactive power control function. .

The present invention will be described below with reference to embodiments shown in the drawings. 2 and 4 are denoted by the same reference numerals.

The power supply 1 has a power supply impedance 2, a system bus 3 is connected to the power supply 1, a variable load 10 is connected to the system bus 3, and an SC group 6 and a filter group 7 are turned on.

A PT8 is connected to the system bus 3, and a delay transformer 12 is connected to the secondary side thereof.
13 and a load current signal is input to the Q detector 13 from the CT 9 coupled to the load circuit. Here, the value of the reactive power Q is calculated. The Q detector 13 is directly connected to the adder 16 and is also connected to the adder 16 via the average circuit 14. The adder 16 calculates and outputs the value of the variation ΔQ of the reactive power Q. . The output side of the adder 16 'is connected to adder 16' adder 16 other of said ΔQ signal is, bias setting value than the set bias value Q _B and Q bias setting circuit 15 than Q bias setting circuit 15 Integrator 20 with Q _B as input
Output signal Q is input. One adder is sufficient.

Also, the output value from the average circuit 14 is used as one input,
Comparator 22 to the output value Q _L1 than Q limiter setting circuit 23 and the other input is provided, the output side such as a relay 21 which can be turned on and off by the change of the output signal of the comparator 22 is provided. In this case, a semiconductor switch may be used.

Here, S using a TCR composed of an installed anti-parallel thyristor 5 connected in series with a high impedance transformer 4 is used.
When the VC of the control capacity Q _SVC ≒ 1P.U, for example Q set bias value Q _B ≒ 1 / 2P.U bias setting circuit 15, also to a set value Q _L1 ≒ 0.1 pu of Q limiter setting circuit, the average value Time constant ST _{1 of} circuit 14 ≒ number S, time constant ST _{2 of} comparator 22 10 number 10 m
Let S be the time constant of the integrator 20 as number S.

(1) Since the generation of the reactive power is extremely small during the period when the scrap does not come into contact with the voltage, such as when tapping the arc furnace, the output value from the average value circuit 14 becomes small. Comparing this output value Q _L1 at the comparator 22, since this Q _L1 is set to approximately 0.1 pu, the output value of than the average value circuit 14 becomes lower, the smaller the comparator 22 exceeds the Q _L1 Since the output greatly changes, the integration circuit 20 is turned on by the changed signal. Although the adder 16 'is entered set bias value Q _B of about 1 / 2P.U than Q bias setting circuit 15, the set bias Q _B by the operation of the integrator 20
Generated from Q _B in the integrator 20 gradually increases the negative Q in the direction of subtracting, which is input to the adder 16 '. As a result, the output signal Q _S exiting through the inverter 17 from the adder 16 '(+) → (0), and the function circuit
The thyristor gate pulse generator 19 generates a gate pulse with a thyristor firing phase at a timing from the synchronous power supply circuit 11 by a conversion from the synchronous power supply circuit 11 by a timing from the synchronous power supply circuit 11. In this case, the TCR causes a current of 1 PU to flow, and suppresses a system voltage rise caused by the SC group 6 and the filter 7 for harmonics countermeasures inserted into the bus.

(2) When the output signal from the Q detector 13 is large, that is, when the load energization amount is large, the integrator 20 is turned off by the output signal from the comparator 22, so that the integrator 20 is turned off. No input signal. Therefore, the signal input to the adder 16 'is output from the Q bias setting circuit 15, for example, the setting bias of about Q _B ≒ 1 / 2P.U, the Q signal output from the Q detector 13, and the average value circuit 14 thereof. Signal, ie, only the variable reactive power component ΔQ. Said Q _B in good to be added to the ΔQ signal as a plus bias, already operating in the same manner as described for Figure 2, it is possible to compensate for variations in variability reactive power component ΔQ in SVC capacity 1P.U.

That is, in the present invention, during normal operation, for example, when the load is 0.1 PU or more, the reactive power control has priority, and when the load is 0.1 PU or more.
When it becomes equal to or less than PU, the bus voltage rise fluctuation can be suppressed and controlled.

[Effects of the Invention] According to the present invention, the fluctuation of the system voltage can be suppressed only by the Q detection control circuit, and the SVC equipment can be effectively used.

Reactive power control and system voltage control can be clearly distinguished, and an increase in bus voltage can be suppressed without impairing the original reactive power control function.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention. FIG. 2 is a block diagram showing a conventional reactive power compensator for suppressing flicker. FIG. 3 shows an operation waveform diagram of the apparatus shown in FIG. FIG. 4 is a block diagram showing a conventional compensator capable of suppressing flicker and system voltage rise. 6: Capacitor group, 7: Filter group, 13: Q detector, 14: Average circuit, 15: Q bias setting circuit, 1
6, 16 '... adder, 17 ... inverter, 18 ... function circuit, 19 ... thyristor gate pulse generator, 20 ...
Integrators, 21 Relays, 22 Comparators, 23
Q limiter setting circuit.

Claims (1)

(57) [Claims] 1. A reactive power compensator using a thyristor control reactor installed for the purpose of suppressing voltage flicker and voltage fluctuation, comprising: a reactive power detector for a load; and a reactive power average circuit connected to the detector. A reactive power average value from the reactive power average value circuit and a comparator that receives the reactive power value set by the reactive power limiter setting circuit, a reactive power bias setting circuit, and the bias setting circuit, An integrator that is turned on and off based on output fluctuations of a comparator, and obtains a fluctuation reactive power component from a reactive power value and a reactive power average value from a reactive power detector of the load, and the reactive power bias setting circuit Of the thyristor firing phase control by adding the output value passed through the integrator in the direction to subtract the bias value set by Control system for reactive power compensation apparatus characterized by making.