JP2785395B2 - One shot circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a one-shot circuit using a double-balanced multiplication circuit, which can generate a pulse with high accuracy even at a high frequency. is there.

[Conventional technology]

3 and 4 show a circuit diagram of a conventional wasted circuit and a waveform diagram for explaining the operation thereof.

In FIG. 3, 1, 2 are input terminals, 10, 11 are output terminals,
Q _{7 to} Q ₁₂ and 7, 8 are transistors and resistors (resistance value R _L ) constituting a double-balanced multiplier, and Q ₃ , Q ₄ and 3 are for generating an input signal of the double-balanced multiplier. a transistor and a capacitor (a and C ₀ capacitor), 4,6 and 9 is a constant current source of the current I _1, I _2. Incidentally, I ₇ ~I ₁₂ is a current through the first transistor Q ₇ to Q _12.

Next, the operation of FIG. 3 will be described with reference to FIG. 4, which is a waveform diagram of a main part.

Consider a case where input waveforms as shown in FIGS. 4A and 4B are applied to the input terminals 1 and 2. However, the input voltage difference ΔV is different from each of the differential transistors Q _{7 to} Q ₁₀ of the double balance type multiplication circuit.
Should be able to switch sufficiently.

When the input terminal 1 is at the L level ( _Vcc- .DELTA.V) and the input terminal 2 is at the H level ( _Vcc ), the voltage VA at the point _A is as shown in FIG.
As shown in FIG. 4 (d), V _A = V _cc −ΔV−V _BE , and the voltage V _B at the point _B becomes V _B = V _cc −V _BE4 , and the transistor Q
_As shown by the arrow from the emitter side of ₄ , the current I _1
3 flows to the emitter side and charges the capacitor 3.

The input terminal 1 is at the H level (V _cc ), and the input terminal 2
Changes to the L level ( _Vcc− ΔV), the voltage V _{A at} point _A
Is V _A = V _cc −V _BE3 , and the voltage V _B at the point _B is the voltage V _{A at the} point _A
V _B = V _A + {V _cc −V _BE4 − (V _cc −ΔV−V _BE3 )} = V _cc −V _BE3 −V _BE4 + V _BE3 + ΔV = _Vcc + ΔV− _VBE4 .

Thereafter, the charge of the capacitor C by the current I ₁ of the constant current source 6 is discharged, when the polarity of the voltage applied to the input terminals 1 and 2 is inverted is charged in the opposite polarity again, these operations are repeated.

Next, in double-balanced multiplier circuit comprising transistors Q ₇ to Q _12, the transistors Q _11, constitutes a basic differential amplifier in Q _12, transistors Q _7, Q _8, Q ₉ and Q ₁₀ an input terminal 1 and 2 With an input voltage of, an ON / OFF operation is performed alternately, that is, a switching operation is performed to obtain an output (output terminal 10 output).

As for the basic operation transistors Q ₁₁ and Q ₁₂ , the transistor having the higher base potential is turned on, so that the respective collector currents are as shown in FIGS. 4 (e) and 4 (f). Further, since the switching differential transistors Q ₇ to Q ₁₀ of likewise higher, respectively paced potential transistor turns ON, the collector current will be like the FIG. 4 (g) ~ (j), as a result, The waveform of the output terminal is as shown in FIG.

Therefore, the pulse width t of the output pulse is And the minimum pulse interval T is Becomes

[Problems to be solved by the invention]

In the above-mentioned conventional wasshot circuit, when the pulse width of the output pulse is made constant and the pulse interval is shortened, there is a problem that the pulse interval cannot be made shorter than that determined by the discharge time of the capacitor 3. there were.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and has as its object to obtain a circuit capable of keeping the pulse width of an output pulse constant and shortening the pulse interval.

[Means for solving the problem]

In the wasshot circuit according to the present invention, a capacitor is connected between the emitters of a differential transistor having a base connected as an input and having a collector connected to a power supply and an emitter connected to a constant current source, and the charge of the capacitor is discharged. Signal generator having a differential transistor having a collector connected to the emitter of the input differential transistor and a constant current source for the capacitor discharging differential transistor, and an input differential transistor Are provided with two sets of switching differential transistors whose bases are connected to respective bases, and a double-balanced multiplication circuit composed of basic differential transistors whose collectors are connected to their emitters.

[Action]

According to the present invention, the pulse width can be set constant and the pulse interval can be shortened.

〔Example〕

FIG. 1 is a circuit diagram of a one-shot circuit according to an embodiment of the present invention, and FIG. 2 is an explanatory diagram of its operation.

In FIG. 1, 1, 2 are input terminals, 10, 11 are output terminals,
Q ₇ and Q ₈ and Q ₉ and Q ₁₀ are two sets of switching differential transistors, Q ₁₁ and Q ₁₂ are basic differential transistors, and Q _{7 to} Q
₁₂ and 7, 8 are transistors and resistors forming a double-balanced multiplier, and Q ₃ , Q ₄ and 3 are transistors and capacitors forming an input signal generator for generating an input signal of the double-balanced multiplier. Yes,
Q ₁ and Q ₂ are differential transistors for discharging the capacitor 3, and Q ₅ and Q ₆ are level shift transistors.
6 and 9 are constant current sources.

 Next, the operation will be described.

In the one-shot circuit configured as described above,
Consider a case where an input waveform as shown in FIG. 2 is applied to the input terminals 1 and 2. However, the input voltage difference ΔV has an amplitude such that the switching differential transistors Q _{7 to} Q ₁₀ of the double balance type multiplication circuit can sufficiently switch.

When the input terminal I is at the L level ( _Vcc− ΔV) and the input terminal 2 is at the H level ( _Vcc ), the voltage VA at the point _A is _VA = _Vcc −ΔV
−V _BE3 , the voltage V B at the point _B becomes V _B = V _cc −V _BE4 , and the current I ₁ flows from the emitter side of the transistor Q _{4 to} the emitter side of the transistor Q ₃ as shown by the arrow, and charges the capacitor 3. . Here, the voltage V C at the point _C is V _C = V _A −V _BE5 , and the voltage at the point D is
V _D is V _D = V _B -V _BE6.

The input terminal 1 is at the H level (V _cc ), and the input terminal 2
Changes to the L level ( _Vcc− ΔV), the voltage V _{A at} point _A
Is V _A = V _cc −V _BE3 , the voltage V _B at the point _B is higher than the V _A voltage at the point _A by the terminal voltage of the charged capacitor 3, and V _B = V _A + _{AV cc} −V _BE4 − ( _Vcc −ΔV− _VBE3 )｝ = _Vcc + ΔV− _VBE4 .

Thereafter, the charge of the capacitor 3 is discharged by the current I ₁ of the constant current source 6, the voltage at point A and point B are equal, when the voltage V _B at the point B becomes lower than the voltage V _A at point A, That is, D
When the voltage V _D at the point becomes lower than the voltage V _C at point C, the differential transistor Q ₁ is turned ON, the charge of the capacitor 3 is discharged by the current I _3, briefly the current (I ₁ + I ₃₎ Is discharged. Then, when the polarity of the voltage applied to the input terminals 1 and 2 is reversed, the capacitor is charged to the opposite polarity again,
These operations are repeated again.

Thereafter, the charge of the capacitor 3 is discharged by the current I ₁ of the constant current source 6. When the polarity of the voltage applied to the input terminals 1 and 2 is inverted, the battery is charged again with the opposite polarity, and these operations are repeated.

Next, in a double balance type multiplication circuit, voltages V _C and V _{D at} points _C and _D are added to the base of a basic differential transistor composed of transistors Q ₁₁ and Q ₁₂ , and transistors Q ₇ , Q ₈ and Q obtaining oN, OFF, that is, the output by the switching operation (output terminal 10) alternately ₉ and Q ₁₀ an input terminal 1 and second input voltages.

Therefore, the pulse width t of the output pulse is And the minimum pulse interval T is Next, by changing the current I _3, without changing the pulse width, the pulse width can be shortened.

〔The invention's effect〕

As described above, according to the present invention, a capacitor is connected between the emitters of a differential transistor having a base connected to a power supply and an emitter connected to a constant current source, and the charge of the capacitor is discharged. An input signal generation unit including a differential transistor having a collector connected to the emitter of the input differential transistor and a constant current source for the capacitor discharging differential transistor; Since the base of the transistor is provided with two sets of switching differential transistors connected to the respective bases and a double-balanced multiplying circuit composed of basic differential transistors whose collectors are connected to their emitters, the pulse This has the effect of realizing a one-shot circuit with a constant width and a short pulse interval.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a one-shot circuit according to an embodiment of the present invention, FIG. 2 is a waveform diagram of a main part for explaining the operation of the present invention, FIG. 3 is a circuit diagram showing a conventional example, and FIG. FIG. 4 is a waveform diagram of a main part of FIG. 3 for explaining the conventional operation. In the figure, 1, 2 are input terminals, 3 is a capacitor, 4, 5, 6, 9
Is a constant current source, 10 and 11 are output terminals, 7 and 8 are resistors, Q ₁ and Q ₂ are differential transistors for discharging capacitors, Q ₃ and Q ₄
The transistor, Q _5, Q ₆ is a level shift transistor, Q ₇ to Q ₁₂ is a transistor.

Claims (1)

(57) [Claims] A differential transistor for discharging a charge from a capacitor connected between the emitters of a differential transistor having a collector connected to a power supply and an emitter connected to a constant current source and inputting a base. An input signal generation unit having a differential transistor having a collector connected to the emitter of the input differential transistor and a constant current source for a capacitor discharging differential transistor, and a base of the input differential transistor having a respective base. A one-shot circuit comprising: two sets of switching differential transistors connected to a base; and a double-balanced multiplying circuit composed of basic differential transistors whose collectors are connected to their emitters.