JPH0216043B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an FM demodulation circuit using a so-called pulse count demodulation method.

[Conventional technology]

As shown in Figure 3, the pulse count type FM (frequency modulation) demodulation circuit inputs the FM signal applied to the input terminal 2 to the trigger circuit 4 and outputs it.
Converts to trigger pulse synchronized with FM signal cycle,
With this trigger pulse, the monostable multivibrator 6
is triggered, and the demodulated pulse of the FM signal is extracted from the output terminal 8. After smoothing the demodulated pulse of the FM signal through a low-pass filter 10, a low-frequency signal is obtained from its output terminal 12.

That is, the FM signal shown in A in Fig. 4 is connected to input terminal 2.
When the signal is applied, the trigger circuit 4 generates a trigger pulse shown in FIG. 4B in synchronization with the rising and falling edges of the signal, and this trigger pulse causes the multivibrator 6 to actuate as shown in FIG. 4C. Generate demodulation pulses. The high level time _td of this pulse is constant, but the time T depends on the frequency of the FM signal, so when this pulse signal is passed through the low-pass filter 10, the level corresponding to the FM signal is changed. You can get a low frequency signal with

[Problem that the invention seeks to solve]

In such an FM demodulation circuit, the trigger circuit 4 and multivibrator 6 have a large number of components;
The circuit configuration is complicated, and when it is constructed using a semiconductor integrated circuit, manufacturing costs are high, and the circuit configuration is complicated, resulting in unstable operation.

Therefore, this invention realizes stable pulse count type FM demodulation with a small number of components.
This is an attempt to provide an FM demodulation circuit.

[Means for solving problems]

That is, the FM demodulation circuit of the present invention includes a voltage source 36 that generates a constant DC bias voltage, and first and second transistors 2 having a common emitter.
20 and a first differential circuit in which the FM signal is applied to the base of the first transistor and the DC bias voltage is applied to the base of the second transistor, and the emitter is shared. Consisting of third and fourth transistors 28 and 30, the DC bias voltage is applied to the base of the third transistor, and the FM signal having a negative phase relationship with the FM signal is applied to the base of the fourth transistor. a second differential circuit 22 which is connected to the second differential circuit 22;
and a fifth transistor 38 connected to the emitter side of the second transistor to flow an operating current to the first differential circuit; a sixth transistor for passing an operating current through the differential circuit; A capacitor 46 is charged or discharged by the operating current according to the switching operation of the differential circuit, and a capacitor 46 is connected to the second and third transistor sides of the first and second differential circuits to output a demodulated output. It is equipped with a current mirror circuit (transistors 48, 50) for taking out the current.

[Effect]

With this configuration, the first and second differential circuits are alternately switched by the FM signal, and the capacitor is charged and discharged in response to this switching.
By combining the potential change and the switching current of each differential circuit, a pulse output with a duty corresponding to the FM signal frequency (period) is obtained as a demodulated output.

[Embodiments] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an embodiment of the FM demodulation circuit of the present invention.

In FIG. 1, this FM demodulation circuit is equipped with first and second differential circuits 20 and 22, and the differential circuit 20 is composed of first and second transistors 24 and 26 having a common emitter. , differential circuit 22
is composed of third and fourth transistors 28 and 30 having a common emitter. An input terminal 32, 34 is connected to the base of each transistor 24, 30.
are formed, and FM signals having a mutually opposite phase relationship are applied, and a DC bias voltage V _B1 is applied to the bases of the transistors 26 and 28 from a voltage source 36.

The emitters of transistors 24 and 26 are grounded via a fifth transistor 38 and a resistor 40 for conducting an operating current, and similarly, the emitters of transistors 28 and 30 are grounded via a sixth transistor 42 and a resistor 40 for conducting an operating current. It is grounded via a resistor 44, and a capacitor 46 is connected between the emitters of the transistors 24 and 26 and the emitters of the transistors 28 and 30. A bias voltage V _B2 is applied to each transistor 38, 42 from a common bias voltage source.

A power supply is connected between the collectors of the transistors 24 and 30 and the ground point, and a driving voltage Vcc is applied thereto.
A current mirror circuit consisting of transistors 48, 50 and resistors 52, 54, which constitute an output circuit for extracting the demodulated output, is installed on the collector side of 8. That is, a load resistor 56 is connected between the collector of the transistor 50 and a ground point, and an output terminal 58 is formed.

Based on the above configuration, its operation will be explained with reference to FIG.

The input terminals 32 and 34 are supplied with FM signals having opposite phases to each other as shown in A in FIG.
In the FM signal, V _B1 indicates its midpoint voltage.

Transistors 24 and 26 alternately turn on and off with the FM signal _A1 , and transistors 28 and 3
0 repeats conduction and non-conduction alternately with FM signal _A2 . Due to this switching operation, a charging/discharging current flows through the capacitor 46, and a charging/discharging voltage shown as B in FIG. 2 is applied to point B in FIG. The charge/discharge voltage shown is generated. The amplitude of these charge/discharge voltage waveforms is given by V.

Transistor 2 responds to such charging and discharging.
A switching current I flows through the collectors of transistors 6 and 28, and this current flows through a resistor 56 due to the current mirror effect of transistors 48 and 50, and is applied to an output terminal 5.
8, a demodulated output V _p shown in D in FIG. 2 is generated.

Here, at the demodulated output V _p shown in D in FIG.
The pulse width is T _P and its period is 1/2 of the FM signal period T
The resistance value of resistor 56 is R _L , and the resistance value of resistor 5 is
6 is the output current flowing through I, and the carrier frequency of the FM signal is f _c , the demodulated output V _p is as follows: V ₀ = I・R _L・{(T/2−T _P )−T _P } /(T/ 2) =I・R _L・(2/T) ・(T/2−2T _P ) =I・R _L・(1−4T _P /T) =I・R _L・(1−4T _P f _c ) ...(1), and the detection efficiency δV _O /δf is δV _O /δf=-4I・R _L・T _P ...(2). Therefore, the demodulated output V _O is V _O =−4I・R _L・T _P・Δf (3). However, Δf is the frequency deviation.

Furthermore, if the capacitance of the capacitor 46 is C, then
Since T _P = C・V/I (V is the peak value of B in Fig. 2), the demodulated output V _O is V _O = −4I・R _L (C・V/I)・Δf = −4R _L , C, V, Δf...(4). However, in this case, the delay time of the transistor is ignored.

As is clear from equation (4), the demodulated output V _O is proportional to the frequency deviation Δf of the carrier frequency f _c , so it is possible to reproduce the low frequency signal by passing it through a low pass filter. can.

In this kind of FM demodulation circuit, the number of elements is small.
Not only can FM demodulation be obtained, but voltage reduction characteristics are also improved. Furthermore, since the capacitor 46 is approximately 30 pF and is capable of FM demodulation at several MHz, it can be replaced by a capacitive element on a semiconductor integrated circuit, thereby simplifying the circuit configuration.

〔Effect of the invention〕

As explained above, according to the present invention, the first
A common DC bias voltage is set at the base of one of the transistors constituting each differential circuit, and a demodulated output is obtained from the collector side of the transistor through a current mirror circuit. Therefore, the collector of the transistor
It is possible to avoid the influence of base-to-base capacitance, improve characteristics such as suppressing frequency characteristics and second-order harmonic distortion, and realize stable pulse-count FM demodulation with a small number of elements.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the FM demodulation circuit of the present invention, FIG. 2 is an explanatory diagram showing its operating waveforms,
Figure 3 is a block diagram showing a conventional FM demodulation circuit.
FIG. 4 is an explanatory diagram showing the operating waveforms. 20...First differential circuit, 22...Second differential circuit, 24...First transistor, 26...Second transistor, 28...Third transistor, 30...Fourth transistor , 36... Voltage source, 38... Fifth transistor, 42... Sixth transistor
Transistor, 46...Capacitor, 48,5
0...Transistor (current mirror circuit).

Claims (1)

[Claims] 1. Consisting of a voltage source that generates a constant DC bias voltage, and first and second transistors having a common emitter, the base of the first transistor
It consists of a first differential circuit to which an FM signal is applied and the DC bias voltage is applied to the base of a second transistor, and third and fourth transistors having a common emitter, and the third transistor has a common emitter. a second differential circuit to which the DC bias voltage is applied to the base of the fourth transistor, and an FM signal having a negative phase relationship with the FM signal to the base of the fourth transistor; a fifth transistor connected to the emitter side to flow an operating current to the first differential circuit; and a fifth transistor connected to the emitter sides of the third and fourth transistors to flow an operating current to the second differential circuit. a sixth transistor connected between the emitters of the first and second transistors and the emitters of the third and fourth transistors, and connected to the switching operation of the first and second differential circuits; a capacitor that is charged or discharged by the operating current according to the operating current; and a current mirror circuit that is connected to the second and third transistor sides of the first and second differential circuits and extracts a demodulated output. An FM demodulation circuit characterized by: