JP2767833B2 - Method of manufacturing polysilicon thin film transistor - Google Patents

Description

The present invention relates to a polysilicon thin film transistor (Thin Film).
The present invention relates to a method for forming a gate insulating film in a transistor (hereinafter, referred to as TFT), and particularly to a method for manufacturing a TFT for obtaining a smooth oxide film-silicon film interface.

[Conventional technology]

Conventional polysilicon TFTs use a polysilicon film used in an IC process or a polysilicon film obtained by crystallizing an amorphous silicon film.

The former is usually deposited on a substrate at a substrate temperature of around 620 ° C. by a low pressure CVD method, and a film having a crystal grain size of about several hundreds of degrees is obtained.

The latter is obtained by lowering the substrate temperature to around 530 to 590 ° C. and depositing on the substrate. It is known that the crystal grain size of the obtained amorphous silicon film after crystallization is about several thousand degrees.

When TFTs are formed on these polysilicon films, the mobility of carriers can be obtained at most only about 10 cm ² / V · sec, which poses a practical problem.

However, in recent years, it has been found that self-ion implantation into a silicon film and subsequent low-temperature annealing can provide a polysilicon film with a crystal grain size of several μm, which is dramatically increased (for example, Eletron Lett. 17, pp587). 588, 1981). Since then, research on the practical use of polysilicon TFTs has been actively conducted.

 FIG. 5 shows an example of the structure of the polysilicon TFT.

An island made of a polysilicon film 52 is formed on an insulating substrate 51, and a source region 52-1, a drain region 52-
2. There is a channel region 52-3. A gate insulating film 53 and a gate electrode 54 are formed on the channel region 52-3,
The whole is covered with a protective insulating film 55, and an aluminum electrode 56 is formed at a necessary portion.

In a polysilicon TFT having such a structure, a thermal oxide film formed by thermally oxidizing a silicon film is usually used as the gate insulating film 53 in many cases. This is because good dielectric strength and interface characteristics are obtained, as has been proven in IC processes.

[Problems to be solved by the invention]

Although the thermal oxide film has better interface characteristics with respect to the polysilicon film than the insulating film formed by other methods, the (i) smooth interface is obtained as compared with the thermal oxide film of the single crystal silicon film. And (ii) the withstand voltage is low.

This cause will be described with reference to FIG. FIG. 6 (a) shows the state of the polysilicon film before oxidation, and FIG. 6 (b) shows the state after oxidation, that is, after the formation of a thermal oxide film.

According to FIG. 6 (a), there are many crystal grain boundaries 57 in the polysilicon film 52 on the substrate 51.
Up to the surface.

When a polysilicon film having a large grain size is oxidized, the oxidation rate at the grain boundary interface is much faster than other parts, and the oxidation reaction is accelerated along the grain boundary. The oxide film interface becomes an uneven surface having a projection along the grain boundary as shown by a curve A in FIG. 6 (b). The irregularities increase as the oxidation time increases.

This unevenness of the interface causes surface scattering of carriers traveling in the channel of the transistor when forming a TFT,
This causes a decrease in carrier mobility.

In addition, electric field concentration occurs at the protrusions on the uneven surface, which causes a problem that the gate withstand voltage of the formed TFT decreases.

Accordingly, an object of the present invention is to provide a method of manufacturing a polysilicon TFT which improves the smoothness of the interface between the polysilicon film and the thermal oxide film and improves the characteristics of the TFT.

[Means for solving the problem]

In order to achieve the above object, in the method of manufacturing a polysilicon thin film transistor according to the present invention as set forth in claim 1, polysilicon having a large grain size is used as a channel layer, and a gate oxide film is formed on the surface of the channel layer. In the method of manufacturing a polysilicon thin film transistor, a channel layer forming step of forming a channel layer made of a polysilicon film in a channel portion; and an average grain size smaller than an average grain size of the polysilicon film forming the channel layer on the channel layer. Second with diameter
3. The polysilicon thin film transistor according to claim 2, further comprising: a deposition step of depositing a polysilicon film; and a gate oxide film forming step of oxidizing the second polysilicon film. 4. In the method for manufacturing a polysilicon thin film transistor, wherein polysilicon having a large grain size is used as a channel layer and a gate oxide film is formed on the surface of the channel layer, a channel layer made of a polysilicon film is formed in a channel portion. 4. The method according to claim 3, further comprising: a channel layer forming step; a film forming step of forming an amorphous silicon film on the channel layer; and a gate oxide film forming step of oxidizing the amorphous silicon film. 5. In the method of manufacturing a polysilicon thin film transistor according to the present invention, the polysilicon having a large grain size is Forming a gate oxide film on the surface of the channel layer, a channel layer forming step of forming a channel layer made of a polysilicon film in a channel portion, and forming an amorphous silicon film on the channel layer. A film forming step of forming a film, a gate oxide film forming step of oxidizing a surface of the amorphous silicon film opposite to the channel layer, and a non-oxidized portion of the amorphous silicon film remaining in the gate oxide film forming step. A crystallization step of crystallizing the polysilicon constituting the channel layer into a large grain size using a crystal nucleus as a crystal nucleus, wherein the method of manufacturing a polysilicon thin film transistor according to the present invention described in claim 4 is provided. In any one of Items 1 to 3, wherein the step of forming a channel layer comprises:
A polysilicon or amorphous silicon deposition step of depositing a polysilicon film or an amorphous silicon film in a channel portion, and a first self-implantation process of implanting Si ⁺ ions into the polysilicon film or the amorphous silicon film deposited in the channel portion. The method according to claim 5, further comprising: an ion implantation step; and a low-temperature annealing step of crystallizing the polysilicon film or the amorphous silicon film into which the self ions have been implanted by annealing at a low temperature. In the method for manufacturing a polysilicon thin film transistor, a method for manufacturing a polysilicon thin film transistor, in which polysilicon having a large grain size is used as a channel layer and a gate oxide film is formed on the surface of the channel layer, comprises: Form silicon layer That the polysilicon layer forming step, the self-ion implantation of the polysilicon layer surface Si ⁺ ions, and a second self-ion implantation step of amorphizing a portion of said polysilicon layer, said second self-ion implantation step A step of forming a gate oxide film for oxidizing an amorphized portion in the step (a), wherein a portion not amorphized in the second self-ion implantation step is used as a channel layer. In the method for manufacturing a polysilicon thin film transistor according to the present invention described in the above, in the method according to claim 5, the polysilicon layer is formed on the polysilicon layer between the polysilicon layer forming step and the second self-ion implantation step. SiO ₂
A silicon oxide film deposited process for film deposition of the film, between the second self-ion implantation step as the gate oxide film forming process, characterized by comprising a SiO ₂ film removing step of removing the SiO ₂ film According to a seventh aspect of the present invention, in the method of manufacturing a polysilicon thin film transistor according to the fifth or sixth aspect, the polysilicon layer forming step includes forming a polysilicon film or an amorphous silicon film in a channel portion. A polysilicon or amorphous silicon deposition step for depositing; a first self ion implantation step for implanting self ions of Si ⁺ ions into the polysilicon film or amorphous silicon film deposited on the channel portion; and self ions implanted. A low-temperature electrode that crystallizes by annealing a polysilicon film or amorphous silicon film at a low temperature. Characterized by comprising a Lumpur step.

It is to be noted that the amorphous silicon film is oxidized after being changed to polysilicon having a fine particle diameter at the time of oxidation.

[Action]

According to the manufacturing method of the present invention, a polysilicon film having a small grain size or an amorphous silicon film having no grain boundaries on a polysilicon film having a large crystal grain size is oxidized.
The effect of increasing the oxidation rate along the crystal grain boundaries as shown in FIG. As a result, a uniform oxide film and an interface with good smoothness are obtained, and the formed polysilicon TFT
Gate breakdown voltage is also improved.

〔Example〕

 An embodiment of the present invention will be described with reference to FIGS.

I. First Embodiment FIG. 1 is a process explanatory view of a first embodiment of the present invention, and FIG. 2 is a schematic diagram of oxidation when the thermal oxidation temperature is low.

In FIG. 1, 1 is a quartz substrate, 2 is a polysilicon film, 2-1 is an amorphous silicon film, 3 is a polysilicon film having a large grain size, 4 is an amorphous silicon film, 5 is a thermal oxide film, 6 is a thermal oxide film. Gate electrodes 7, 7-1 are source / drain regions, 8 is a SiO ₂ film, and 9 is a metal electrode.

(1) The substrate temperature is 580 on the quartz substrate 1 by using the low pressure CVD method.
A polysilicon film 2 is deposited, for example, at about 1000 ° C. (see FIG. 1A). In general, it is known that when a low-pressure CVD method is used, the film becomes amorphous at 580 ° C., but it was found by X-ray diffraction that the film was a polysilicon film.

(2) Next, Si ⁺ ions are implanted by the self-ion implantation method under the conditions of 100 KeV and 2 × 10 ¹⁵ cm ⁻² .dose, and the crystal nuclei in the bulk of the polysilicon film and the crystal nuclei at the interface are made amorphous. (See FIG. 1 (b)).

(3) Thereafter, annealing is performed at 600 ° C. for 50 hours in a nitrogen atmosphere to recrystallize the amorphous silicon film 2-1. The average grain size of the obtained polysilicon film is about 2μ.
m and a large particle size. Next, the polysilicon film 3 is patterned into an island shape by ordinary photolithography and dry etching (see FIG. 1C).

(4) The entire surface of the substrate including the surface of the island of the obtained polysilicon film 3 having a large grain size is subjected to a substrate temperature of 5 using a low pressure CVD method.
At 60 ° C., the amorphous silicon film 4 is, for example, approximately 200 to 400 °
(See FIG. 1 (d)).

(5) Subsequently, dry oxidation is performed at 1000 ° C. to change the entire amorphous silicon film 4 into a thermal oxide film 5 (see FIG. 1E).

(6) Then, in the same manner as in a normal method of manufacturing a polysilicon TFT, a polysilicon film doped with phosphorus ( P ) by in-situ doping is formed, for example, by about 3000 Å.
Then, the gate electrode 6 is formed by photolithography and dry etching (see FIG. 1 (f)).

(7) Phosphorus ions are implanted at a high concentration using the gate electrode 6 as a mask.

Injection energy at this time: 50 to 110 KeV, dose amount:
This is performed under the condition of (1-7) × 10 ¹⁵ cm dose to form source / drain regions 7 and 7 ′ (see FIG. 1 (g)).

(8) Next, a SiO ₂ film 8 is deposited as a protective insulating film by, for example, about 7,000 ° by a low pressure CVD method, and then heat treatment is performed at about 1000 ° C. for 30 minutes to activate the dopant (see FIG. 1 (h)).

(9) Thereafter, a contact hole is opened, aluminum metallization is performed, and each electrode 9 is formed, thereby obtaining a polysilicon TFT of the present invention (see FIG. 1 (i)).

In this embodiment, the amorphous silicon film 4 is deposited on the recrystallized polysilicon film 3, but the thermal oxidation method for depositing the amorphous silicon film in this manner is as follows.
High temperature oxidation is preferred. This is because thermal oxidation at low temperature
Oxidation time for obtaining a desired oxide film thickness (usually 500 to 1500) is prolonged, and crystallization is performed from the lower layer of the amorphous silicon film 4 deposited during the oxidation reaction, using large-grain polysilicon crystal grains as nuclei. First, as shown in FIG. 2, a crystallized polysilicon layer 4A during oxidation is formed.

FIG. 2 schematically shows a state in which the lower layer of the amorphous silicon film 4 is crystallized at the beginning of the oxidation reaction. 5A is an oxide film. If the oxidation reaction is continued until after this state, oxidation is promoted at the crystal grain boundaries of the amorphous silicon film 4 where the crystal grain boundaries are formed, so that the oxidation reaction and the interface at the end of the oxidation reactions also have irregularities. .

However, if low-temperature plasma oxidation using radio frequency (RF) or microwaves is used among the oxidation methods, the oxidation ends before the crystallization of the amorphous silicon film 4 starts. That is, it is possible to oxidize at 500 ° C. or less where the crystallization rate can be almost ignored.

II. Second Embodiment (not shown) (1) 10 ^-7 on a quartz substrate at a substrate temperature of room temperature to 150 ° C.
An amorphous silicon film of, for example, about 1000 ° is deposited by an electron beam evaporation method in a high vacuum of 10 ^-9 torr.

Here, although the amorphous silicon film is amorphous in bulk, it is assumed that many crystal nuclei exist at the interface between the silicon film and the substrate.

Next, self ion implantation of Si ⁺ ions is performed under the conditions of an implantation energy of about 100 KeV and a dose of 2 × 10 ¹⁵ cm ⁻² , which aims at making the crystal nuclei at the interface amorphous.

Thereafter, annealing was performed at 600 ° C. for 100 hours in a nitrogen atmosphere to crystallize the amorphous silicon film. The average particle size of the crystallized film obtained as a result was about 2 μm.

(2) Then, a polysilicon film having a small grain size of about 100 to 300 ° was deposited on the entire surface of the substrate by a low pressure CVD method at a substrate temperature of 580 ° C. with a thickness of about 100 to 300 °, for example, about 200 to 400 °.

(3) After patterning these polysilicon films in an island shape in accordance with the size of the TFT, all of the polysilicon films having a small grain size are changed to thermal oxide films by, for example, oxygen plasma oxidation at about 400 ° C.

Subsequent steps are the same as in the first embodiment to obtain a desired polysilicon TFT.

In the case of the second embodiment, since a polysilicon film having a small grain size is deposited on the surface of a crystallized polysilicon film having a large grain size, oxidation at an arbitrary oxidation temperature is possible.

In addition to thermal oxidation, low-temperature plasma oxidation using high frequency or microwave can be used as the oxidation method.

RTA (Rapid Thermal Anneal) using a lamp annealing device that makes extensive use of halogen lamps as the thermal oxidation method
Is also useful.

Further, if it is practically impossible to stop oxidation at the interface between the polysilicon film having a small grain size and the polysilicon film having a large grain size, it is necessary to progress oxidation to a certain extent to the underlying polysilicon film having a large grain size. This is because if a polysilicon film having a small particle size remains at the interface, scattering of carriers traveling in the channel increases, and the mobility decreases.

III. Third Embodiment A third embodiment of the present invention will be described with reference to FIG.

(1) On the quartz substrate 1, the first embodiment or the second
A polysilicon film 3 having a large grain size is formed in the same manner as in the embodiment.

Next, an amorphous silicon film 34 is deposited on the polysilicon film 3 (see FIG. 3A).

(2) Subsequently, a part of the amorphous silicon film 34 is oxidized at about 400 ° C. by an oxygen plasma oxidation method to form an oxide film 35 (see FIG. 3B).

(3) Thereafter, low-temperature annealing at 600 ° C. is performed. As a result, a part B crystallized from the crystal grains present in this portion as a seed from the lower layer of the amorphous silicon film 34 sandwiched between the oxide film 35 and the polysilicon film 3 having a large grain size is solid-phase grown. / Polysilicon film interface is obtained (see FIG. 3 (c)).

Subsequent steps are performed in the same manner as in the first embodiment, and the desired TFT
Get. Most of the carrier will pass through the portion B having the large particle size.

By the way, in the above embodiment, an example is described in which after the formation of the polysilicon film 3 having a large grain size, a polysilicon film 4 or an amorphous silicon film having a small grain size is deposited on the surface thereof, and the deposited film is oxidized. However, the present invention is not limited to this.

IV. Fourth Embodiment A fourth embodiment of the present invention will be described with reference to FIG.

(1) A polysilicon film 2 is deposited on a quartz substrate 1 by, for example, a low pressure CVD method, for example, at a thickness of about 1000 ° (see FIG. 4A).

(2) Next, self-ion and Si ⁺ ion implantation are performed under the conditions of 100 KeV and 2 × 10 ¹⁵ cm ^−2.
Is made amorphous (see FIG. 4 (b)).

(3) Thereafter, annealing is performed at 600 ° C. for 50 hours in a nitrogen atmosphere to recrystallize the amorphous silicon film 2A. The average grain size of the obtained polysilicon film 3 is as large as about 2 μm. The operation up to this point is the same as that of the first embodiment (see FIG. 4 (c)).

(4) Next, the SiO ₂ film 40 is formed by, for example, about 5
Deposited on the entire surface of the polysilicon film 3 with a thickness of
The self-ion implantation is performed again under the conditions of 50 KeV and a dose of 1 to 4 × 10 ¹⁵ cm ⁻² . As a result, only the surface of the recrystallized polysilicon film 3 becomes amorphous.

Here, the reason why the SiO ₂ film 40 is covered before the second self-ion implantation step is to make the surface portion of the polysilicon film 3 amorphous more efficiently. In this case, since the coated SiO ₂ film is etched after the self-ion implantation,
In that case, in order to prevent the etching of the substrate, it is better to perform the patterning of the polysilicon film 3 before a thermal oxidation step which will be described later.

Due to the amorphization of the surface portion of the polysilicon film 3 by the second self-ion implantation step, the grain boundary on the surface portion disappears (see FIG. 4 (d)).

(5) After the SiO ₂ film 40 is removed by etching, the polysilicon film 3 is patterned in an island shape, and then a thermal oxide film of about 500 to 800 ° C. is formed by wet oxidation at about 900 ° C.
5A is grown (see FIG. 4 (e)).

(6) In the subsequent steps, as in the first embodiment, after formation of the gate electrode, formation of the source / drain regions, formation of the protective insulating film, activation of the dopant, opening of the contact hole, aluminum An electrode is formed by metallization to obtain a desired polysilicon TFT.

V. Fifth Embodiment (not shown) (1) An amorphous silicon film having a thickness of 1000 ° is deposited on a quartz substrate by an electron beam evaporation method in a high vacuum of 10 ^-7 to 10 ^-9 torr. Next, after performing a 2 × 10 ¹⁵ cm ⁻² dose self-ion implantation step, annealing is performed at 600 ° C. for 100 hours in a nitrogen atmosphere to recrystallize the amorphous silicon film. The steps so far are the same as in the second embodiment.

(2) Subsequent steps are the same as in the fourth embodiment.
Using a low-pressure CVD method, an SiO ₂ film is deposited on the entire surface of the recrystallized polysilicon film to a thickness of, for example, about 500 °.

Subsequently, the self-ion implantation step is performed again under the conditions of 40 to 50 KeV and a dose of 1 to 4 × 10 ¹⁵ cm ⁻² . As a result, only the surface of the recrystallized polysilicon film becomes amorphous.

(3) After removing the deposited SiO ₂ film by etching, the polysilicon film is patterned into an island shape, and then a thermal oxide film is grown using wet oxidation at about 900 ° C., and this is used as a gate oxide film.

Thereafter, formation of a gate electrode, source / drain regions, a protective insulating film, activation of a dopant, and formation of an electrode are performed to obtain a desired polysilicon TFT.

The present invention provides a method for obtaining a high-quality oxide film on a polysilicon film having a large grain size. In the fourth and fifth embodiments, even if the first self-ion implantation step is not used, the thickness is 1 μm or more. If a polysilicon film having a large grain size can be obtained, the present invention can be applied thereto. For example, in the fifth embodiment, the low-temperature annealing is performed after the self-ion implantation, but instead, the amorphous silicon film is obtained only by the low-temperature annealing process without the self-ion implantation to obtain a polysilicon film having a large grain size. Can be

In the fourth and fifth embodiments, the SiO ₂ film is coated before the second self-ion implantation step. This is for more efficiently performing amorphous on the surface of the polysilicon film. It is not a process.

The amorphous layer on the surface of the polysilicon film is oxidized in the next step. In this oxidation step, it is important to select conditions under which the entire amorphous layer is oxidized. That is, the crystallization of the amorphous layer starts from the lower part during the oxidation step, and a polysilicon layer having a small grain size grows at the beginning of the oxidation step. Therefore, it was originally an amorphous layer,
The entire small grain polysilicon layer must also be oxidized.

As the thermal oxidation method, in addition to the wet oxidation method described in the fourth and fifth embodiments, a high-speed oxidation method using RTA using a lamp annealing apparatus is also useful.

〔The invention's effect〕

According to the manufacturing method of the present invention, a polysilicon film or an amorphous silicon thin film which becomes a polysilicon having a small particle size when oxidized is converted into an oxide film by utilizing the polysilicon film or the amorphous silicon thin film transistor. As the interface between the channel layer and the gate insulating film, a thermal oxide film of a polysilicon film having good characteristics can be formed with good smoothness. Therefore, not only can high mobility be obtained without lowering the carrier mobility, but also TF
It is possible to provide a method of manufacturing a polysilicon thin film transistor which can improve characteristics without lowering the gate breakdown voltage of T.

[Brief description of the drawings]

 FIG. 1 is an explanatory view of a manufacturing process of a first embodiment of the present invention, FIG. 2 is a schematic diagram of an initial stage of an oxidation reaction of the first embodiment, and FIG. 3 is a manufacturing process of a third embodiment of the present invention. FIG. 4 is an explanatory view of a manufacturing process according to a fourth embodiment of the present invention, FIG. 5 is an explanatory view of a conventional example, and FIG. 6 is an explanatory view of an interface of the conventional example. DESCRIPTION OF SYMBOLS 1 ... Quartz substrate, 2 ... Polysilicon film, 3 ... Polysilicon film with large particle size, 4 ... Amorphous silicon film, 5,5A, 35 ... Thermal oxide film.

Claims (7)

(57) [Claims] In a method of manufacturing a polysilicon thin film transistor, wherein polysilicon having a large grain size is used as a channel layer and a gate oxide film is formed on the surface of the channel layer, a channel layer made of a polysilicon film is formed in a channel portion. A channel layer forming step; a film forming step of forming a second polysilicon film having an average particle diameter smaller than an average particle diameter of a polysilicon film forming the channel layer on the channel layer; Forming a gate oxide film for oxidizing the polysilicon film. 2. A method for manufacturing a polysilicon thin film transistor in which polysilicon having a large grain size is used as a channel layer and a gate oxide film is formed on the surface of the channel layer, wherein a channel layer made of a polysilicon film is formed in a channel portion. A method for manufacturing a polysilicon thin film transistor, comprising: a channel layer forming step; a film forming step of forming an amorphous silicon film on the channel layer; and a gate oxide film forming step of oxidizing the amorphous silicon film. . 3. A method for manufacturing a polysilicon thin film transistor in which polysilicon having a large grain size is used as a channel layer and a gate oxide film is formed on the surface of the channel layer, wherein a channel layer made of a polysilicon film is formed in a channel portion. A channel layer forming step; a film forming step of forming an amorphous silicon film on the channel layer; a gate oxide film forming step of oxidizing a surface of the amorphous silicon film opposite to the channel layer; Crystallizing a non-oxidized portion of the amorphous silicon film remaining in the forming process into a large grain size using polysilicon constituting the channel layer as a crystal nucleus. Method. 4. The step of forming a channel layer includes the step of depositing a polysilicon film or an amorphous silicon film in a channel portion, and the step of depositing a polysilicon film or an amorphous silicon film in the channel portion. ^A first self-ion implantation step of implanting self-ions of ⁺ ions, and a low-temperature annealing step of crystallizing the polysilicon film or the amorphous silicon film into which the self-ions have been implanted by annealing at a low temperature. The method for manufacturing a polysilicon thin film transistor according to claim 1, wherein 5. A method for manufacturing a polysilicon thin film transistor in which polysilicon having a large grain size is used as a channel layer and a gate oxide film is formed on a surface of the channel layer, wherein a polysilicon layer made of a polysilicon film is formed in a channel portion. Forming a polysilicon layer, performing a self-ion implantation of Si ⁺ ions on the surface of the polysilicon layer, and amorphizing a part of the polysilicon layer, and a second self-ion implantation. A gate oxide film forming step of oxidizing a portion that has been made amorphous in the step, wherein the part that has not been made amorphous in the second self-ion implantation step is used as a channel layer. A method for manufacturing a thin film transistor. 6. The method according to claim 6, further comprising:
A silicon oxide deposition step of depositing a SiO ₂ film on the polysilicon layer between the self-ion implantation step, and a gate oxide film formation step between the second self-ion implantation step and the gate oxide film formation step. method for producing a polysilicon thin film transistor according to claim 5, characterized by including the SiO ₂ film removing step of removing the SiO ₂ film. 7. The polysilicon layer forming step includes: depositing a polysilicon film or an amorphous silicon film on a channel portion; and depositing a polysilicon film or an amorphous silicon film on the channel portion. A first self-ion implantation step of implanting self ions of Si ⁺ ions; and a low-temperature annealing step of crystallizing the polysilicon film or the amorphous silicon film into which the self ions have been implanted by annealing at a low temperature. 7. The method for manufacturing a polysilicon thin film transistor according to claim 5, wherein: