JP2767188B2 - Via forming method for ceramic laminate - Google Patents

Via forming method for ceramic laminate

Info

Publication number
JP2767188B2
JP2767188B2 JP5207081A JP20708193A JP2767188B2 JP 2767188 B2 JP2767188 B2 JP 2767188B2 JP 5207081 A JP5207081 A JP 5207081A JP 20708193 A JP20708193 A JP 20708193A JP 2767188 B2 JP2767188 B2 JP 2767188B2
Authority
JP
Japan
Prior art keywords
via hole
metal powder
diameter
small
green sheet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP5207081A
Other languages
Japanese (ja)
Other versions
JPH0745470A (en
Inventor
英夫 坂田
亢亮 後藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FDK Corp
Original Assignee
FDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FDK Corp filed Critical FDK Corp
Priority to JP5207081A priority Critical patent/JP2767188B2/en
Publication of JPH0745470A publication Critical patent/JPH0745470A/en
Application granted granted Critical
Publication of JP2767188B2 publication Critical patent/JP2767188B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards

Landscapes

  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、セラミックス積層体に
おけるビア接続部の形成方法に関し、更に詳しく述べる
と、隣接する層の対応する箇所に設けた大小のビア穴内
の金属材によって、層間の電気的接続を行うビア接続部
の形成方法に関するものである。この技術は、例えば多
層セラミックス回路板、積層コンデンサ、積層圧電素子
などにおける層間の電気的接続に有用である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a via connection portion in a ceramic laminate, and more particularly, to a method for forming an electrical connection between layers by using a metal material in a large or small via hole provided in a corresponding portion of an adjacent layer. The present invention relates to a method of forming a via connection portion for performing a dynamic connection. This technique is useful for electrical connection between layers in a multilayer ceramic circuit board, a multilayer capacitor, a multilayer piezoelectric element, and the like.

【0002】[0002]

【従来の技術】積層型セラミックス基板や各種積層型セ
ラミックス素子において、それら基板や素子の内部で層
間の電気的接続を図る技術として、ビア接続構造があ
る。これは、セラミックスグリーンシート(未焼結シー
ト)を積層する際、隣接するシートの対応する箇所にそ
れぞれビア穴を設けて、内部に金属粉(実際には銀粒子
などの金属粉と有機バインダを混ぜ合わせた導電ペース
トを用いる)を充填しておき、積層一体化後に焼結する
ことにより、ビア穴内の金属材によって層間の電気的接
続を図る技術である。
2. Description of the Related Art In a laminated ceramic substrate and various laminated ceramic elements, there is a via connection structure as a technique for electrically connecting layers within the substrate or the element. This is because, when laminating ceramic green sheets (unsintered sheets), via holes are provided at corresponding locations on adjacent sheets, and metal powder (actually, metal powder such as silver particles and an organic binder) are placed inside. (Using a mixed conductive paste), and sintering after lamination and integration to achieve electrical connection between layers by a metal material in a via hole.

【0003】従来採用されているビア穴の直径は、素子
の種類や寸法などに応じて0.08〜0.8mm程度と様
々である。しかし、いずれにしても1つの積層体におけ
るビア穴は、上方のグリーンシートから下方のグリーン
シートに至るまで全て同じ直径で形成されている。そし
て各グリーンシートは、対応する箇所の全てのビア穴の
中心位置が一致するように厳密に位置合わせして積層し
一体化する。
[0003] The diameter of a conventionally used via hole varies from about 0.08 to 0.8 mm depending on the type and size of the element. However, in any case, the via holes in one laminated body are all formed with the same diameter from the upper green sheet to the lower green sheet. Then, the respective green sheets are strictly aligned and laminated and integrated so that the center positions of all the via holes at the corresponding locations coincide.

【0004】[0004]

【発明が解決しようとする課題】ビア穴に充填した金属
粉とグリーンシートは積層体として一体焼成されるが、
この時、金属粉とセラミックス(グリーンシート)とは
焼成収縮率が異なり、一般に金属粉の方が収縮が大き
い。このことと、金属の凝縮作用のために、ビア穴壁と
金属材との間に隙間ができる。このため、特にビア穴径
が小さい場合には、充填する金属粉の量が少ないこと
と、上下ビア部の中心位置の僅かなずれが大きく影響す
ることもあって、上下のビア部の間、あるいはビア部と
内部電極パターンとの間で電気的接続不良が生じたり、
接続が不十分なため信頼性を損なうなどの問題があっ
た。
The metal powder and green sheet filled in the via hole are integrally fired as a laminate.
At this time, the metal powder and the ceramic (green sheet) have different firing shrinkage rates, and the metal powder generally shrinks more. Due to this and the condensation effect of the metal, a gap is formed between the via hole wall and the metal material. For this reason, especially when the via hole diameter is small, the amount of the metal powder to be filled is small, and a slight shift of the center position of the upper and lower via portions may have a great effect. Or, an electrical connection failure occurs between the via portion and the internal electrode pattern,
There were problems such as a loss of reliability due to insufficient connection.

【0005】ビア穴の直径をかなり大きくすれば、充填
される金属粉の量が多くなり、電気的接続の不良が生じ
る可能性は少なくなる。しかし、ビア穴径を大きくする
と、素子として本来の機能を果たす有効部分の面積が少
なくなる欠点が生じる。例えば、積層型圧電素子の場合
には、ビア穴の部分は不活性領域(圧電動作に寄与しな
い部分)となるから、できるだけその面積を小さくする
ことが望ましい。またビア穴径が極端に大きくなると、
金属粉を充填してから積層するまでの間に、それが脱落
する虞が生じ、作業性が悪くなる。
[0005] If the diameter of the via hole is made considerably large, the amount of the metal powder to be filled is increased, and the possibility of occurrence of defective electrical connection is reduced. However, when the diameter of the via hole is increased, there is a disadvantage that the area of an effective portion that performs the original function as an element is reduced. For example, in the case of a laminated piezoelectric element, the area of the via hole becomes an inactive area (part that does not contribute to the piezoelectric operation), and therefore it is desirable to reduce the area as much as possible. Also, if the via hole diameter becomes extremely large,
During the period from filling of the metal powder to lamination, there is a risk that the metal powder may fall off, resulting in poor workability.

【0006】本発明の目的は、上記のような従来技術の
欠点を解消し、ビア部同士の位置合わせが容易で、且つ
上下のビア部の間、あるいはビア部と内部電極パターン
との間の電気的接続を確実に行うことができ、信頼性並
びに製造歩留りの向上を図ることができるようなセラミ
ックス積層体のビア接続部の形成方法を提供することで
ある。
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned drawbacks of the prior art, to facilitate alignment between via portions, and to provide a space between upper and lower via portions or between a via portion and an internal electrode pattern. An object of the present invention is to provide a method for forming a via connection portion of a ceramic laminate that can reliably perform an electrical connection and improve reliability and a production yield.

【0007】[0007]

【課題を解決するための手段】本発明は、セラミックス
グリーンシートを積層する際、隣接するグリーンシート
の対応する箇所にビア穴を設けて内部に金属粉を充填し
ておき、積層一体化後に焼結することにより、ビア穴内
の金属材によって層間の電気的接続を行うビアの形成方
法において、隣接するグリーンシートの対応する箇所に
形成するビア穴を、一方が大ビア穴、他方が小ビア穴と
なる組み合わせとするセラミックス積層体のビア接続部
の形成方法である。ここで大ビア穴の直径を、小ビア穴
の直径の1.2〜2倍程度とすることが望ましい。
According to the present invention, when laminating ceramic green sheets, via holes are provided in corresponding portions of adjacent green sheets, metal powder is filled therein, and firing is performed after lamination and integration. In the method of forming a via in which electrical connection between layers is performed by the metal material in the via hole, one of the via holes to be formed in a corresponding portion of the adjacent green sheet is one large via hole and the other is a small via hole. This is a method of forming a via connection portion of a ceramic laminate having the following combination. Here, it is desirable that the diameter of the large via hole is about 1.2 to 2 times the diameter of the small via hole.

【0008】[0008]

【作用】積層体を焼成する際、ビア穴に充填した金属粉
とグリーンシートのセラミックスとの焼成収縮は異な
る。前述のように、一般に金属粉の方が収縮率が大き
く、しかも金属粉は凝集する。本発明のように、大ビア
穴と小ビア穴を組み合わせた構成では、金属粉が凝集す
る際に、毛管現象により小ビア穴内には大ビア穴側から
も金属粉が供給されて、隙間無く完全に充填される。他
方、大ビア穴では、金属粉の量がやや減少し、金属材と
ビア穴壁との間でやや大きめの空隙が生じるものの、中
心部分には大部分の金属材が残っているために、上下の
ビア部の間での接続は十分に行える。
When firing the laminated body, the firing shrinkage of the metal powder filled in the via hole differs from that of the ceramic of the green sheet. As described above, the metal powder generally has a higher shrinkage rate, and the metal powder is aggregated. In the configuration in which the large via hole and the small via hole are combined as in the present invention, when the metal powder is agglomerated, the metal powder is also supplied from the large via hole side into the small via hole due to a capillary phenomenon, and there is no gap. Completely filled. On the other hand, in the large via hole, the amount of the metal powder is slightly reduced, and although a slightly larger gap is generated between the metal material and the via hole wall, since most of the metal material remains in the center portion, The connection between the upper and lower via portions can be sufficiently performed.

【0009】また一方が大ビア穴で、他方が小ビア穴で
あるので、上下のビア同士での位置合わせの際、両者の
半径の差程度の多少の位置ずれは許容される。そのた
め、上下のビア部の間での電気的接続も、より確実に行
えることになる。
[0009] Further, since one is a large via hole and the other is a small via hole, a slight positional deviation of approximately the difference between the radii of the upper and lower vias is allowed during the alignment between the upper and lower vias. Therefore, the electrical connection between the upper and lower via portions can be performed more reliably.

【0010】[0010]

【実施例】図1は本発明に係るセラミックス積層体のビ
ア形成構造の一実施例を示す説明図であり、Aは積層前
のグリーンシートの平面図、Bは各グリーンシートの側
断面図である。この例は、積層型圧電素子(圧電アクチ
ュエータ)に適用した場合である。ビア接続は、セラミ
ックスグリーンシートを積層する際、隣接するシートの
対応する箇所にビア穴を設けて内部に金属粉を充填して
おき、積層一体化後に焼結することにより、ビア穴内の
金属材によって層間の電気的接続を行う構造である。
1 is an explanatory view showing one embodiment of a via forming structure of a ceramic laminate according to the present invention, wherein A is a plan view of a green sheet before lamination, and B is a side sectional view of each green sheet. is there. This example is a case where the present invention is applied to a laminated piezoelectric element (piezoelectric actuator). When laminating ceramic green sheets, via connections are made by forming via holes in the corresponding locations of adjacent sheets, filling metal powder inside, and sintering after lamination and integration. In this structure, electrical connection between layers is performed.

【0011】セラミックスグリーンシート(未焼結シー
ト)10に、それぞれ円形状の大ビア穴12と小ビア穴
14を形成し、グリーンシート表面に所定の内部電極パ
ターン16(影線を付した部分)を印刷すると共に、前
記の大ビア穴12と小ビア穴14の内部に金属粉18を
充填する。大ビア穴12の周囲には、リング状の無電極
部20(細かな点々を付した部分)を形成して、大ビア
穴12に充填した金属粉18との分離を図り、他方、小
ビア穴14については、その穴縁まで内部電極パターン
16を印刷して、該小ビア穴14に充填した金属粉18
に連続するように構成する。ここで、セラミックスグリ
ーンシート10は、PZT(チタン酸ジルコン酸鉛)の
ようなセラミックス粉体と有機バインダとを混練し、ド
クターブレード法や圧延ロール法等によって薄いシート
に成形したものからなる。グリーンシート表面に印刷す
る内部電極パターン16には、例えば銀粒子とバインダ
とを混ぜ合わせてペースト状とした材料を用いる。また
各ビア穴12,14に充填する金属粉18も、金属粉と
有機バインダとを混ぜ合わせてペースト状としたものを
用いる。通常、これは内部電極パターンを形成するのに
用いたのと同じ材料である。
A large via hole 12 and a small via hole 14 are respectively formed in a ceramic green sheet (unsintered sheet) 10 in a circular shape, and a predetermined internal electrode pattern 16 (portion shaded) is formed on the surface of the green sheet. Is printed, and the inside of the large via hole 12 and the small via hole 14 is filled with the metal powder 18. A ring-shaped non-electrode portion 20 (a portion with fine dots) is formed around the large via hole 12 to separate the large via hole 12 from the metal powder 18 filled in the large via hole 12. For the hole 14, the internal electrode pattern 16 is printed up to the edge of the hole, and the metal powder 18 filled in the small via hole 14 is formed.
Is configured to be continuous. Here, the ceramic green sheet 10 is formed by kneading a ceramic powder such as PZT (lead zirconate titanate) and an organic binder, and forming a thin sheet by a doctor blade method, a rolling roll method, or the like. For the internal electrode pattern 16 to be printed on the surface of the green sheet, for example, a paste-like material obtained by mixing silver particles and a binder is used. The metal powder 18 to be filled in each of the via holes 12 and 14 is also a paste obtained by mixing the metal powder and an organic binder. Typically, this is the same material used to form the internal electrode pattern.

【0012】図1のBに示すように、このようなグリー
ンシート10を、大ビア穴12と小ビア穴14とが相対
向するように組み合わせて積層する。即ち、大ビア穴1
2の中心と小ビア穴14の中心が一致するように交互に
積層する。そして加圧一体化した後、焼成する。焼成品
の断面を図2に示す。この焼成品30では、大小の各ビ
ア部32を通して一層おきに内部電極34が接続され、
それによって一層おきの内部電極34に異なる極性の電
圧を印加できる構造となる。図2では図面を分かり易く
するため積層枚数が4枚しか描いていないが、実際の積
層型圧電素子では、積層枚数は数十枚ないし百数十枚に
も及ぶ。
As shown in FIG. 1B, such green sheets 10 are combined and laminated such that the large via holes 12 and the small via holes 14 face each other. That is, large via hole 1
2 are alternately stacked so that the center of the small via hole 14 coincides with the center of the small via hole 14. After being integrated under pressure, it is baked. FIG. 2 shows a cross section of the fired product. In this fired product 30, the internal electrodes 34 are connected every other layer through the large and small via portions 32,
Thus, a structure in which voltages of different polarities can be applied to every other internal electrode 34 is obtained. Although FIG. 2 shows only four stacked layers for easy understanding of the drawing, the number of stacked layers is several tens to one hundred and several tens in an actual stacked piezoelectric element.

【0013】ビア部の詳細を図3に示す。これは焼成品
を切断して観察した模式図である。グリーンシートの状
態では、大ビア穴の直径は0.25mmφ、小ビア穴の直
径は0.125mmφに設定してあり、従って焼結後はそ
れよりも小さくなっている。しかし、大ビア穴と小ビア
穴の直径の相対比率は変わらない。大ビア穴12内に
は、その穴壁近傍に空隙が生じるものの、小ビア穴14
内にはほぼ完全に金属材32が充満している。これは焼
成時にセラミックスグリーンシート及び金属粉ともに収
縮が生じ、金属粉の方が収縮が大きいため両ビア穴との
間に空隙が発生するが、小ビア穴の毛管現象により大ビ
ア穴内の金属粉の浸入作用が生じ、まず小ビア穴内に金
属粉が充填した状態となる。また大ビア穴内に残った金
属粉は凝集力で球形化し、ビア穴壁からは離れるもの
の、小ビア穴内の金属材や内部電極パターンとは接続さ
れたままの状態を保つため、良好な電気的接続状態が実
現される。また大ビア穴の中心と小ビア穴の中心が多少
ずれても、それが両ビア穴の半径の差程度であれば、上
記の良好な接続状態は確保される。
FIG. 3 shows details of the via portion. This is a schematic diagram in which the fired product is cut and observed. In the state of the green sheet, the diameter of the large via hole is set to 0.25 mmφ, and the diameter of the small via hole is set to 0.125 mmφ, so that the diameter after sintering is smaller. However, the relative ratio between the diameter of the large via hole and the diameter of the small via hole does not change. Although a void is formed in the large via hole 12 near the hole wall, the small via hole 14
The inside is almost completely filled with the metal material 32. This is because both the ceramic green sheet and the metal powder shrink during firing, and the metal powder shrinks more, creating a gap between the two via holes. And the metal powder is first filled in the small via hole. In addition, although the metal powder remaining in the large via hole becomes spherical due to cohesive force and separates from the via hole wall, it maintains good connection with the metal material and internal electrode pattern in the small via hole, so that good electrical The connection state is realized. In addition, even if the center of the large via hole and the center of the small via hole are slightly displaced from each other, as long as the difference is about the difference between the radii of the two via holes, the above-described favorable connection state is ensured.

【0014】因に、従来同様に、同径(直径0.125
mmφ)のビア穴でビア接続を行った場合の焼成品の模式
図を図4に示す。これは接続不良が生じた典型的な状態
である。このように、従来品では、各ビア穴に充填した
金属粉が焼成時に収縮し、それぞれ球形化するため、上
下のビア穴内の金属材が不連続となって、内部電極間の
電気的接続が行えなくなる。多数枚の積層焼結品中に、
このような不連続(断線)箇所が1箇所でもあると、そ
の素子は不良品となり使用できない。特に両ビア穴の中
心位置がずれると、このような接続不良が生じ易くな
る。
However, as in the prior art, the same diameter (0.125
FIG. 4 is a schematic view of a fired product when via connection is performed with a via hole of (mmφ). This is a typical state where a connection failure has occurred. As described above, in the conventional product, the metal powder filled in each via hole shrinks during firing and becomes spherical, respectively, so that the metal material in the upper and lower via holes becomes discontinuous, and the electrical connection between the internal electrodes is reduced. You cannot do it. In many laminated sintered products,
If there is even one such discontinuity (disconnection), the element becomes defective and cannot be used. In particular, if the center positions of both via holes are shifted, such poor connection is likely to occur.

【0015】大小ビア穴の直径の比率は、大ビア穴径が
小ビア穴径の1.2〜2.0倍程度の範囲内とするのが
望ましい。穴径の比率が1.2未満では積層のずれ公差
をカバーすることができないし、逆に穴径の比率が2.
0よりも大きいと、不活性部分が増加し好ましくないか
らである。
It is desirable that the ratio of the diameter of the large via hole to the diameter of the large via hole is in the range of about 1.2 to 2.0 times the diameter of the small via hole. If the ratio of the hole diameters is less than 1.2, the deviation tolerance of the lamination cannot be covered, and conversely, the ratio of the hole diameters is 2.
If it is larger than 0, the inactive portion increases, which is not preferable.

【0016】本発明は、上記のような積層型圧電素子の
みならず、積層型の回路基板や積層型コンデンサ、積層
型マイクロ波誘電体素子などにも適用できることは言う
までもない。
It goes without saying that the present invention can be applied not only to the above-described laminated piezoelectric element, but also to a laminated circuit board, a laminated capacitor, a laminated microwave dielectric element and the like.

【0017】[0017]

【発明の効果】本発明は上記のように、大ビア部と小ビ
ア部が交互に積層するように組み合わせた構成であるの
で、金属粉の焼成収縮率がセラミックスグリーンシート
の焼成収縮率よりもはるかに大きいにもかかわらず、小
ビア穴に金属粉が充満し、大ビア穴では金属材の凝集作
用によって金属材が球形化し、上下のビア部の間やビア
部と内部電極との間で確実に電気的接続が行われる。ま
た隣接する大小のビア部の間で、両ビア穴の半径の差程
度の多少の位置ずれは許容され、電気的接続に支障を来
さない。これらのために、ビア接続部での電気的接続不
良を防止でき、信頼性が大幅に向上すると共に製造の歩
留りが向上する。
As described above, the present invention has a structure in which the large via portions and the small via portions are combined so as to be alternately stacked, so that the firing shrinkage of the metal powder is smaller than that of the ceramic green sheet. Despite being much larger, the small via holes are filled with metal powder, and in the large via holes, the metal material becomes spherical due to the cohesive action of the metal material, and between the upper and lower via portions and between the via portion and the internal electrode. The electrical connection is made reliably. Further, a slight displacement between adjacent large and small via portions, which is equivalent to a difference between the radii of the two via holes, is allowed, and does not hinder the electrical connection. For these reasons, electrical connection failure at the via connection portion can be prevented, reliability is greatly improved, and the production yield is improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係るビア形成方法の一実施例を示す説
明図。
FIG. 1 is an explanatory view showing one embodiment of a via forming method according to the present invention.

【図2】本発明によりビア接続した積層焼結品の断面
図。
FIG. 2 is a cross-sectional view of a laminated sintered product via-connected according to the present invention.

【図3】本発明に係る積層焼結品のビア部の拡大説明
図。
FIG. 3 is an enlarged explanatory view of a via portion of the laminated sintered product according to the present invention.

【図4】従来の積層焼結品のビア部の拡大説明図。FIG. 4 is an enlarged explanatory view of a via portion of a conventional laminated sintered product.

【符号の説明】[Explanation of symbols]

10 セラミックスグリーンシート 12 大ビア穴 14 小ビア穴 16 内部電極パターン 18 導電ペースト 20 無電極部 Reference Signs List 10 ceramic green sheet 12 large via hole 14 small via hole 16 internal electrode pattern 18 conductive paste 20 non-electrode part

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 セラミックスグリーンシートを積層する
際、隣接するグリーンシートの対応する箇所にビア穴を
設けて内部に金属粉を充填しておき、積層一体化後に焼
結することにより、ビア穴内の金属材によって層間の電
気的接続を行うビアの形成方法において、隣接するグリ
ーンシートの対応する箇所に形成するビア穴を、一方が
大ビア穴、他方が小ビア穴となる組み合わせとすること
を特徴とするセラミックス積層体のビア形成方法。
When laminating ceramic green sheets, via holes are provided in corresponding portions of adjacent green sheets, metal powder is filled therein, and sintering is performed after lamination and integration. In the method of forming a via for electrically connecting layers with a metal material, a via hole formed in a corresponding portion of an adjacent green sheet is a combination in which one is a large via hole and the other is a small via hole. Via forming method for a ceramic laminate.
【請求項2】 大径ビア部の直径を、小径ビア部の直径
の1.2〜2倍とした請求項1記載のビア形成方法。
2. The via forming method according to claim 1, wherein the diameter of the large diameter via portion is 1.2 to 2 times the diameter of the small diameter via portion.
JP5207081A 1993-07-29 1993-07-29 Via forming method for ceramic laminate Expired - Lifetime JP2767188B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5207081A JP2767188B2 (en) 1993-07-29 1993-07-29 Via forming method for ceramic laminate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5207081A JP2767188B2 (en) 1993-07-29 1993-07-29 Via forming method for ceramic laminate

Publications (2)

Publication Number Publication Date
JPH0745470A JPH0745470A (en) 1995-02-14
JP2767188B2 true JP2767188B2 (en) 1998-06-18

Family

ID=16533888

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5207081A Expired - Lifetime JP2767188B2 (en) 1993-07-29 1993-07-29 Via forming method for ceramic laminate

Country Status (1)

Country Link
JP (1) JP2767188B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10148190B2 (en) 2015-04-20 2018-12-04 Mitsubishi Electric Corporation Power conversion device

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4687757B2 (en) * 2008-07-22 2011-05-25 株式会社村田製作所 Manufacturing method of multilayer ceramic electronic component
JP2015162527A (en) * 2014-02-26 2015-09-07 株式会社村田製作所 Laminated film capacitor, bus bar with built-in capacitor, power conversion system, manufacturing method of laminated film capacitor, and manufacturing method of bus bar with built-in capacitor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10148190B2 (en) 2015-04-20 2018-12-04 Mitsubishi Electric Corporation Power conversion device

Also Published As

Publication number Publication date
JPH0745470A (en) 1995-02-14

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