JP2765572B1 - - Google Patents

Info

Publication number
JP2765572B1
JP2765572B1 JP8244459A JP24445996A JP2765572B1 JP 2765572 B1 JP2765572 B1 JP 2765572B1 JP 8244459 A JP8244459 A JP 8244459A JP 24445996 A JP24445996 A JP 24445996A JP 2765572 B1 JP2765572 B1 JP 2765572B1
Authority
JP
Japan
Prior art keywords
semiconductor
electrodes
patterns
connect
connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP8244459A
Other languages
English (en)
Other versions
JPH10163414A (ja
Inventor
Masaru Sakaguchi
Kunihiko Nishi
Aizo Kaneda
Koji Serizawa
Michiharu Pponda
Tooru Yoshida
Michio Tanimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8244459A priority Critical patent/JPH10163414A/ja
Application granted granted Critical
Publication of JP2765572B1 publication Critical patent/JP2765572B1/ja
Publication of JPH10163414A publication Critical patent/JPH10163414A/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP8244459A 1996-09-17 1996-09-17 マルチチップ半導体装置 Granted JPH10163414A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8244459A JPH10163414A (ja) 1996-09-17 1996-09-17 マルチチップ半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8244459A JPH10163414A (ja) 1996-09-17 1996-09-17 マルチチップ半導体装置

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP63139304A Division JP2728432B2 (ja) 1987-12-28 1988-06-08 マルチチツプ半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP10007207A Division JP2865103B2 (ja) 1998-01-19 1998-01-19 マルチチップ半導体装置

Publications (2)

Publication Number Publication Date
JP2765572B1 true JP2765572B1 (ja) 1998-06-18
JPH10163414A JPH10163414A (ja) 1998-06-19

Family

ID=17118971

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8244459A Granted JPH10163414A (ja) 1996-09-17 1996-09-17 マルチチップ半導体装置

Country Status (1)

Country Link
JP (1) JPH10163414A (ja)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW472330B (en) 1999-08-26 2002-01-11 Toshiba Corp Semiconductor device and the manufacturing method thereof
JP2001177051A (ja) 1999-12-20 2001-06-29 Toshiba Corp 半導体装置及びシステム装置
JP3999945B2 (ja) * 2001-05-18 2007-10-31 株式会社東芝 半導体装置の製造方法
JP2003007971A (ja) * 2001-06-25 2003-01-10 Toshiba Corp 半導体装置
JP3655242B2 (ja) 2002-01-04 2005-06-02 株式会社東芝 半導体パッケージ及び半導体実装装置
CN100550355C (zh) 2002-02-06 2009-10-14 揖斐电株式会社 半导体芯片安装用基板及其制造方法和半导体模块

Also Published As

Publication number Publication date
JPH10163414A (ja) 1998-06-19

Similar Documents

Publication Publication Date Title
US5686764A (en) Flip chip package with reduced number of package layers
US7217994B2 (en) Stack package for high density integrated circuits
US7321164B2 (en) Stack structure with semiconductor chip embedded in carrier
US5637916A (en) Carrier based IC packaging arrangement
US7423338B2 (en) Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
MY114888A (en) Method for forming a monolithic electronic module by stacking planar arrays of integrated circuit chips
CA2159243A1 (en) Method of Manufacturing Chip-Size Package-Type Semiconductor Device
US20030201521A1 (en) Semiconductor packaging device and manufacture thereof
KR20050046091A (ko) 이중 스택된 ｂｇａ 패키지 및 다중 스택된 ｂｇａ 패키지
EP0890989A4 (en) SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE DEVICE
JPS58159360A (ja) 半導体装置
US7095107B2 (en) Ball assignment schemes for integrated circuit packages
WO2002034021A3 (en) Carrier-based electronic module
US20200402959A1 (en) Stacked semiconductor package having an interposer
WO2007056013A3 (en) High density three dimensional semiconductor die package
US20070138653A1 (en) Method and power control structure for managing plurality of voltage islands
JP2765572B1 (ja)
MY124540A (en) High density design for organic chip carriers
US6121678A (en) Wrap-around interconnect for fine pitch ball grid array
US7057116B2 (en) Selective reference plane bridge(s) on folded package
JPS63131560A (ja) チップ接続構造体
TWI257155B (en) Semiconductor package
EP0962976B1 (en) Integrated circuit having a unique lead configuration
US6295220B1 (en) Memory bar and related circuits and methods
US7105926B2 (en) Routing scheme for differential pairs in flip chip substrates

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080403

Year of fee payment: 10

EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090403

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090403

Year of fee payment: 11