JP2739842B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor integrated circuit device having a bump electrode at an external connection electrode portion.

[0002]

2. Description of the Related Art Au /
A conventional manufacturing method of a semiconductor device in which a bump electrode made of gold or the like is formed via an adhesive layer made of Ti and used as an external connection electrode portion will be described with reference to FIGS.

First, an insulating film 2 is formed on a main surface of a semiconductor substrate 1, and an aluminum film 3 having a thickness of about 1 μm for internal wiring is formed on the entire surface.
Is formed, and a photoresist pattern 17 is formed thereon (FIG. 3A). Next, the photoresist pattern 1
By using the mask 7 as a mask, the aluminum film 3 is selectively etched to form the internal wiring 18 including the pad portion 18P from the aluminum film 3 (FIG. 3B). Next, a protective insulating film 19 is grown (FIG. 3C), and a contact hole 19K is formed in the protective insulating film 19 by photolithography to expose a central portion of the upper surface of the pad portion 18P excluding a peripheral portion of the upper surface (FIG. 3).
(D)). Next, an adhesive layer 4 of Au / Ti (a laminated film of a gold film on the upper side and a titanium film on the lower side) is applied to the entire surface. The internal wiring is required to be an aluminum film 3 as thick as 1 μm in order to reduce the electric resistance to a predetermined value, but this adhesive layer 4 is for obtaining the adhesive strength between the aluminum pad portion and the gold bump electrode. Therefore, the film is as thin as 200 nm (FIG. 3)
(E)). Next, an insulating photoresist pattern 15 having an opening 15K is formed on the pad 18P (FIG. 4A). Next, by using the thin adhesive layer 4 as a plating current path, that is, as a plating electrode, partial plating of gold is performed so that the opening 15K of the resist pattern 15 is formed.
A gold bump electrode 14 to be adhered to the adhesive layer 4 is formed inside (FIG. 4B), and thereafter, the resist pattern 15 is removed, and the portion of the adhesive layer 4 used as a plating current path under the resist pattern Is removed using the gold bump electrode 14 as a mask, and the gold bump electrode 14 is connected to the pad portion 18P via the remaining adhesive layer 4 (FIG. 4C).

[0004]

In this conventional method for forming a bump electrode, since only the thin adhesive layer 4 is used as the metal film used for the plating current path, the electric resistance of the plating current path increases. Variations in the plating current to each bump electrode formation part are likely to occur due to the distance from the plating electrode connection part within the surface of the semiconductor wafer, and as a result the bump electrode height is likely to vary, and a large number of external leads are collectively There is a problem in that gang bonding for bonding to the bump electrode is hindered.

When the thin adhesive layer used for plating is removed by etching after the formation of the bump electrode, it is necessary to protect the internal wiring including the pad portion.
9, the opening 19K needs to be smaller than the bump electrode 14, so that the pad portion 18P and the bump electrode 14
And the electric resistance increases, and the step caused by the extension of the protective insulating film 19 around the upper surface of the pad portion 18P is reflected on the upper surface of the bump electrode 14 in a replica shape, and the upper surface becomes concave. Therefore, there is a problem that the connection strength with the external lead is reduced.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to reduce the variation in height between a large number of bump electrodes, reduce the electrical resistance between bump electrodes and pad portions, and make the upper surface of the bump electrodes flat. It is to provide a method of manufacturing the device.

[0007]

A feature of the present invention is a step of forming a conductive film for internal wiring on an insulating film provided on a main surface of a semiconductor substrate, and a method of forming an opening on the conductive film . 1
Of forming a resist par Tan, a step of forming a bump electrode by plating into said opening said conductive film as a plating current path, the first resist pattern
After removal, the bump electrode is covered and the conductive film is
A second resist pattern covering a portion to be an internal wiring
Forming a second resist , and then the second resist
Patterning the conductive film using a pattern as a mask
And a step of forming an internal wiring. Here, the conductive film may be configured to include a lower film serving as a main material of an internal wiring, and an upper film which is thinner than the lower film and serves as an adhesive layer between the lower film and the bump electrode. it can. In this case, the lower film may be an aluminum film, the upper film may be a laminated film in which a gold film is laminated on a titanium film, and the bump electrode may be a gold bump electrode formed by gold plating. The thickness of the lower layer of the conductor film is 800 nm to 1200 nm, and the thickness of the upper layer of the conductor film is 100 nm to 300 nm.
m is preferable. Further, it is preferable that the lower layer film and the upper layer film are formed continuously by sputtering in the same chamber without being exposed to the air on the way. is there
Alternatively, the feature of the present invention is that an insulating layer provided on a main surface of a semiconductor substrate is provided.
Forming a conductive film for internal wiring on the edge film;
Forming a resist pattern with an opening on the electrode film
And using the conductive film as a plating current path in the opening.
Forming a bump electrode by plating, and
Thereafter, the conductive film is patterned to form internal wiring.
And a step of forming the conductive film as an internal wiring main material.
Lumi film, the aluminum film and the aluminum film
A gold film is laminated on a titanium film, which serves as an adhesive layer with the bump electrode
The bump electrode is formed by gold plating.
The manufacturing method of the semiconductor device which is the formed gold bump electrode
is there. Also in this case, the thickness of the aluminum film is 800 nm or more.
1200 nm, and the thickness of the laminated film serving as the adhesive layer is
It is preferably from 100 nm to 300 nm, and
The aluminum film and the laminated film are in the same chamber.
Continuously formed by sputtering without exposure to air
Preferably.

[0008]

According to the above-mentioned manufacturing method, the conductive film serving as the internal wiring is used as it is as the plating current path, so that the film thickness is increased, and the electric resistance of the plating current path is reduced. Of the bump electrodes can be reduced.

Further, since it is not necessary to provide a protective insulating film on the bottom of the bump electrode, the electric resistance between the bump electrode and the pad portion is reduced, and the upper surface of the bump electrode can be made flat.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. 1A to 2D are cross-sectional views illustrating a method of manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps.

First, as shown in FIG. 1A, an aluminum film serving as a main material of an internal wiring is formed on an entire surface of an insulating film 2 such as a field insulating film provided on a main surface of a semiconductor substrate 1 in a semiconductor wafer state. 3 is grown to a thickness of 1000 nm by sputtering. That is, the aluminum film 3 is a lower layer film of a conductive film for internal wiring, and preferably has a thickness of 800 nm or more in order to reduce the resistance of the internal wiring and the resistance as a plating current path. From the viewpoint of patterning a fine pattern, the thickness is preferably 1200 nm or less.

Next, as shown in FIG.
A 100 nm-thick titanium film is deposited on the entire upper surface by sputtering, and a 100 nm-thick gold film is successively deposited on the titanium film by sputtering, thereby forming a 200 nm-thick adhesive layer 4 having a laminated structure of Au / Ti. Form. The titanium film adheres well to the aluminum film, and the gold film adheres well to the gold bump electrode formed on it later, so that the laminated film consisting of this titanium film and the gold film is And an upper layer film of a conductive film for internal wiring. This adhesive layer 4 has a thickness of 100 to obtain a predetermined adhesive strength.
It is preferable that the thickness is not less than nm. On the other hand, in the present invention, the role of lowering the resistance of the plating current path can be performed by the aluminum film 3, so that the adhesive layer 4 only obtains a predetermined adhesive strength, It is not necessary to make it thicker,
It is preferable that the thickness of the adhesive layer 4 of this laminated film is 300 nm or less in consideration of the number of sputtering steps, consumption of expensive gold, and the like. As in the above embodiment, the thickness of the titanium film in contact with the lower aluminum film and the thickness of the gold film in contact with the upper bump electrode are substantially the same inside the adhesive layer.

Further, in this embodiment, since the laminated film is not formed after patterning after the aluminum film,
Sputtering of aluminum film formation → sputtering of titanium film → sputtering of gold film formation is performed continuously in the same chamber without being exposed to the air in the same chamber, so that man-hours can be reduced and an oxide film is formed on the aluminum film surface. Since it is not generated, the adhesive strength between the aluminum film 3 and the lower film of the adhesive layer 4 and the titanium film is increased.

Next, as shown in FIG. 1C, an insulating photoresist is applied to a thickness of about 10 μm to 30 μm, and an opening 5 is formed in the bump electrode formation region by photolithography.
A resist pattern 5 provided with K is formed.

Next, as shown in FIG. 1D, gold electroplating is performed by using a conductive film of a thick aluminum film 3 and a thin Au / Ti adhesive layer 4 as a plating current path, thereby forming an opening in the opening of the photoresist pattern. Then, a gold bump electrode (projection electrode) 6 having a height of about 5 to 25 μm is formed. In this example,
Since the thick aluminum film 3 which is the main material of the internal wiring is mainly used for the plating current path, the electric resistance of this plating current path is reduced, and the height variation between the bump electrodes 6 is reduced. Further, there is no conventional protective insulating film, and the entire bottom surface of the bump electrode is adhered to the flat upper surface of the conductive film. Therefore, the electrical resistance between the two is reduced, and the upper surface of the bump electrode 6 is also flat. It will be.

Next, as shown in FIG. 2A, after removing the photoresist pattern 5, a new photoresist pattern 7 is formed.

Next, as shown in FIG. 2B, using the photoresist pattern 7 as a mask, the thin adhesive layer 4 of the Au / Ti laminated film and the thick aluminum film 3 of the main wiring material are sequentially removed to form the bump electrode. An internal wiring 8 having a pad portion 8P to which the entire bottom surface 6 is attached is formed from the aluminum film 3 having a thin adhesive layer 4 attached on the upper surface.

Next, a protective film 9 of silicon dioxide or the like having a thickness of about 1 μm is entirely grown (FIG. 2C), and on the upper surface and the upper side surface of the bump electrode 6 using a mask material (not shown) as a mask. By removing the protective film 9 by etching and removing the mask material, the semiconductor device shown in FIG. 2D is obtained.

[0019]

As described above, according to the present invention, since a bump electrode is formed before patterning an internal wiring material film to form an internal wiring, a low specific resistance and thick film for forming an internal wiring is used. The metal film can be used as a plating current path when forming a bump electrode. Therefore, the plating current path of the present invention can reduce the electric resistance thereof to about 1/3 as compared with the prior art, thereby increasing the height between a large number of bump electrodes formed in the semiconductor wafer surface. From about ± 20% of the prior art to ± 1 in the present invention.
It can be reduced to about 0%.

Further, since the connection area between the bump electrode and the pad portion can be increased, the connection resistance between the bump electrode and the pad portion can be reduced from about 2 Ω in the prior art to about 1 Ω in the present invention. Further, since there is no step due to the protective insulating film below the bump electrode, the step of the concave shape on the upper surface (top) of the bump electrode can be reduced to about zero in the present invention from about 500 nm in the prior art.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps.

FIG. 2 is a cross-sectional view showing a step subsequent to FIG. 1 in order;

FIG. 3 is a cross-sectional view showing a method of manufacturing a semiconductor device according to a conventional technique in the order of steps.

FIG. 4 is a cross-sectional view showing a step subsequent to FIG. 3 in order;

[Explanation of symbols]

 Reference Signs List 1 semiconductor substrate 2 insulating film 3 aluminum film serving as main material of internal wiring 4 adhesive layer of Au / Ti laminated film 5 resist pattern 5K opening of resist pattern 6 bump electrode 7 resist pattern 8 internal wiring 8P pad part of internal wiring 9 Protective film 15 Resist pattern 15K Opening of resist pattern 17 Resist pattern 18 Internal wiring 18P Pad part of internal wiring 19 Protective insulating film 19K Contact hole formed in protective insulating film

Claims (8)

(57) [Claims] A step of forming a conductive film for internal wiring on an insulating film provided on a main surface of a semiconductor substrate; and a step of forming a first resist pattern having an opening on the conductive film. forming a plating bump electrode in the opening of the conductive film as a plating current path, said first
After removing the resist pattern, the bump electrode is covered.
Cover and cover a portion of the conductive film which will be an internal wiring.
Forming a second resist pattern, and thereafter forming an internal wiring by patterning the conductive film using the second resist pattern as a mask . Production method. 2. The conductive film according to claim 1, wherein the conductive film includes: a lower film that is a main material of an internal wiring; and an upper film that is thinner than the lower film and that is an adhesive layer between the lower film and the bump electrode. 2. The method for manufacturing a semiconductor device according to claim 1, wherein: 3. The method according to claim 1, wherein the lower film is an aluminum film, the upper film is a laminated film in which a gold film is laminated on a titanium film, and the bump electrode is a gold bump electrode formed by gold plating. 3. The method of manufacturing a semiconductor device according to claim 2, wherein 4. A film thickness of a lower film of the conductor film is 800 nm.
And the thickness of the upper layer film of the conductor film is 1 to 1200 nm.
3. The structure according to claim 2, wherein the thickness is from 00 nm to 300 nm.
The manufacturing method of the semiconductor device described in the above. 5. The method according to claim 2, wherein the lower layer film and the upper layer film are continuously formed in the same chamber without being exposed to the atmosphere. 6. On the insulating film provided on the main surface of the semiconductor substrate
Forming a conductive film for internal wiring on the conductive film;
Forming a resist pattern having an opening in it;
Using the conductive film as a plating current path, a bump is provided in the opening.
Forming a step electrode by plating, and thereafter,
Patterning the conductive film to form internal wiring.
An aluminum film serving as a main material of an internal wiring
And the aluminum film and the bumps are thinner than the aluminum film.
The product of a gold film laminated on a titanium film, which serves as an adhesive layer with the electrode
A layer film, wherein the bump electrodes are formed by gold plating.
Of a semiconductor device, characterized by being a gold bump electrode
Production method. 7. The thickness of the aluminum film is 800 nm to 12
And the thickness of the laminated film serving as the adhesive layer is 10 nm.
7. The structure according to claim 6, wherein the thickness is from 0 nm to 300 nm.
Manufacturing method of the semiconductor device described above. Claim 8. The aluminum film and the laminated film are the same
Continuous sputtering without exposing to air in the chamber
7. The half according to claim 6, wherein the half is formed by a heater.
A method for manufacturing a conductor device.