JP2751242B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a protruding electrode.

[Conventional technology]

Generally, in a tape carrier type semiconductor device, a protruding metal electrode is provided on a main surface of a semiconductor substrate. Conventionally, in a method of manufacturing a semiconductor device having this type of bump electrode, after all required element forming steps and wiring forming steps for a semiconductor substrate are completed, a new metal film is deposited on the entire surface of the substrate, and this is electrolyzed. It is configured as a current path at the time of plating, then a base film of the protruding electrode formation region is formed on this metal film by using a lift-off method or the like, and further, a photoresist or the like is used as a mask and the metal film is used as a current path. A method of forming a projection electrode in a projection electrode formation region by electrolytic plating has been adopted.

[Problems to be solved by the invention]

According to the above-described conventional method for manufacturing a semiconductor device having a protruding electrode, a metal film as a current path for performing electrolytic plating is newly applied over the entire surface of the semiconductor substrate after the wiring of the semiconductor device is formed. It is necessary to remove the unnecessary metal film after the plating is completed. Upon this removal,
Since the etching method using the formed protruding electrode as a mask is employed, an undercut is easily generated under the protruding electrode, and a metal film may be corroded by a residual liquid of the etching solution. However, there is a drawback in that the adhesion strength is significantly reduced.

[Means for solving the problem]

The method of manufacturing a semiconductor device according to the present invention includes the steps of: forming a metal film for wiring on a semiconductor substrate and then patterning; forming a wiring for element and wiring for electrolytic plating; and patterning after forming a protective film on the entire surface. A step of removing the protective film in a projecting electrode forming region of the element wiring, and a connection film forming region for electrically connecting the element wiring and the electrolytic plating wiring; and A step of forming a barrier film in the projection electrode formation region and the connection film formation region, a step of forming a projection electrode by electrolytic plating in the projection electrode formation region in which the barrier film is formed, and Selectively removing the electrolytic plating wiring to remove the short circuit.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

1 (a) to 1 (i) and FIG. 2 are views for explaining a first embodiment in which the present invention is applied to the formation of a bump electrode of a tape carrier type integrated circuit, and FIG. 2 is a manufacturing process. 1 (a) to 1 (i) are cross-sectional views along the line AA 'in the order of manufacturing steps. Hereinafter, description will be made in the order of the manufacturing process.

First, as shown in FIG. 1A, an element is formed on a semiconductor substrate 1 made of silicon. Next, a device region in which a silicon oxide film having a thickness of about 1 μm is formed and a dicing line region I having a width of about 200 μm in which the surface of the semiconductor substrate 1 is exposed.
An aluminum film 3 having a thickness of about 0.8 μm is formed thereon by sputtering.

Next, as shown in FIG. 1B, a first photoresist pattern 4 having a desired thickness and shape is formed, and an unnecessary portion of the aluminum film 3 is formed by etching using the first photoresist pattern 4 as a mask.
Is removed, and element wiring required for the semiconductor device is formed.
This element wiring is formed as an aluminum wiring 3a including the protruding electrode formation region II. At the same time, the wiring 3b for electrolytic plating is formed in the dicing line region I.

Next, as shown in FIG. 1C, after the first photoresist pattern 4 is peeled off, a silicon oxide film 5 serving as a protective film is removed.
Is grown on the entire surface with a thickness of about 0.5 μm. Next, using the second photoresist pattern 6 patterned to a desired thickness and shape as a mask, a projection electrode formation region II and a connection film formation region III for connecting the aluminum wiring 3a and the electrolytic plating wiring 3b are formed. The silicon oxide film 5 is removed by etching.

Next, as shown in FIG. 1 (d), a metal film 7 serving as a barrier film when plating is grown is applied to the substrate surface while the second photoresist pattern 6 is left. Here, the metal film 7 has a thickness of 0.1 μm for the purpose of preventing gold from diffusing into the lower layer, and a thickness of 0.1 μm for the purpose of enhancing the adhesion between the platinum film and the base. It has a two-layer structure of a titanium film.

Next, as shown in FIG. 1 (e), by removing the second photoresist pattern 6, the unnecessary portion of the metal film 7 is simultaneously removed by a lift-off method, and heat-treated in a nitrogen atmosphere at 400 ° C. for 60 minutes. Thus, the projection electrode formation region II
The barrier film 7a is formed therein, and the connection film 7b of the wiring for electrolytic plating is formed in the connection film formation region III. Therefore, the aluminum wiring 3a is now connected to the wiring for electrolytic plating by the connection film 7b.
It is electrically connected to 3b.

Next, as shown in FIG. 1 (f), a polyimide resin 8 as a protective film is applied to a thickness of about 3 μm, and a projection is formed using a third photoresist pattern 9 patterned to a desired thickness and shape as a mask. The polyimide resin 8 in the electrode forming region II and the dicing line region I is removed. The plan structure of FIG. 2 shows a state where the process of FIG. 1 (f) is completed.

Next, as shown in FIG. 1 (g), the entire substrate is immersed in a gold plating solution, and a current flows between the semiconductor substrate 1 and the anode electrode plate provided on the gold plating apparatus side, so that the gold projection electrode 10 is formed. Electroplating is performed until a thickness of 10 to 30 μm is formed on the barrier film 7a in the protruding electrode formation region II.

After completion of the electrolytic plating, as shown in FIG. 1 (h), the silicon oxide film 5 and the electrolytic plating wiring 3b in the dicing line region I are removed by an etching method using the third photoresist pattern 9 and the gold bump electrode 10 as a mask. Then, the dicing line region I and the aluminum wiring 3a are insulated and separated. Here, the aluminum wiring 3a is not etched because the connection film 7b serves as an etching stopper.

Thereafter, the third photoresist pattern 9 is entirely stripped to complete the semiconductor device having the gold bump electrode 10 as shown in FIG. 1 (i).

As described above, in the first embodiment, the electrolytic plating wiring 3b formed at the same time as the wiring for the semiconductor element is used for the current path at the time of electrolytic plating. Unnecessary wiring for electrolytic plating
It is only necessary to remove 3b, and at this time, since the aluminum wiring 3a is protected by the connection film 7b, it is not etched and the adhesion strength between the gold bump electrode 10 and the semiconductor substrate 1 can be maintained.

Also, since the polyimide resin 8 whose film thickness can be relatively easily adjusted is used for the protective film in the final stage, the film thickness of the protective film combined with the silicon oxide film 5 can be increased, and the plating isotropically grown. It is also effective for miniaturization of the semiconductor device by suppressing the enlargement of the projection electrode.

3 (a) to 3 (f) are cross-sectional views shown in the order of manufacturing steps for explaining a second embodiment of the present invention, and are cross-sectional views cut at the same positions as in the first embodiment.

First, as shown in FIG. 3A, a dicing line region I in which the surface of the semiconductor substrate 1 is exposed by removing the silicon oxide film 2 in the same manner as in the first embodiment, and a silicon oxide film 2
An aluminum film is deposited on the entire surface of the element region in which is formed. Then, unnecessary portions of the aluminum film are removed by using the first resist pattern 4 having a desired thickness and shape as a mask, and the aluminum wiring including the protruding electrode formation region II is removed.
3a and electrolytic plating wiring 3b are formed.

Next, as shown in FIG. 3B, after removing the first photoresist pattern 4, a silicon nitride film 11 as a protective film is grown to a thickness of 0.4 to 0.6 μm on the entire surface of the substrate, and Using the second photoresist pattern 6A patterned to a thickness and a shape as a mask, the silicon nitride film 11 in the protruding electrode formation region II, the connection film formation region III, and the dicing line region I is removed.

Next, as shown in FIG. 3 (c), the second photoresist pattern 6A is peeled off, and a third photoresist pattern 9A having a desired film thickness and shape is newly formed. Only the connection film formation region III is exposed. Next, a metal film 7 serving as a barrier film when growing the plating is deposited on the substrate surface. Here, the metal film 7 is a two-layer film of titanium and platinum as in the first embodiment.

Next, as shown in FIG. 3D, the third photoresist pattern 9A is peeled off, and at the same time, unnecessary portions of the metal film 7 are removed by a lift-off method, and a heat treatment is performed for 60 minutes in a nitrogen atmosphere at 400 ° C. The barrier film 7a is formed in the electrode formation region II, and the connection film 7b is formed in the connection film formation region III.

Next, as shown in FIG. 3 (e), the entire substrate is immersed in a gold plating solution, and a current is applied between the semiconductor substrate 1 and the anode electrode plate provided on the plating apparatus side so that the gold projection electrode 10A becomes 10 to 10 μm. 30μ
Electroplating is performed until the thickness of m is formed.

After the completion of the electrolytic plating, all the electrolytic plating wirings 3b in the dicing line region I are removed in the same manner as in the first embodiment.
If the dicing line region I is insulated and separated from the aluminum wiring 3a, a semiconductor device having the gold projecting electrodes 10A and the small gold projecting electrodes 10B is completed as shown in FIG. 3 (f).

Also in the second embodiment, the aluminum wiring 3a is protected by the connection film 7b when the electrolytic plating wiring 3b is removed after the formation of the gold projection electrode 10A, so that side etching of the aluminum wiring 3a is prevented. Thus, the adhesive strength with the substrate can be maintained.

Further, in the second embodiment, since the silicon nitride film 11 in the dicing line region I and the silicon nitride film 11 in the projecting electrode formation region II are simultaneously removed by etching in the step of FIG. It is not necessary to remove the silicon nitride film 11 when removing the plating wiring 3b to insulate and separate the dicing line region I and the aluminum wiring 3a. Therefore, there is no need to mask the area other than the dicing line area I and the projection electrode forming area II with a resist or the like before performing the electrolytic plating, and there is an advantage that the self-aligned electrolytic plating can be performed. In addition, the small gold projection electrode 10B formed at this time can also play a role of preventing the lead of the tape carrier from coming into contact with the edge of the semiconductor device when the tape carrier and the semiconductor device are pressure-bonded. .

In the above embodiment, the case where gold plating is used to form the protruding electrodes has been described. However, the protruding electrodes may be formed by a plating method using another metal.

〔The invention's effect〕

As described above, according to the present invention, after a metal film formed on a semiconductor substrate is patterned to form a wiring for an element and a wiring for electrolytic plating, and after forming a protective film exposing a bump electrode region and a connection film forming region, A barrier film is formed in these regions, and electrolytic plating is performed only on the protruding electrode forming region or on the protruding electrode forming region and the connection film forming region using an electrolytic plating wiring as a current path to form a protruding electrode made of a metal plating film. Then, selectively remove the wiring for electrolytic plating,
By performing insulation separation between the wiring required for the semiconductor device and the semiconductor substrate, it is only necessary to remove the wiring for electrolytic plating after the completion of electrolytic plating, and the process becomes extremely simple.
Further, since the connection film made of the barrier film is used as the stopper, it is possible to prevent the occurrence of undercut below the region where the bump electrode is formed and to secure the adhesion strength between the bump electrode and the substrate. .

In addition, since the final protective film is formed before the formation of the protruding electrodes, self-aligned electrolytic plating can be performed, and the process can be simplified by omitting an independent mask forming process and the like.

[Brief description of the drawings]

1 (a) to 1 (i) are sectional views showing steps in order to explain a first embodiment of the present invention, FIG. 2 is a plan view in the middle of the steps of the first embodiment, FIG. (A)-(f) is sectional drawing shown in order of the process for demonstrating the 2nd Example of this invention. DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate, 2 ... Silicon oxide film, 3 ... Aluminum film, 3a ... Aluminum wiring, 3b ... Electroplating wiring, 4 ... First photoresist pattern, 5 ...
... silicon oxide film, 6, 6A ... second photoresist pattern, 7 ... metal film, 7a ... barrier film, 7b ... connection film,
8: polyimide resin, 9, 9A: third photoresist pattern, 10, 10A: gold projection electrode, 10B: small gold projection electrode, 11: silicon nitride film, I: dicing line region, II: ... Protrusion electrode formation region, III ... Connection film formation region.

Claims (1)

(57) [Claims] A step of forming a wiring metal film on a semiconductor substrate and then patterning to form an element wiring and an electrolytic plating wiring; and forming a protective film on the entire surface and then patterning the wiring. A step of removing the protective film in a connection film forming area for electrically connecting the projecting electrode forming area and the element wiring and the electrolytic plating wiring; and forming the projecting electrode forming area in which the protective film has been removed and A step of forming a barrier film in the connection film formation region, a step of forming a protrusion electrode by electrolytic plating in the protrusion electrode formation region in which the barrier film is formed, and a step of removing a short circuit between the protrusion electrodes after the formation of the protrusion electrode. Selectively removing the electrolytic plating wiring.