JP2734942B2 - Manufacturing method of chip carrier - Google Patents
Manufacturing method of chip carrierInfo
- Publication number
- JP2734942B2 JP2734942B2 JP5185359A JP18535993A JP2734942B2 JP 2734942 B2 JP2734942 B2 JP 2734942B2 JP 5185359 A JP5185359 A JP 5185359A JP 18535993 A JP18535993 A JP 18535993A JP 2734942 B2 JP2734942 B2 JP 2734942B2
- Authority
- JP
- Japan
- Prior art keywords
- resin
- circuit
- chip carrier
- prepreg
- insulating plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
Landscapes
- Reinforced Plastic Materials (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、チップキャリアの製造
方法に関し、具体的には、電子機器、電気機器に利用さ
れる、半導体チップを搭載するチップキャリアの製造方
法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a chip carrier, and more particularly, to a method for manufacturing a chip carrier for mounting a semiconductor chip, which is used for electronic equipment and electric equipment.
【０００２】[0002]
【従来の技術】従来のチップキャリアの製造方法として
は、プリント配線板の回路に透孔を有する絶縁板を積載
して半導体チップを搭載する窪みを形成し、この窪み内
に上記回路の一部が露出したチップキャリアを製造する
にあたり、上記回路と絶縁板との接合面にプリプレグが
介在した被圧体を熱圧成形する方法が知られている。2. Description of the Related Art As a conventional method of manufacturing a chip carrier, a circuit board of a printed wiring board is loaded with an insulating plate having a through hole to form a recess for mounting a semiconductor chip, and a part of the circuit is formed in the recess. In manufacturing a chip carrier in which a prepreg is exposed, there is known a method of hot-pressing a pressure-bearing body having a prepreg interposed on a joint surface between the circuit and the insulating plate.
【０００３】しかし、このようなチップキャリアの製造
方法は、熱圧成形の際に、回路の露出した部分にプリプ
レグから樹脂が流れ出て、この回路上に絶縁膜を形成す
る問題があった。However, such a method of manufacturing a chip carrier has a problem in that resin flows out of a prepreg into an exposed portion of a circuit at the time of hot pressing, and an insulating film is formed on the circuit.
【０００４】[0004]
【発明が解決しようとする課題】本発明は上述の問題を
解消するためになされたもので、その目的とするところ
は、熱圧成形の際、露出する回路上へ樹脂が流れ出るの
を阻止できるチップキャリアの製造方法を提供すること
にある。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problem, and an object of the present invention is to prevent a resin from flowing onto an exposed circuit at the time of hot pressing. An object of the present invention is to provide a method for manufacturing a chip carrier.
【０００５】[0005]
【課題を解決するための手段】本発明に係るチップキャ
リアの製造方法は、プリント配線板（１）の回路（１
３）に透孔（１５）を有する絶縁板（６）を積載して半
導体チップ（３）を搭載する窪み（１４）を形成し、こ
の窪み（１４）内に上記回路（１３）の一部が露出した
チップキャリアを製造するにあたり、上記回路（１３）
と絶縁板（６）との接合面にプリプレグ（１１）が介在
した被圧体を熱圧成形するチップキャリアの製造方法に
おいて、溶融粘度が２００００〜５００００ｐｏｉｓｅ
で、基材に含浸した全樹脂量に対して上記熱圧成形の条
件下での樹脂流出量が１．０〜３．０ｗｔ％のプリプレ
グ（１１）を用いることを特徴とする。According to a method of manufacturing a chip carrier according to the present invention, a circuit (1) of a printed wiring board (1) is provided.
An insulating plate (6) having a through hole (15) is mounted on 3) to form a recess (14) for mounting a semiconductor chip (3), and a part of the circuit (13) is formed in the recess (14). In manufacturing a chip carrier having an exposed surface, the circuit (13)
A method for producing a chip carrier, in which a pressure-bearing body in which a prepreg (11) is interposed on a bonding surface between a substrate and an insulating plate (6) is hot-pressed, has a melt viscosity of 20,000 to 50,000 poise.
A prepreg (11) having a resin outflow amount of 1.0 to 3.0 wt% under the conditions of the hot pressing with respect to the total amount of the resin impregnated in the base material is used.
【０００６】[0006]
【作用】本発明のチップキャリアの製造方法によると、
溶融粘度が２００００〜５００００ｐｏｉｓｅで、基材
に含浸した全樹脂量に対して上記熱圧成形の条件下での
樹脂流出量が１．０〜３．０ｗｔ％のプリプレグ（１
１）を用いると、熱圧成形の際に、プリント配線板
（１）と絶縁板（６）の接合面の回路（１３）をプリプ
レグ（１１）から流出する樹脂が埋め、間隙ができるの
を防止し、露出する回路（１３）内に樹脂が溶融して流
れ出ることがない。According to the method for manufacturing a chip carrier of the present invention,
A prepreg (1) having a melt viscosity of 20,000 to 50,000 poise and a resin outflow of 1.0 to 3.0 wt% under the above-mentioned hot pressing conditions with respect to the total amount of resin impregnated in the substrate.
When 1) is used, the resin flowing out of the prepreg (11) fills the circuit (13) on the joint surface between the printed wiring board (1) and the insulating plate (6) during hot press molding, and a gap is formed. This prevents the resin from melting and flowing out into the exposed circuit (13).
【０００７】以下、本発明を詳細に説明する。図１は、
本発明の一実施例に係るチップキャリアを用いた半導体
装置の断面図である。Hereinafter, the present invention will be described in detail. FIG.
1 is a cross-sectional view of a semiconductor device using a chip carrier according to one embodiment of the present invention.
【０００８】本発明のチップキャリアを構成するプリン
ト配線板（１）としては、基材に樹脂を含浸乾燥して得
られるプリプレグの樹脂を硬化させた有機系の絶縁板、
又はアルミナ等のセラミック系の絶縁板が用いられる。
この有機系の絶縁板の樹脂としてはエポキシ樹脂、ポリ
イミド樹脂、フッ素樹脂、フェノール樹脂、不飽和ポリ
エステル樹脂、ＰＰＯ樹脂等の単独、変成物、混合物等
が用いられる。有機系の絶縁板の基材としては、特に限
定するものではないが、ガラス繊維などの無機材料の方
が耐熱性、耐湿性などに優れて好ましい。また、耐熱性
に優れる有機繊維の布基材及びこれらの混合物を用いる
こともできる。As the printed wiring board (1) constituting the chip carrier of the present invention, an organic insulating plate obtained by curing a prepreg resin obtained by impregnating and drying a base material with a resin;
Alternatively, a ceramic insulating plate such as alumina is used.
As the resin for the organic insulating plate, an epoxy resin, a polyimide resin, a fluorine resin, a phenol resin, an unsaturated polyester resin, a PPO resin, or the like alone, a modified product, a mixture, or the like is used. The substrate of the organic insulating plate is not particularly limited, but an inorganic material such as glass fiber is preferable because of its excellent heat resistance and moisture resistance. In addition, a cloth substrate of an organic fiber having excellent heat resistance and a mixture thereof can also be used.
【０００９】本発明に係るチップキャリアは、プリント
配線板（１）に絶縁板（６）を積載する。この絶縁板
（６）としては、プリント配線板（１）と同種の絶縁樹
脂基板でよく、具体的には、上述した基材に樹脂を含浸
乾燥して得られるプリプレグの樹脂を硬化させた有機系
の絶縁板が挙げられる。In the chip carrier according to the present invention, an insulating plate (6) is mounted on a printed wiring board (1). The insulating plate (6) may be the same kind of insulating resin substrate as the printed wiring board (1), and specifically, an organic material obtained by curing the prepreg resin obtained by impregnating and drying the above-described base material. System insulating plate.
【００１０】上記絶縁板（６）は、透孔（１５）を有
し、かつ、絶縁板（６）は、プリント配線板（１）の表
面に有する回路（１３）に積載して、この透孔（１５）
の下に半導体チップ（３）を搭載する窪み（１４）を形
成している。この窪み（１４）には、上記回路（１３）
の一部が露出している。この窪み（１４）内には、耐湿
性を高めるために封止剤を封入して、例えば、アルミリ
ッドで窪み（１４）内を封じ、半導体装置を構成するの
に有用である。The insulating plate (6) has a through hole (15), and the insulating plate (6) is mounted on a circuit (13) provided on the surface of the printed wiring board (1), and is provided with the through hole. Hole (15)
A recess (14) for mounting the semiconductor chip (3) is formed below the semiconductor device. The depression (14) has the circuit (13)
Is partially exposed. A sealant is sealed in the recess (14) to enhance the moisture resistance, and the recess (14) is sealed with, for example, an aluminum lid, which is useful for forming a semiconductor device.
【００１１】本発明に係るチップキャリアは、図１のご
とく、窪み（１４）上に半導体チップ（３）を搭載して
プリント配線板（１）の回路（１３）の一部を露出させ
ているので、半導体チップ（３）をボンデイングワイヤ
ー（９）により接続するのに有用である。In the chip carrier according to the present invention, as shown in FIG. 1, a semiconductor chip (3) is mounted on a depression (14) to expose a part of a circuit (13) of a printed wiring board (1). Therefore, it is useful for connecting the semiconductor chip (3) with the bonding wire (9).
【００１２】また、図１のごとく上記絶縁板（６）に回
路（１８）を備えている場合でも、この絶縁板（６）の
回路（１８）とプリント配線板（１）の回路（１３）を
対向させることは、絶縁板（６）をプリント配線板
（１）に積載して用いるのに有用である。Even when the circuit (18) is provided on the insulating plate (6) as shown in FIG. 1, the circuit (18) of the insulating plate (6) and the circuit (13) of the printed wiring board (1) are used. It is useful to stack the insulating plate (6) on the printed wiring board (1) for use.
【００１３】本発明に係るチップキャリアの製造方法に
よると、プリント配線板（１）と絶縁板（６）の接合面
には、溶融粘度が２００００〜５００００ｐｏｉｓｅ、
基材に含浸した全樹脂量に対して上記熱圧成形の条件下
での樹脂流出量が１．０〜３．０ｗｔ％（以下、単に％
と記す。）に制限されるプリプレグ（１１）を介在させ
て被圧体とし、熱圧成形したので、露出する回路（１
３）内に樹脂が溶融して流れ出ることがない。また、プ
リント配線板（１）と絶縁板（６）が接合する面の互い
に対向する回路（１３）と回路（１８）に上記の値をと
るプリプレグ（１１）を介在させて被圧体とし、熱圧成
形すると、プリプレグ（１１）から流出する樹脂が回路
（１３）と回路（１８）の間を埋め、間隙ができるのを
防止する。溶融粘度が２００００ｐｏｉｓｅ未満である
と、樹脂が露出する回路（１３）内に溶融して流れ出る
恐れが多くなり、５００００ｐｏｉｓｅを越えると、プ
リプレグ（１１）から流出する樹脂が回路（１３）と回
路（１８）の間を埋め、間隙ができるのを充分防止でき
ないからである。また、基材に含浸した全樹脂量に対し
て上記熱圧成形の条件下での樹脂流出量が１．０ｗｔ％
未満であると、プリプレグ（１１）から流出する樹脂が
回路（１３）と回路（１８）の間を埋め、間隙ができる
のを充分防止できず、３．０ｗｔ％を越えると、樹脂が
露出する回路（１３）内に溶融して流れ出やすくなるか
らである。According to the method of manufacturing a chip carrier according to the present invention, the joining surface of the printed wiring board (1) and the insulating plate (6) has a melt viscosity of 20,000 to 50,000 poise,
The resin outflow amount under the conditions of the hot pressing is 1.0 to 3.0 wt% (hereinafter simply referred to as “%”) based on the total amount of the resin impregnated in the base material.
It is written. ), The prepreg (11) is interposed to form a pressurized body, and the circuit (1)
The resin does not melt and flow out in 3). Further, a prepreg (11) having the above-mentioned value is interposed between a circuit (13) and a circuit (18) facing each other on a surface where the printed wiring board (1) and the insulating plate (6) are joined to form a pressure-receiving body. When hot pressing is performed, the resin flowing out of the prepreg (11) fills the space between the circuit (13) and the circuit (18) to prevent a gap from being formed. When the melt viscosity is less than 20,000 poise, there is a high possibility that the resin melts and flows out into the circuit (13) where the resin is exposed, and when the melt viscosity exceeds 50,000 poise, the resin flowing out of the prepreg (11) is mixed with the circuit (13) and the circuit (18). This is because it is not possible to sufficiently prevent the formation of the gap by filling the gap between the parentheses. The resin outflow amount under the conditions of the hot pressing is 1.0 wt% based on the total resin amount impregnated in the base material.
If it is less than 3, the resin flowing out of the prepreg (11) fills the gap between the circuit (13) and the circuit (18), and it is not possible to sufficiently prevent the formation of a gap. If it exceeds 3.0 wt%, the resin is exposed. This is because it is easy to melt and flow out into the circuit (13).
【００１４】上記樹脂としては、例えばエポキシ樹脂、
ポリイミド等が挙げられる。上記プリプレグとしては、
基材として、例えば、ガラス、アスベスト等の無機繊維
やポエリエステル、ポリアミド、ポリビニルアルコー
ル、アクリル等の有機合成繊維や木綿等の天然繊維から
なる織布、不織布、マット或いは紙などに上記樹脂を含
浸したものが用いられる。As the resin, for example, epoxy resin,
Examples include polyimide. As the above prepreg,
As a base material, for example, the above resin was impregnated with a woven fabric, a nonwoven fabric, a mat, or a paper made of inorganic fibers such as asbestos, inorganic fibers such as asbestos, organic synthetic fibers such as polyamide, polyvinyl alcohol and acrylic, and natural fibers such as cotton. Things are used.
【００１５】以下、本発明の実施例を挙げる。Hereinafter, embodiments of the present invention will be described.
【００１６】[0016]
【実施例】実施例１ プリプレグ（１１）として、厚さ１８０μｍのガラスク
ロスにエポキシ樹脂を含浸し半硬化した、溶融粘度２０
０００ｐｏｉｓｅ、基材に含浸した全樹脂量に対して上
記熱圧成形の条件下での樹脂流出量（以下、単に樹脂流
出量という。）１．２％、樹脂量５２％を用いた。つぎ
に、プリント配線板（１）、絶縁板（６）を用意し、絶
縁板（６）の中心部に四辺形のサイズ４ｃｍ×４ｃｍの
透孔（１５）を作った。また、プリプレグ（１１）の中
心部に上記の四辺形の透孔（１５）と同一サイズの孔を
作った。プリント配線板（１）の上に孔のサイズ４ｃｍ
×４ｃｍのプリプレグ（１１）、透孔（１５）のサイズ
４ｃｍ×４ｃｍの絶縁板（６）を順次積載し、この被圧
体を成形プレートに挟み、温度１７０℃、圧力４０ｋｇ
／ｃｍ2 で６０分熱圧成形し、チップキャリアを得た。EXAMPLE 1 As a prepreg (11), a 180 μm-thick glass cloth was impregnated with epoxy resin and semi-cured.
2,000 poise, 1.2% of the resin outflow amount under the conditions of the hot pressing (hereinafter simply referred to as resin outflow amount) and 52% of the resin amount with respect to the total amount of the resin impregnated in the base material were used. Next, a printed wiring board (1) and an insulating plate (6) were prepared, and a quadrangular through hole (15) having a size of 4 cm × 4 cm was formed in the center of the insulating plate (6). Further, a hole having the same size as the above-mentioned quadrangular through hole (15) was formed in the center of the prepreg (11). Hole size 4cm on printed wiring board (1)
A prepreg (11) having a size of 4 cm and an insulating plate (6) having a size of 4 cm x 4 cm having a through-hole (15) are sequentially stacked, and this pressure-pressed body is sandwiched between forming plates.
/ Cm 2 for 60 minutes to obtain a chip carrier.
【００１７】実施例２ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度２５０００ｐｏｉ
ｓｅ、樹脂流出量１．０％、樹脂量５２％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Example 2 As a prepreg (11), the above glass cloth was impregnated with an epoxy resin and semi-cured, and had a melt viscosity of 25,000 poi.
A chip carrier was obtained in the same manner as in Example 1 except that the resin flow rate was 1.0% and the resin amount was 52%.
【００１８】実施例３ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度３００００ｐｏｉ
ｓｅ、樹脂流出量１．２％、樹脂量５０％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Example 3 As a prepreg (11), the above glass cloth was impregnated with an epoxy resin and semi-cured, and had a melt viscosity of 30,000 poi.
A chip carrier was obtained in the same manner as in Example 1, except that the resin flow rate was 1.2% and the resin amount was 50%.
【００１９】実施例４ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度３００００ｐｏｉ
ｓｅ、樹脂流出量２．８％、樹脂量５６％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Example 4 As the prepreg (11), the above glass cloth was impregnated with an epoxy resin and semi-cured, and had a melt viscosity of 30,000 poi.
A chip carrier was obtained in the same manner as in Example 1 except that the resin flow rate was 2.8% and the resin amount was 56%.
【００２０】実施例５ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度５００００ｐｏｉ
ｓｅ、樹脂流出量２．４％、樹脂量５３％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Example 5 As a prepreg (11), the above glass cloth was impregnated with an epoxy resin and semi-cured, and had a melt viscosity of 50,000 poi.
A chip carrier was obtained in the same manner as in Example 1, except that the resin flow rate was 2.4% and the resin amount was 53%.
【００２１】比較例１ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度２０００ｐｏｉｓ
ｅ、樹脂流出量１．２％、樹脂量５５％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Comparative Example 1 As a prepreg (11), the above glass cloth was impregnated with an epoxy resin and semi-cured, and had a melt viscosity of 2000 pois.
e, A chip carrier was obtained in the same manner as in Example 1, except that the resin flow rate was 1.2% and the resin amount was 55%.
【００２２】比較例２ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度２００００ｐｏｉ
ｓｅ、樹脂流出量３．２％、樹脂量５４％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Comparative Example 2 As a prepreg (11), the above glass cloth was impregnated with an epoxy resin and semi-cured, and had a melt viscosity of 20,000 poi.
A chip carrier was obtained in the same manner as in Example 1, except that the resin flow rate was 3.2% and the resin amount was 54%.
【００２３】比較例３ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度２００００ｐｏｉ
ｓｅ、樹脂流出量０．８％、樹脂量５２％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Comparative Example 3 As a prepreg (11), the above glass cloth was impregnated with an epoxy resin and semi-cured, and had a melt viscosity of 20,000 poi.
A chip carrier was obtained in the same manner as in Example 1 except that the resin flow rate was 0.8% and the resin amount was 52%.
【００２４】比較例４ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度５５０００ｐｏｉ
ｓｅ、樹脂流出量２．２％、樹脂量５３％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Comparative Example 4 As a prepreg (11), the above glass cloth was impregnated with an epoxy resin and semi-cured, and had a melt viscosity of 55000 poi.
A chip carrier was obtained in the same manner as in Example 1, except that the resin flow rate was 2.2% and the resin amount was 53%.
【００２５】このチップキャリアを以下の方法で評価し
た。まず、露出する回路（１３）上へのプリプレグ（１
１）の樹脂の流れは、目視により判定し、少しでも回路
（１３）に樹脂が流れていれば不合格、流れていなけれ
ば合格とした。次に、プリント配線板（１）と絶縁板
（６）が接合する面の互いに対向する回路（１３）と回
路（１８）の回路間の埋まり具合の評価をＰＣＴ試験に
よって行った。これは、チップ搭載した素子を用いて、
１２１℃、２気圧で熱圧処理し、上記の処理を１０００
時間施した後、絶縁抵抗を測定し、抵抗値が１×１０9
Ω以上であれば合格とし、１×１０9 Ω未満であれば不
合格とした。流動性、ＰＣＴ試験の結果を表１および表
２に示し、表中では、合格を○、不合格を×、上記両者
の中間のものを△で示しておいた。This chip carrier was evaluated by the following method. First, the prepreg (1) on the exposed circuit (13)
The flow of the resin in 1) was visually determined. If the resin flowed through the circuit (13) even a little, it was rejected. Next, the PCT test was performed to evaluate the degree of embedding between the opposing circuits (13) and (18) on the surface where the printed wiring board (1) and the insulating plate (6) are joined. This is done by using a chip mounted device,
Heat treatment at 121 ° C. and 2 atm.
After applying for hours, the insulation resistance is measured and the resistance value is 1 × 10 9
If it was Ω or more, it was judged as acceptable, and if it was less than 1 × 10 9 Ω, it was judged as failed. The results of the fluidity and the PCT test are shown in Tables 1 and 2. In the tables, "Pass" indicates "pass", "X" indicates rejection, and "、" indicates an intermediate between the two.
【００２６】[0026]
【表１】 [Table 1]
【００２７】[0027]
【表２】 [Table 2]
【００２８】表１および表２からわかる通り、流動性と
ＰＣＴ試験ともに比較例１〜４の結果と比べて、実施例
１〜５がいずれも良好であり、溶融粘度が２００００〜
５００００ｐｏｉｓｅ、樹脂流出量が１．０〜３．０ｗ
ｔ％のプリプレグ（１１）を用いて回路（１３）と絶縁
板（６）との接合面に介在させて被圧体とすると、露出
する回路（１３）上へ樹脂が流れ出ることなく熱圧成形
できる。また、プリント配線板（１）と絶縁板（６）が
接合する面の互いに対向する回路（１３）と回路（１
８）の回路間の凹凸を埋め、間隙を阻止できることがわ
かる。As can be seen from Tables 1 and 2, both the fluidity and the PCT test of Examples 1 to 5 are better than those of Comparative Examples 1 to 4, and the melt viscosity is 20000 to 2000.
50,000 poise, resin outflow 1.0-3.0w
When a pressurized body is formed by using a prepreg (11) of t% and interposed on a joint surface between the circuit (13) and the insulating plate (6), hot pressing is performed without resin flowing onto the exposed circuit (13). it can. Further, the circuit (13) and the circuit (1) facing each other on the surface where the printed wiring board (1) and the insulating plate (6) are joined.
It can be seen that the unevenness between the circuits of 8) can be filled and the gap can be prevented.
【００２９】[0029]
【発明の効果】本発明のチップキャリアの製造方法によ
ると、熱圧成形の際、露出する回路上へ樹脂が流れ出る
のを阻止できる。According to the method for manufacturing a chip carrier of the present invention, it is possible to prevent the resin from flowing onto the exposed circuit during hot pressing.
【図１】本発明の一実施例に係るチップキャリアを用い
た半導体装置の断面図である。FIG. 1 is a cross-sectional view of a semiconductor device using a chip carrier according to one embodiment of the present invention.
１ プリント配線板 ３ 半導体チップ ６ 絶縁板 １１ プリプレグ １３ 回路 １４ 窪み １５ 透孔 Reference Signs List 1 printed wiring board 3 semiconductor chip 6 insulating plate 11 prepreg 13 circuit 14 dent 15 through hole
Claims (2)
透孔（１５）を有する絶縁板（６）を積載して半導体チ
ップ（３）を搭載する窪み（１４）を形成し、この窪み
（１４）内に上記回路（１３）の一部が露出したチップ
キャリアを製造するにあたり、上記回路（１３）と絶縁
板（６）との接合面にプリプレグ（１１）が介在した被
圧体を熱圧成形するチップキャリアの製造方法におい
て、溶融粘度が２００００〜５００００ｐｏｉｓｅで、
基材に含浸した全樹脂量に対して上記熱圧成形の条件下
での樹脂流出量が１．０〜３．０ｗｔ％のプリプレグ
（１１）を用いることを特徴とするチップキャリアの製
造方法。An insulating plate (6) having a through hole (15) is mounted on a circuit (13) of a printed wiring board (1) to form a recess (14) for mounting a semiconductor chip (3). In manufacturing a chip carrier in which a part of the circuit (13) is exposed in the recess (14), a pressure-bearing body in which a prepreg (11) is interposed on a bonding surface between the circuit (13) and the insulating plate (6). In the method for producing a chip carrier, the melt viscosity is 20,000 to 50,000 poise,
A method for manufacturing a chip carrier, comprising using a prepreg (11) having a resin outflow amount of 1.0 to 3.0 wt% under the conditions of the hot pressing with respect to the total amount of resin impregnated in a substrate.
（１）の回路（１３）に対向する回路（１８）を備えた
ことを特徴とする請求項１記載のチップキャリアの製造
方法。2. The method according to claim 1, wherein the insulating plate comprises a circuit opposed to the circuit of the printed wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5185359A JP2734942B2 (en) | 1993-07-27 | 1993-07-27 | Manufacturing method of chip carrier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5185359A JP2734942B2 (en) | 1993-07-27 | 1993-07-27 | Manufacturing method of chip carrier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0745742A JPH0745742A (en) | 1995-02-14 |
| JP2734942B2 true JP2734942B2 (en) | 1998-04-02 |
Family
ID=16169418
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5185359A Expired - Lifetime JP2734942B2 (en) | 1993-07-27 | 1993-07-27 | Manufacturing method of chip carrier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2734942B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100651796B1 (en) * | 2000-10-11 | 2006-11-30 | 삼성테크윈 주식회사 | Chip module for IC card |
| JP2003347695A (en) * | 2002-05-28 | 2003-12-05 | Matsushita Electric Works Ltd | Method of manufacturing printed wiring board |
-
1993
- 1993-07-27 JP JP5185359A patent/JP2734942B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0745742A (en) | 1995-02-14 |
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