JPH0745742A - Manufacture of chip carrier - Google Patents
Manufacture of chip carrierInfo
- Publication number
- JPH0745742A JPH0745742A JP5185359A JP18535993A JPH0745742A JP H0745742 A JPH0745742 A JP H0745742A JP 5185359 A JP5185359 A JP 5185359A JP 18535993 A JP18535993 A JP 18535993A JP H0745742 A JPH0745742 A JP H0745742A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- circuit
- chip carrier
- prepreg
- insulating plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
Landscapes
- Reinforced Plastic Materials (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、チップキャリアの製造
方法に関し、具体的には、電子機器、電気機器に利用さ
れる、半導体チップを搭載するチップキャリアの製造方
法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a chip carrier, and more particularly to a method for manufacturing a chip carrier for mounting a semiconductor chip, which is used in electronic equipment and electric equipment.
【０００２】[0002]
【従来の技術】従来のチップキャリアの製造方法として
は、プリント配線板の回路に透孔を有する絶縁板を積載
して半導体チップを搭載する窪みを形成し、この窪み内
に上記回路の一部が露出したチップキャリアを製造する
にあたり、上記回路と絶縁板との接合面にプリプレグが
介在した被圧体を熱圧成形する方法が知られている。2. Description of the Related Art As a conventional chip carrier manufacturing method, an insulating plate having a through hole is mounted on a circuit of a printed wiring board to form a recess for mounting a semiconductor chip, and a part of the circuit is formed in the recess. In manufacturing a chip carrier with exposed parts, there is known a method of thermocompressing a body to be pressed having a prepreg on the joint surface between the circuit and the insulating plate.
【０００３】しかし、このようなチップキャリアの製造
方法は、熱圧成形の際に、回路の露出した部分にプリプ
レグから樹脂が流れ出て、この回路上に絶縁膜を形成す
る問題があった。However, such a chip carrier manufacturing method has a problem in that during thermocompression molding, the resin flows out from the prepreg to the exposed portion of the circuit to form an insulating film on the circuit.
【０００４】[0004]
【発明が解決しようとする課題】本発明は上述の問題を
解消するためになされたもので、その目的とするところ
は、熱圧成形の際、露出する回路上へ樹脂が流れ出るの
を阻止できるチップキャリアの製造方法を提供すること
にある。SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object thereof is to prevent resin from flowing out onto an exposed circuit during thermocompression molding. It is to provide a manufacturing method of a chip carrier.
【０００５】[0005]
【課題を解決するための手段】本発明に係るチップキャ
リアの製造方法は、プリント配線板（１）の回路（１
３）に透孔（１５）を有する絶縁板（６）を積載して半
導体チップ（３）を搭載する窪み（１４）を形成し、こ
の窪み（１４）内に上記回路（１３）の一部が露出した
チップキャリアを製造するにあたり、上記回路（１３）
と絶縁板（６）との接合面にプリプレグ（１１）が介在
した被圧体を熱圧成形するチップキャリアの製造方法に
おいて、溶融粘度が２００００〜５００００ｐｏｉｓｅ
で、基材に含浸した全樹脂量に対して上記熱圧成形の条
件下での樹脂流出量が１．０〜３．０ｗｔ％のプリプレ
グ（１１）を用いることを特徴とする。A method of manufacturing a chip carrier according to the present invention comprises a circuit (1) of a printed wiring board (1).
An insulating plate (6) having a through hole (15) is stacked in (3) to form a recess (14) for mounting a semiconductor chip (3), and a part of the circuit (13) is formed in the recess (14). The above circuit (13) is used to manufacture the chip carrier with exposed
In a method of manufacturing a chip carrier in which a pressure-sensitive body having a prepreg (11) interposed on a joint surface between a metal and an insulating plate (6) is thermocompression-molded, a melt viscosity is 20,000 to 50,000 poise.
Then, the prepreg (11) having a resin outflow amount of 1.0 to 3.0 wt% under the above thermocompression molding conditions is used with respect to the total amount of resin impregnated in the substrate.
【０００６】[0006]
【作用】本発明のチップキャリアの製造方法によると、
溶融粘度が２００００〜５００００ｐｏｉｓｅで、基材
に含浸した全樹脂量に対して上記熱圧成形の条件下での
樹脂流出量が１．０〜３．０ｗｔ％のプリプレグ（１
１）を用いると、熱圧成形の際に、プリント配線板
（１）と絶縁板（６）の接合面の回路（１３）をプリプ
レグ（１１）から流出する樹脂が埋め、間隙ができるの
を防止し、露出する回路（１３）内に樹脂が溶融して流
れ出ることがない。According to the chip carrier manufacturing method of the present invention,
A prepreg (1) having a melt viscosity of 20000 to 50,000 poise and a resin outflow amount of 1.0 to 3.0 wt% under the above thermocompression molding conditions with respect to the total amount of resin impregnated in the substrate.
When 1) is used, the resin flowing out from the prepreg (11) fills the circuit (13) on the joint surface between the printed wiring board (1) and the insulating plate (6) during thermocompression molding, so that a gap is formed. The resin does not melt and flow into the exposed circuit (13).
【０００７】以下、本発明を詳細に説明する。図１は、
本発明の一実施例に係るチップキャリアを用いた半導体
装置の断面図である。The present invention will be described in detail below. Figure 1
FIG. 6 is a cross-sectional view of a semiconductor device using a chip carrier according to an embodiment of the present invention.
【０００８】本発明のチップキャリアを構成するプリン
ト配線板（１）としては、基材に樹脂を含浸乾燥して得
られるプリプレグの樹脂を硬化させた有機系の絶縁板、
又はアルミナ等のセラミック系の絶縁板が用いられる。
この有機系の絶縁板の樹脂としてはエポキシ樹脂、ポリ
イミド樹脂、フッ素樹脂、フェノール樹脂、不飽和ポリ
エステル樹脂、ＰＰＯ樹脂等の単独、変成物、混合物等
が用いられる。有機系の絶縁板の基材としては、特に限
定するものではないが、ガラス繊維などの無機材料の方
が耐熱性、耐湿性などに優れて好ましい。また、耐熱性
に優れる有機繊維の布基材及びこれらの混合物を用いる
こともできる。As the printed wiring board (1) constituting the chip carrier of the present invention, an organic insulating board obtained by hardening a resin of a prepreg obtained by impregnating a base material with a resin and drying,
Alternatively, a ceramic insulating plate such as alumina is used.
As the resin for the organic insulating plate, epoxy resin, polyimide resin, fluorine resin, phenol resin, unsaturated polyester resin, PPO resin, etc. may be used alone, modified, or mixed. The base material of the organic insulating plate is not particularly limited, but an inorganic material such as glass fiber is preferable because it is excellent in heat resistance and moisture resistance. Further, a cloth base material of organic fiber having excellent heat resistance and a mixture thereof can also be used.
【０００９】本発明に係るチップキャリアは、プリント
配線板（１）に絶縁板（６）を積載する。この絶縁板
（６）としては、プリント配線板（１）と同種の絶縁樹
脂基板でよく、具体的には、上述した基材に樹脂を含浸
乾燥して得られるプリプレグの樹脂を硬化させた有機系
の絶縁板が挙げられる。In the chip carrier according to the present invention, an insulating plate (6) is mounted on a printed wiring board (1). The insulating plate (6) may be an insulating resin substrate of the same type as the printed wiring board (1), and specifically, an organic resin obtained by curing the resin of the prepreg obtained by impregnating and drying the above-mentioned base material with the resin. An insulating plate of a system is mentioned.
【００１０】上記絶縁板（６）は、透孔（１５）を有
し、かつ、絶縁板（６）は、プリント配線板（１）の表
面に有する回路（１３）に積載して、この透孔（１５）
の下に半導体チップ（３）を搭載する窪み（１４）を形
成している。この窪み（１４）には、上記回路（１３）
の一部が露出している。この窪み（１４）内には、耐湿
性を高めるために封止剤を封入して、例えば、アルミリ
ッドで窪み（１４）内を封じ、半導体装置を構成するの
に有用である。The insulating plate (6) has a through hole (15), and the insulating plate (6) is mounted on a circuit (13) provided on the surface of the printed wiring board (1), and the transparent plate (6) is formed. Hole (15)
A recess (14) for mounting the semiconductor chip (3) is formed under the. The circuit (13) is provided in the recess (14).
Part of is exposed. A sealing agent is enclosed in the recesses (14) in order to improve the moisture resistance, and the recesses (14) are sealed with, for example, an aluminum lid, which is useful for forming a semiconductor device.
【００１１】本発明に係るチップキャリアは、図１のご
とく、窪み（１４）上に半導体チップ（３）を搭載して
プリント配線板（１）の回路（１３）の一部を露出させ
ているので、半導体チップ（３）をボンデイングワイヤ
ー（９）により接続するのに有用である。In the chip carrier according to the present invention, as shown in FIG. 1, the semiconductor chip (3) is mounted on the recess (14) to expose a part of the circuit (13) of the printed wiring board (1). Therefore, it is useful for connecting the semiconductor chip (3) with the bonding wire (9).
【００１２】また、図１のごとく上記絶縁板（６）に回
路（１８）を備えている場合でも、この絶縁板（６）の
回路（１８）とプリント配線板（１）の回路（１３）を
対向させることは、絶縁板（６）をプリント配線板
（１）に積載して用いるのに有用である。Further, even when the insulating plate (6) is provided with the circuit (18) as shown in FIG. 1, the circuit (18) of the insulating plate (6) and the circuit (13) of the printed wiring board (1). It is useful to place the insulating plate (6) on the printed wiring board (1) for use.
【００１３】本発明に係るチップキャリアの製造方法に
よると、プリント配線板（１）と絶縁板（６）の接合面
には、溶融粘度が２００００〜５００００ｐｏｉｓｅ、
基材に含浸した全樹脂量に対して上記熱圧成形の条件下
での樹脂流出量が１．０〜３．０ｗｔ％（以下、単に％
と記す。）に制限されるプリプレグ（１１）を介在させ
て被圧体とし、熱圧成形したので、露出する回路（１
３）内に樹脂が溶融して流れ出ることがない。また、プ
リント配線板（１）と絶縁板（６）が接合する面の互い
に対向する回路（１３）と回路（１８）に上記の値をと
るプリプレグ（１１）を介在させて被圧体とし、熱圧成
形すると、プリプレグ（１１）から流出する樹脂が回路
（１３）と回路（１８）の間を埋め、間隙ができるのを
防止する。溶融粘度が２００００ｐｏｉｓｅ未満である
と、樹脂が露出する回路（１３）内に溶融して流れ出る
恐れが多くなり、５００００ｐｏｉｓｅを越えると、プ
リプレグ（１１）から流出する樹脂が回路（１３）と回
路（１８）の間を埋め、間隙ができるのを充分防止でき
ないからである。また、基材に含浸した全樹脂量に対し
て上記熱圧成形の条件下での樹脂流出量が１．０ｗｔ％
未満であると、プリプレグ（１１）から流出する樹脂が
回路（１３）と回路（１８）の間を埋め、間隙ができる
のを充分防止できず、３．０ｗｔ％を越えると、樹脂が
露出する回路（１３）内に溶融して流れ出やすくなるか
らである。According to the chip carrier manufacturing method of the present invention, the melt viscosity of the joint surface between the printed wiring board (1) and the insulating board (6) is 20,000 to 50,000 poise,
The resin outflow amount under the above-mentioned thermocompression molding conditions is 1.0 to 3.0 wt% (hereinafter simply referred to as% to the total amount of resin impregnated in the base material).
Is written. ), A prepreg (11) limited to the above is used as a body to be pressed and thermocompression-molded, so that the exposed circuit (1
3) The resin does not melt inside and flow out. In addition, the circuit (13) and the circuit (18) facing each other on the surface where the printed wiring board (1) and the insulating plate (6) are joined are made into a body to be pressured by interposing the prepreg (11) having the above value. The thermocompression molding prevents the resin flowing out from the prepreg (11) from filling the space between the circuit (13) and the circuit (18) to form a gap. If the melt viscosity is less than 20000 poise, there is a high possibility that the resin melts and flows into the exposed circuit (13), and if it exceeds 50000 poise, the resin flowing out from the prepreg (11) is discharged from the circuit (13) and the circuit (18). This is because it is not possible to sufficiently prevent the formation of gaps by filling in the gaps. Further, the resin outflow amount under the above thermocompression molding conditions is 1.0 wt% with respect to the total amount of resin impregnated in the base material.
If it is less than the above range, the resin flowing out from the prepreg (11) fills the gap between the circuit (13) and the circuit (18) and cannot sufficiently prevent a gap from being formed. If it exceeds 3.0 wt%, the resin is exposed. This is because it melts into the circuit (13) and tends to flow out.
【００１４】上記樹脂としては、例えばエポキシ樹脂、
ポリイミド等が挙げられる。上記プリプレグとしては、
基材として、例えば、ガラス、アスベスト等の無機繊維
やポエリエステル、ポリアミド、ポリビニルアルコー
ル、アクリル等の有機合成繊維や木綿等の天然繊維から
なる織布、不織布、マット或いは紙などに上記樹脂を含
浸したものが用いられる。Examples of the above resin include epoxy resin,
Examples include polyimide. As the above prepreg,
As the base material, for example, woven cloth, non-woven cloth, mat, paper or the like made of inorganic fibers such as glass and asbestos, organic synthetic fibers such as polyester, polyamide, polyvinyl alcohol and acrylic, and natural fibers such as cotton are impregnated with the above resin. Things are used.
【００１５】以下、本発明の実施例を挙げる。Examples of the present invention will be given below.
【００１６】[0016]
【実施例】実施例１ プリプレグ（１１）として、厚さ１８０μｍのガラスク
ロスにエポキシ樹脂を含浸し半硬化した、溶融粘度２０
０００ｐｏｉｓｅ、基材に含浸した全樹脂量に対して上
記熱圧成形の条件下での樹脂流出量（以下、単に樹脂流
出量という。）１．２％、樹脂量５２％を用いた。つぎ
に、プリント配線板（１）、絶縁板（６）を用意し、絶
縁板（６）の中心部に四辺形のサイズ４ｃｍ×４ｃｍの
透孔（１５）を作った。また、プリプレグ（１１）の中
心部に上記の四辺形の透孔（１５）と同一サイズの孔を
作った。プリント配線板（１）の上に孔のサイズ４ｃｍ
×４ｃｍのプリプレグ（１１）、透孔（１５）のサイズ
４ｃｍ×４ｃｍの絶縁板（６）を順次積載し、この被圧
体を成形プレートに挟み、温度１７０℃、圧力４０ｋｇ
／ｃｍ2 で６０分熱圧成形し、チップキャリアを得た。Example 1 As a prepreg (11), a glass cloth having a thickness of 180 μm was impregnated with an epoxy resin and semi-cured, and the melt viscosity was 20.
000 poise, 1.2% of resin outflow amount (hereinafter, simply referred to as resin outflow amount) and 52% of resin amount under the above thermocompression molding conditions were used with respect to the total amount of resin impregnated in the substrate. Next, the printed wiring board (1) and the insulating plate (6) were prepared, and a quadrangular through hole (15) having a size of 4 cm × 4 cm was formed in the center of the insulating plate (6). In addition, a hole having the same size as the quadrangular through hole (15) was formed in the center of the prepreg (11). Hole size 4 cm on the printed wiring board (1)
A prepreg (11) of × 4 cm and an insulating plate (6) of a size of 4 cm × 4 cm with a through hole (15) are sequentially stacked, and this pressure member is sandwiched between molding plates, and the temperature is 170 ° C. and the pressure is 40 kg.
Thermosetting was performed for 60 minutes at / cm 2 to obtain a chip carrier.
【００１７】実施例２ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度２５０００ｐｏｉ
ｓｅ、樹脂流出量１．０％、樹脂量５２％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Example 2 As a prepreg (11), the above glass cloth was impregnated with an epoxy resin and semi-cured, and the melt viscosity was 25,000 poi.
A chip carrier was obtained in the same manner as in Example 1, except that the amount of se, the resin outflow amount of 1.0%, and the resin amount of 52% were used.
【００１８】実施例３ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度３００００ｐｏｉ
ｓｅ、樹脂流出量１．２％、樹脂量５０％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Example 3 As the prepreg (11), the glass cloth was impregnated with an epoxy resin and semi-cured, and the melt viscosity was 30,000 poi.
A chip carrier was obtained in the same manner as in Example 1 except that the amount of se, the resin outflow amount of 1.2%, and the resin amount of 50% were used.
【００１９】実施例４ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度３００００ｐｏｉ
ｓｅ、樹脂流出量２．８％、樹脂量５６％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Example 4 As a prepreg (11), the glass cloth was impregnated with an epoxy resin and semi-cured, and the melt viscosity was 30,000 poi.
A chip carrier was obtained in the same manner as in Example 1, except that the amount of se, the resin outflow amount of 2.8%, and the resin amount of 56% were used.
【００２０】実施例５ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度５００００ｐｏｉ
ｓｅ、樹脂流出量２．４％、樹脂量５３％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Example 5 As a prepreg (11), the glass cloth was impregnated with an epoxy resin and semi-cured, and the melt viscosity was 50,000 poi.
A chip carrier was obtained in the same manner as in Example 1 except that the amount of se, the resin outflow amount 2.4%, and the resin amount 53% were used.
【００２１】比較例１ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度２０００ｐｏｉｓ
ｅ、樹脂流出量１．２％、樹脂量５５％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Comparative Example 1 As a prepreg (11), the glass cloth was impregnated with an epoxy resin and semi-cured, and the melt viscosity was 2000 pois.
A chip carrier was obtained in the same manner as in Example 1 except that e, resin outflow amount of 1.2% and resin amount of 55% were used.
【００２２】比較例２ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度２００００ｐｏｉ
ｓｅ、樹脂流出量３．２％、樹脂量５４％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Comparative Example 2 As the prepreg (11), the glass cloth was impregnated with an epoxy resin and semi-cured, and the melt viscosity was 20000 poi.
A chip carrier was obtained in the same manner as in Example 1 except that the amount of se, the resin outflow amount of 3.2%, and the resin amount of 54% were used.
【００２３】比較例３ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度２００００ｐｏｉ
ｓｅ、樹脂流出量０．８％、樹脂量５２％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Comparative Example 3 As a prepreg (11), the glass cloth was impregnated with an epoxy resin and semi-cured, and the melt viscosity was 20000 poi.
A chip carrier was obtained in the same manner as in Example 1 except that the amount of se, the resin outflow amount of 0.8%, and the resin amount of 52% were used.
【００２４】比較例４ プリプレグ（１１）として、上記ガラスクロスにエポキ
シ樹脂を含浸し半硬化した、溶融粘度５５０００ｐｏｉ
ｓｅ、樹脂流出量２．２％、樹脂量５３％を用いた以外
は、実施例１と同様にしてチップキャリアを得た。Comparative Example 4 As a prepreg (11), the above glass cloth was impregnated with an epoxy resin and semi-cured, and the melt viscosity was 55,000 poi.
A chip carrier was obtained in the same manner as in Example 1 except that the amount of se, the resin outflow amount of 2.2%, and the resin amount of 53% were used.
【００２５】このチップキャリアを以下の方法で評価し
た。まず、露出する回路（１３）上へのプリプレグ（１
１）の樹脂の流れは、目視により判定し、少しでも回路
（１３）に樹脂が流れていれば不合格、流れていなけれ
ば合格とした。次に、プリント配線板（１）と絶縁板
（６）が接合する面の互いに対向する回路（１３）と回
路（１８）の回路間の埋まり具合の評価をＰＣＴ試験に
よって行った。これは、チップ搭載した素子を用いて、
１２１℃、２気圧で熱圧処理し、上記の処理を１０００
時間施した後、絶縁抵抗を測定し、抵抗値が１×１０9
Ω以上であれば合格とし、１×１０9 Ω未満であれば不
合格とした。流動性、ＰＣＴ試験の結果を表１および表
２に示し、表中では、合格を○、不合格を×、上記両者
の中間のものを△で示しておいた。This chip carrier was evaluated by the following method. First, the prepreg (1) on the exposed circuit (13)
The resin flow of 1) was visually determined, and was judged to be unacceptable if the resin flowed in the circuit (13) at all, or passed if not. Next, the degree of embedding between the circuits of the circuit (13) and the circuit (18) facing each other on the surface where the printed wiring board (1) and the insulating plate (6) are joined was evaluated by the PCT test. This uses the element mounted on the chip,
Heat treatment is performed at 121 ° C. and 2 atm, and the above treatment is performed at 1000
After applying for a time, measure the insulation resistance, and the resistance value is 1 × 10 9
If it was Ω or more, it was judged to be acceptable, and if it was less than 1 × 10 9 Ω, it was judged to be unacceptable. The fluidity and the results of the PCT test are shown in Tables 1 and 2. In the table, the pass is indicated by ◯, the fail is indicated by x, and the intermediate between the above is indicated by Δ.
【００２６】[0026]
【表１】 [Table 1]
【００２７】[0027]
【表２】 [Table 2]
【００２８】表１および表２からわかる通り、流動性と
ＰＣＴ試験ともに比較例１〜４の結果と比べて、実施例
１〜５がいずれも良好であり、溶融粘度が２００００〜
５００００ｐｏｉｓｅ、樹脂流出量が１．０〜３．０ｗ
ｔ％のプリプレグ（１１）を用いて回路（１３）と絶縁
板（６）との接合面に介在させて被圧体とすると、露出
する回路（１３）上へ樹脂が流れ出ることなく熱圧成形
できる。また、プリント配線板（１）と絶縁板（６）が
接合する面の互いに対向する回路（１３）と回路（１
８）の回路間の凹凸を埋め、間隙を阻止できることがわ
かる。As can be seen from Tables 1 and 2, both the fluidity and the PCT test are better in Examples 1 to 5 than the results of Comparative Examples 1 to 4, and the melt viscosity is 20000 to 2000.
50,000 poise, resin outflow 1.0-3.0w
When a t% prepreg (11) is used to intervene in the joint surface between the circuit (13) and the insulating plate (6) to form a body to be pressed, thermocompression molding is performed without the resin flowing out onto the exposed circuit (13). it can. In addition, the circuit (13) and the circuit (1) facing each other on the surface where the printed wiring board (1) and the insulating board (6) are joined to each other.
It can be seen that the unevenness between the circuits in 8) can be filled up and the gap can be prevented.
【００２９】[0029]
【発明の効果】本発明のチップキャリアの製造方法によ
ると、熱圧成形の際、露出する回路上へ樹脂が流れ出る
のを阻止できる。According to the method of manufacturing the chip carrier of the present invention, it is possible to prevent the resin from flowing out onto the exposed circuit during thermocompression molding.
【図１】本発明の一実施例に係るチップキャリアを用い
た半導体装置の断面図である。FIG. 1 is a sectional view of a semiconductor device using a chip carrier according to an embodiment of the present invention.
１ プリント配線板 ３ 半導体チップ ６ 絶縁板 １１ プリプレグ １３ 回路 １４ 窪み １５ 透孔 1 Printed Wiring Board 3 Semiconductor Chip 6 Insulation Board 11 Prepreg 13 Circuit 14 Recess 15 Through Hole
Claims (2)
透孔（１５）を有する絶縁板（６）を積載して半導体チ
ップ（３）を搭載する窪み（１４）を形成し、この窪み
（１４）内に上記回路（１３）の一部が露出したチップ
キャリアを製造するにあたり、上記回路（１３）と絶縁
板（６）との接合面にプリプレグ（１１）が介在した被
圧体を熱圧成形するチップキャリアの製造方法におい
て、溶融粘度が２００００〜５００００ｐｏｉｓｅで、
基材に含浸した全樹脂量に対して上記熱圧成形の条件下
での樹脂流出量が１．０〜３．０ｗｔ％のプリプレグ
（１１）を用いることを特徴とするチップキャリアの製
造方法。1. A circuit (13) of a printed wiring board (1) is loaded with an insulating plate (6) having a through hole (15) to form a recess (14) for mounting a semiconductor chip (3). When manufacturing a chip carrier in which a part of the circuit (13) is exposed in the recess (14), a pressure-sensitive body in which a prepreg (11) is interposed at a joint surface between the circuit (13) and the insulating plate (6). In a method for manufacturing a chip carrier in which hot pressing is performed, a melt viscosity of 20,000 to 50,000 poise
A method for producing a chip carrier, characterized in that a prepreg (11) having a resin outflow amount of 1.0 to 3.0 wt% under the above thermocompression molding conditions is used with respect to the total amount of resin impregnated in the substrate.
（１）の回路（１３）に対向する回路（１８）を備えた
ことを特徴とする請求項１記載のチップキャリアの製造
方法。2. The method for manufacturing a chip carrier according to claim 1, wherein the insulating plate (6) has a circuit (18) facing the circuit (13) of the printed wiring board (1).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5185359A JP2734942B2 (en) | 1993-07-27 | 1993-07-27 | Manufacturing method of chip carrier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5185359A JP2734942B2 (en) | 1993-07-27 | 1993-07-27 | Manufacturing method of chip carrier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0745742A true JPH0745742A (en) | 1995-02-14 |
| JP2734942B2 JP2734942B2 (en) | 1998-04-02 |
Family
ID=16169418
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5185359A Expired - Lifetime JP2734942B2 (en) | 1993-07-27 | 1993-07-27 | Manufacturing method of chip carrier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2734942B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003347695A (en) * | 2002-05-28 | 2003-12-05 | Matsushita Electric Works Ltd | Method of manufacturing printed wiring board |
| KR100651796B1 (en) * | 2000-10-11 | 2006-11-30 | 삼성테크윈 주식회사 | Chip module for IC card |
-
1993
- 1993-07-27 JP JP5185359A patent/JP2734942B2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100651796B1 (en) * | 2000-10-11 | 2006-11-30 | 삼성테크윈 주식회사 | Chip module for IC card |
| JP2003347695A (en) * | 2002-05-28 | 2003-12-05 | Matsushita Electric Works Ltd | Method of manufacturing printed wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2734942B2 (en) | 1998-04-02 |
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