JP2001291805A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP2001291805A
JP2001291805A JP2000106576A JP2000106576A JP2001291805A JP 2001291805 A JP2001291805 A JP 2001291805A JP 2000106576 A JP2000106576 A JP 2000106576A JP 2000106576 A JP2000106576 A JP 2000106576A JP 2001291805 A JP2001291805 A JP 2001291805A
Authority
JP
Japan
Prior art keywords
rubber
resin composition
semiconductor element
semiconductor device
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2000106576A
Other languages
Japanese (ja)
Inventor
Taiichi Kishimoto
泰一 岸本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Chemical Corp
Original Assignee
Toshiba Chemical Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Chemical Corp filed Critical Toshiba Chemical Corp
Priority to JP2000106576A priority Critical patent/JP2001291805A/en
Publication of JP2001291805A publication Critical patent/JP2001291805A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01087Francium [Fr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]

Abstract

PROBLEM TO BE SOLVED: To provide a flip-chip packaging semiconductor device, wherein the bonding reliability is not degraded even when a semiconductor element is made larger. SOLUTION: A semiconductor element 20 is mounted on a substrate 10 with its face down, and a gap between the substrate 10 and the semiconductor element 20 is filled with a rubber/resin composite. In this semiconductor device, the central portion of the gap between the substrate 10 and the semiconductor element is mainly filled with a first rubber/resin composite, and the periphery is mainly filled with a second rubber/resin composite having a modulus of flexural elasticity lower than that of the first rubber/resin composite.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、各種電子機器に使
用される半導体装置に係り、特に、基板上に半導体素子
がフェイスダウンに実装される半導体装置に関する。
The present invention relates to a semiconductor device used for various electronic devices, and more particularly, to a semiconductor device in which a semiconductor element is mounted face down on a substrate.

【0002】[0002]

【従来の技術】近年の電子機器製造分野の技術の向上に
ともない、半導体素子の大型化が進む一方、電子機器の
小型軽量化の要求に応えるため、半導体素子をフェース
ダウンに配線基板に搭載接合するフリップチップ実装が
多く用いられつつある。
2. Description of the Related Art In recent years, as the technology of the field of electronic equipment manufacturing has improved, the size of semiconductor elements has been increasing. Flip-chip mounting is increasingly used.

【0003】すなわち、このフリップチップ実装は、代
表的には、半導体素子の電極にバンプと称する突起を設
け、これをフェースダウンに配線基板と対向させて、相
互の電極を接合するもので、ワイヤボンディング実装な
どに比べ高密度実装が可能であるという特長を有してい
る。なお、フリップチップ実装には、バンプを配線基板
側に設けたり、あるいは、バンプを設けず導電性粒子を
介在させて接合するなど、様々な方式が知られている。
That is, in the flip chip mounting, typically, a projection called a bump is provided on an electrode of a semiconductor element, and the bump is faced down to face a wiring board to join the mutual electrodes. It has the feature that high-density mounting is possible as compared with bonding mounting and the like. Various methods are known for flip-chip mounting, such as providing bumps on the wiring board side, or bonding via conductive particles without providing bumps.

【0004】ところで、一般にフリップチップ実装で
は、半導体素子回路面を外的環境から保護するととも
に、半導体素子と配線基板とを機械的に接着するため、
あるいは、半導体素子と配線基板の熱膨張率の差に起因
する熱応力の電極接合部分への集中を緩和するなどの目
的で、半導体素子と配線基板の間隙にエポキシ樹脂や異
方性導電材などの樹脂組成物を充填している。
In general, in flip-chip mounting, a semiconductor element circuit surface is protected from an external environment, and the semiconductor element and a wiring board are mechanically bonded to each other.
Alternatively, an epoxy resin or an anisotropic conductive material may be placed in the gap between the semiconductor element and the wiring board for the purpose of, for example, reducing the concentration of thermal stress caused by the difference in the coefficient of thermal expansion between the semiconductor element and the wiring board at the electrode joint. Is filled.

【0005】しかしながら、半導体素子のサイズが大き
くなると、上記のように単に樹脂を充填するだけでは、
半導体素子と配線基板の熱膨張率の差に起因する熱応力
に十分対応しきれず、半導体素子と樹脂間あるいは配線
基板と樹脂間で剥離が生じ、場合によっては、導通が損
なわれおそれがあった。
[0005] However, as the size of the semiconductor element increases, simply filling the resin as described above requires
The semiconductor element and the wiring board cannot sufficiently cope with the thermal stress caused by the difference in the coefficient of thermal expansion, and peeling occurs between the semiconductor element and the resin or between the wiring board and the resin, and in some cases, conduction may be impaired. .

【0006】[0006]

【発明が解決しようとする課題】上述したように、従来
のフリップチップ実装による半導体装置では、半導体素
子が大型化すると、半導体素子と配線基板との接合の信
頼性が不十分になるという問題があった。
As described above, in the conventional flip-chip-mounted semiconductor device, there is a problem that when the size of the semiconductor element is increased, the reliability of bonding between the semiconductor element and the wiring board becomes insufficient. there were.

【0007】本発明はこのような従来の技術的課題を解
決するためになされたもので、フリップチップ実装され
た半導体装置などにおいて、半導体素子が大型化して
も、接合信頼性が低下することのない半導体装置を提供
することを目的とする。
SUMMARY OF THE INVENTION The present invention has been made to solve such a conventional technical problem. For example, in a flip-chip mounted semiconductor device, even if a semiconductor element is enlarged, the bonding reliability is reduced. It is an object to provide a semiconductor device without any.

【0008】[0008]

【課題を解決するための手段】本発明者は、上記の目的
を達成するため鋭意研究を重ねた結果、半導体素子と基
板との間隙に充填する材料として、後述するような弾性
率の異なる2種類のゴム・樹脂組成物を用いることによ
り、上記目的を達成できることを見出し本発明を完成し
たものである。
The present inventor has conducted intensive studies to achieve the above object, and as a result, as a material to be filled in the gap between the semiconductor element and the substrate, a material having a different elastic modulus as described later is used. It has been found that the above objects can be achieved by using various types of rubber / resin compositions, and the present invention has been completed.

【0009】すなわち、上記課題を解決するため、本願
の請求項1記載の発明は、基板上に半導体素子がフェイ
スダウンに実装され、かつ、前記基板と半導体素子との
間隙がゴム・樹脂組成物で充填されてなる半導体装置で
あって、前記基板と半導体素子との間隙の中央部が主と
して第1にゴム・樹脂組成物で充填され、周縁部が主と
して前記第1のゴム・樹脂組成物より低曲げ弾性率の第
2のゴム・樹脂組成物で充填されていることを特徴とす
る。
That is, in order to solve the above-mentioned problems, the invention according to claim 1 of the present application is directed to a semiconductor device in which a semiconductor element is mounted face-down on a substrate, and a gap between the substrate and the semiconductor element is formed of a rubber-resin composition. A central portion of a gap between the substrate and the semiconductor element is primarily filled with a rubber / resin composition, and a peripheral portion is mainly filled with the first rubber / resin composition. It is characterized by being filled with a second rubber / resin composition having a low flexural modulus.

【0010】上記課題を解決するため、本願の請求項2
記載の発明は、請求項1記載の半導体装置において、前
記第2のゴム・樹脂組成物の曲げ弾性率が、前記第1の
ゴム・樹脂組成物の弾性率の0.9倍以下であることを特
徴とする。
[0010] In order to solve the above-mentioned problems, claim 2 of the present application.
According to the invention described in the first aspect, in the semiconductor device according to the first aspect, the flexural modulus of the second rubber / resin composition is 0.9 times or less of the modulus of elasticity of the first rubber / resin composition. And

【0011】上記課題を解決するため、本願の請求項3
記載の発明は、請求項1または2記載の半導体装置にお
いて、前記第1のゴム・樹脂組成物の曲げ弾性率が6GPa
〜15GPaであり、前記第2のゴム・樹脂組成物の曲げ弾性
率が1GPa〜10GPaであることを特徴とする。
[0011] In order to solve the above-mentioned problems, a third aspect of the present invention is described.
The invention according to claim 1, wherein in the semiconductor device according to claim 1 or 2, the flexural modulus of the first rubber-resin composition is 6 GPa.
-15 GPa, and the second rubber-resin composition has a flexural modulus of 1 GPa-10 GPa.

【0012】上記課題を解決するため、本願の請求項4
記載の発明は、請求項1乃至3のいずれか1項記載の半
導体装置において、前記第2のゴム・樹脂組成物が主と
して充填されている周縁部に、前記基板と半導体素子の
電気的接合部を有することを特徴とする。
[0012] In order to solve the above-mentioned problems, claim 4 of the present application.
The semiconductor device according to any one of claims 1 to 3, wherein an electrical junction between the substrate and the semiconductor element is provided at a peripheral portion mainly filled with the second rubber / resin composition. It is characterized by having.

【0013】上記課題を解決するため、本願の請求項5
記載の発明は、請求項4記載の半導体装置において、前
記電気的接合部は、前記基板および半導体素子の少なく
とも一方の電極に設けられたバンプを備えていることを
特徴とする。
[0013] In order to solve the above problems, claim 5 of the present application.
According to a fourth aspect of the present invention, in the semiconductor device according to the fourth aspect, the electrical junction includes a bump provided on at least one electrode of the substrate and the semiconductor element.

【0014】請求項1記載の発明の半導体装置において
は、基板と半導体素子との間隙の周縁部が主として、中
央部のものより曲げ弾性率の低いゴム・樹脂組成物で充
填されているので、半導体素子のサイズが大きくなって
も、半導体素子と配線基板の熱膨張率の差に起因する熱
応力に十分耐えるだけの接合力を確保することができ、
半導体素子と基板との電気的および機械的接合の信頼性
の低下を防止することができる。
In the semiconductor device according to the first aspect of the present invention, the peripheral portion of the gap between the substrate and the semiconductor element is mainly filled with a rubber / resin composition having a lower bending elastic modulus than that of the central portion. Even if the size of the semiconductor element becomes large, it is possible to secure a bonding force enough to withstand thermal stress caused by a difference in thermal expansion coefficient between the semiconductor element and the wiring board,
It is possible to prevent a reduction in the reliability of electrical and mechanical bonding between the semiconductor element and the substrate.

【0015】請求項2記載の発明の半導体装置において
は、基板と半導体素子との間隙の周縁部に主として充填
されるゴム・樹脂組成物として、中央部に主として充填
されるゴム・樹脂組成物の0.9倍以下の曲げ弾性率を有
するものを使用したことにより、半導体素子と基板との
電気的および機械的接合性をさらに信頼性の高いものと
することができる。
In the semiconductor device according to the second aspect of the present invention, the rubber / resin composition mainly filled in the peripheral portion of the gap between the substrate and the semiconductor element is used as the rubber / resin composition mainly filled in the center portion. By using a material having a flexural modulus of 0.9 or less, the electrical and mechanical bonding between the semiconductor element and the substrate can be made even more reliable.

【0016】請求項3記載の発明の半導体装置において
は、基板と半導体素子との間隙の中央部に主として充填
されるゴム・樹脂組成物として、曲げ弾性率が6GPa〜15
GPaのものを使用し、かつ、基板と半導体素子との間隙
の周縁部に主として充填されるゴム・樹脂組成物とし
て、曲げ弾性率が1Gpa〜10Gpaのものを使用したことに
より、半導体素子と基板との電気的および機械的接合性
をよりいっそう信頼性の高いものとすることができる。
In the semiconductor device according to the third aspect of the present invention, the rubber / resin composition mainly filled in the center of the gap between the substrate and the semiconductor element has a flexural modulus of 6 GPa to 15 GPa.
GPa, and, as the rubber / resin composition mainly filled in the peripheral portion of the gap between the substrate and the semiconductor element, the flexural modulus of 1 Gpa to 10 Gpa was used, whereby the semiconductor element and the substrate were used. And electrical and mechanical bonding with the substrate can be made even more reliable.

【0017】請求項4記載の発明の半導体装置において
は、曲げ弾性率の低いゴム・樹脂組成物が主として充填
されている部分に基板と半導体素子の電気的接合部が設
けられている。このような半導体装置では、半導体素子
が大型化した場合の半導体素子と基板との電気的および
機械的接合の信頼性の向上がより顕著となる。
In the semiconductor device according to the fourth aspect of the present invention, an electrical junction between the substrate and the semiconductor element is provided in a portion mainly filled with a rubber / resin composition having a low flexural modulus. In such a semiconductor device, when the size of the semiconductor element is increased, the reliability of electrical and mechanical bonding between the semiconductor element and the substrate is more significantly improved.

【0018】請求項5記載の発明の半導体装置において
は、前記電気的接合部がバンプを備えており、半導体素
子が大型化した場合の半導体素子と基板との電気的およ
び機械的接合の信頼性の向上がよりいっそう顕著とな
る。
According to a fifth aspect of the present invention, in the semiconductor device according to the present invention, the electrical junction has a bump, and the reliability of the electrical and mechanical junction between the semiconductor element and the substrate when the semiconductor element is enlarged. The improvement is more remarkable.

【0019】なお、本発明においては、前記ゴム・樹脂
組成物として、請求項6に記載したように、ブタジエン
ゴム、ニトリルゴム、ウレタンゴム、シリコーンゴム、
ポリスチレン、ポリビニルアルコール、メタクリル樹
脂、ポリアミド、フェノール樹脂、メラミン樹脂、エポ
キシ樹脂、および不飽和ポリエステル樹脂から選ばれた
少なくとも1種を主成分とする組成物を例示することが
できる。
In the present invention, as the rubber / resin composition, as described in claim 6, butadiene rubber, nitrile rubber, urethane rubber, silicone rubber,
Examples of the composition include a composition containing as a main component at least one selected from polystyrene, polyvinyl alcohol, methacrylic resin, polyamide, phenolic resin, melamine resin, epoxy resin, and unsaturated polyester resin.

【0020】[0020]

【発明の実施の形態】以下、本発明を実施の形態につい
て説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described with reference to embodiments.

【0021】図1は、本発明の半導体装置の一実施形態
を示す概略断面図である。
FIG. 1 is a schematic sectional view showing an embodiment of the semiconductor device of the present invention.

【0022】図1において、1は、上面に接続用電極(図
示なし)が形成されたプリント配線板などの基板10を
示し、この基板10上には、半導体素子20がフェイス
ダウンに、すなわち、半導体素子20に形成された電極
(図示なし)を基板の接続用電極に対向させるととも
に、接続用電極と電極との間にバンプ30を介在させて
実装されている。なお、この実施形態では、バンプ30
は半導体素子20の実装面の周辺部に配置されている。
そして、このように実装された半導体素子20と基板1
0との間には、曲げ弾性率の異なる2種類の樹脂組成物
が充填されている。
In FIG. 1, reference numeral 1 denotes a substrate 10 such as a printed wiring board on which connection electrodes (not shown) are formed on the upper surface. On this substrate 10, a semiconductor element 20 faces down, that is, An electrode (not shown) formed on the semiconductor element 20 is mounted so as to face the connection electrode of the substrate, and a bump 30 is interposed between the connection electrode and the electrode. In this embodiment, the bump 30
Are arranged on the periphery of the mounting surface of the semiconductor element 20.
Then, the semiconductor element 20 thus mounted and the substrate 1
Between zero and two, two types of resin compositions having different flexural modulus are filled.

【0023】すなわち、半導体素子20と基板10との
間隙の中央部は、主として曲げ弾性率の高い樹脂組成物
(第1の樹脂組成物)が充填されており、その周囲のバ
ンプ30配置位置を含む周縁部には、主として曲げ弾性
率の低い樹脂組成物(第2の樹脂組成物)が充填されて
いる。図1中、41は、第1の樹脂組成物が主として充
填されている第1の樹脂充填部、42は、第2の樹脂組
成物が主として充填されている第1の樹脂充填部を示し
ている、ここで、第2の樹脂組成物は、第1の樹脂組成
物の0.9倍以下の曲げ弾性率を有するものであることが
本発明の効果を得るうえで好ましく、第1の樹脂組成物
の曲げ弾性率が6GPa〜15GPaであって、第2の樹脂組成
物の曲げ弾性率が1GPa〜10GPaの範囲であるとさらに好
ましい。なお、このような条件を満足するものであれ
ば、特にその種類が限定されるものではなく、通常、こ
の種の充填材として使用されているものから上記条件を
満足するものを適宜選択して用いることができる。具体
的には、ポリスチレン、ポリビニルアルコール、メタク
リル樹脂、ポリアミドなどの熱可塑性樹脂や、フェノー
ル樹脂、メラミン樹脂、エポキシ樹脂、不飽和ポリエス
テル樹脂などの熱硬化性樹脂をベースとする樹脂組成物
が例示され、これらは1種を単独で使用してもよく2種
以上を混合して使用してもよい。また、本発明において
は、ブタジエンゴム、ニトリルゴム、ウレタンゴム、シ
リコーンゴムなどのゴム組成物の使用も可能である。
That is, the central portion of the gap between the semiconductor element 20 and the substrate 10 is mainly filled with a resin composition having a high flexural modulus (first resin composition). The peripheral portion that is included is mainly filled with a resin composition having a low flexural modulus (second resin composition). In FIG. 1, reference numeral 41 denotes a first resin filling portion mainly filled with a first resin composition, and reference numeral 42 denotes a first resin filling portion mainly filled with a second resin composition. Here, it is preferable that the second resin composition has a flexural modulus of 0.9 times or less of the first resin composition in order to obtain the effect of the present invention, and the first resin composition Is more preferably 6 GPa to 15 GPa, and the flexural modulus of the second resin composition is in the range of 1 GPa to 10 GPa. In addition, as long as it satisfies such a condition, the type is not particularly limited, and a material that satisfies the above condition is selected from those usually used as a filler of this type. Can be used. Specific examples include resin compositions based on thermoplastic resins such as polystyrene, polyvinyl alcohol, methacrylic resins, and polyamides, and thermosetting resins such as phenolic resins, melamine resins, epoxy resins, and unsaturated polyester resins. These may be used alone or as a mixture of two or more. In the present invention, a rubber composition such as butadiene rubber, nitrile rubber, urethane rubber, and silicone rubber can be used.

【0024】本実施形態の半導体装置は、例えば次のよ
うに製造することができる。
The semiconductor device of this embodiment can be manufactured, for example, as follows.

【0025】上面に接続用電極が形成された基板10上
の、半導体素子20を実装する箇所の中心部分に第1の
樹脂組成物を塗布し、次いで、接続用電極形成領域の内
側で、先に塗布した第1の樹脂組成物の塗布部を取り囲
むように第2の樹脂組成物を塗布する。塗布後、予め電
極にバンプ30を形成しておいた半導体素子を、バンプ
30側を基板10に向けて搭載し、加熱加圧する。この
結果、塗布した樹脂組成物が基板10上を広がり、図1
に示すような、半導体素子と基板との間隙の中央部が、
主として第1の樹脂組成物により、また、その周囲のバ
ンプ配置位置を含む周縁部が、主として第2の樹脂組成
物で充填された半導体装置が得られる。
A first resin composition is applied to a central portion of a place where the semiconductor element 20 is mounted on the substrate 10 on which the connection electrode is formed on the upper surface, and then the first resin composition is applied inside the connection electrode formation region. The second resin composition is applied so as to surround the application portion of the first resin composition applied to the first resin composition. After the application, the semiconductor element having the bumps 30 formed on the electrodes in advance is mounted with the bump 30 side facing the substrate 10 and heated and pressed. As a result, the applied resin composition spreads on the substrate 10, and FIG.
As shown in the figure, the center of the gap between the semiconductor element and the substrate is
A semiconductor device is obtained in which the first resin composition is mainly used and the peripheral portion including the bump arrangement position around the first resin composition is mainly filled with the second resin composition.

【0026】このようにして得られる半導体装置は、基
板10と半導体素子20との間隙の周縁部が主として、
中央部のものより曲げ弾性率の低い樹脂組成物で充填さ
れており、冷熱サイクルが加えられても、周縁部の充填
樹脂が低曲げ弾性率であるため、半導体素子と基板の熱
膨張率の差に起因するおおきな熱応力を吸収することが
できる。一方、中央部の充填樹脂が高い曲げ弾性率であ
るため、十分に高い接合強度を得ることができる。した
がって、半導体素子が大型化しても十分に対応可能で高
い接合信頼性を有することができる。
In the semiconductor device thus obtained, the periphery of the gap between the substrate 10 and the semiconductor element 20 is mainly
Filled with a resin composition having a lower flexural modulus than that at the center, and even if a thermal cycle is applied, the filling resin at the peripheral portion has a low flexural modulus, so that the thermal expansion coefficient of the semiconductor element and the substrate is reduced. Large thermal stress caused by the difference can be absorbed. On the other hand, since the filling resin at the center has a high flexural modulus, a sufficiently high bonding strength can be obtained. Therefore, even if the size of the semiconductor element is increased, it is possible to sufficiently cope with the semiconductor element and to have high bonding reliability.

【0027】なお、上記の実施形態は、本発明を、半導
体素子がバンプを介してフリップチップ実装される半導
体装置に適用した例であるが、本発明はこのような例に
限定されるものではなく、半導体素子が導電性粒子を介
してフリップチップ実装される半導体装置をはじめ、各
種基板上に半導体素子をフェイスダウンに実装するもの
に広く適用できることは言うまでもない。
The above embodiment is an example in which the present invention is applied to a semiconductor device in which a semiconductor element is flip-chip mounted via bumps. However, the present invention is not limited to such an example. Needless to say, the present invention can be widely applied to a semiconductor device in which a semiconductor element is flip-chip mounted via conductive particles, and a semiconductor device in which a semiconductor element is mounted face down on various substrates.

【0028】本発明は、半導体素子のサイズが15mm×15
mmを超える場合に特に有用である。
According to the present invention, the size of the semiconductor device is 15 mm × 15
It is particularly useful when it exceeds mm.

【0029】[0029]

【実施例】次に、本発明を実施例によりさらに詳細に説
明するが、本発明はこれらの実施例に限定されるもので
はない。なお、以下の記載において「部」は「重量部」
を意味する。
Next, the present invention will be described in more detail with reference to examples, but the present invention is not limited to these examples. In the following description, “parts” means “parts by weight”.
Means

【0030】実施例1 ビスフェノールA型エポキシ樹脂(油化シェルエポキシ
社製 商品名エピコート828)100部、アミノポリア
ミド樹脂(東都化成社製 商品名G−725)20部、1,
2ジメチルイミダゾール5部、およびγ-グリシドキシプ
ロピルトリメトキシシラン1部をホモジナイザにより均
一に混合して樹脂組成物Aを調製した。この樹脂組成物
Aの曲げ弾性率を測定したところ2.5GPaであった。
Example 1 100 parts of a bisphenol A type epoxy resin (trade name: Epicoat 828, manufactured by Yuka Shell Epoxy), 20 parts of an aminopolyamide resin (trade name: G-725, manufactured by Toto Kasei Co., Ltd.)
A resin composition A was prepared by uniformly mixing 5 parts of 2 dimethylimidazole and 1 part of γ-glycidoxypropyltrimethoxysilane with a homogenizer. When the flexural modulus of this resin composition A was measured, it was 2.5 GPa.

【0031】また、ビスフェノールA型エポキシ樹脂
(油化シェルエポキシ社製 商品名エピコート828)
100部、アミノポリアミド樹脂(東都化成社製 商品名
G−725)20部、1,2ジメチルイミダゾール5部、γ-
グリシドキシプロピルトリメトキシシラン1部、および
シリカ(平均粒径1.0μm)100部をホモジナイザにより
均一に混合して樹脂組成物Bを調製した。この樹脂組成
物Bの曲げ弾性率を測定したところ8GPaであった。
Further, bisphenol A type epoxy resin (trade name: Epicoat 828, manufactured by Yuka Shell Epoxy)
100 parts, 20 parts of aminopolyamide resin (trade name: G-725, manufactured by Toto Kasei), 5 parts of 1,2 dimethylimidazole, γ-
Resin composition B was prepared by uniformly mixing 1 part of glycidoxypropyltrimethoxysilane and 100 parts of silica (average particle size: 1.0 μm) with a homogenizer. When the flexural modulus of this resin composition B was measured, it was 8 GPa.

【0032】電極表面にAu/Niめっきを施したプリ
ント配線板(0.8mm厚ガラスエポキシ基板FR−4、銅
箔厚18μm)上の半導体素子実装位置の中心に、上記樹
脂組成物Bを約10mg塗布し、さらに、その周囲に上記樹
脂組成物Aを約6mg塗布した。次いで、その上に、周辺
部にAuめっきバンプを形成した15mm×15mm×0.7mmの
シリコンチップ(チップサイズ15mm×15mm×0.7mm、バ
ンプサイズ80μm×80μm×25μm、バンプ数360、バ
ンプ間隔80μm)を、ボンディング装置を用いて、180
℃、10kg/cm2 の条件で2分間、加熱加圧して一体に接
合させ、特性評価用サンプルを得た。
About 10 mg of the above resin composition B was placed at the center of a semiconductor element mounting position on a printed wiring board (0.8 mm thick glass epoxy board FR-4, copper foil thickness 18 μm) having an Au / Ni plating on the electrode surface. Then, about 6 mg of the above resin composition A was applied to the periphery. Next, a 15 mm x 15 mm x 0.7 mm silicon chip (chip size 15 mm x 15 mm x 0.7 mm, bump size 80 m x 80 m x 25 m, bump number 360, bump spacing 80 m) with an Au plating bump formed on the periphery Using a bonding machine for 180
Under a condition of 10 ° C. and 10 kg / cm 2 , heating and pressurizing were performed for 2 minutes to integrally bond, thereby obtaining a sample for property evaluation.

【0033】実施例2 フェノキシ樹脂(東都化成社製 商品名YP−50)10
0部、およびメチルエチルケトン100部をホモジナイザに
より均一に混合して樹脂組成物Cを調製した。この樹脂
組成物Cの曲げ弾性率を測定したところ1GPaであった。
Example 2 Phenoxy resin (trade name: YP-50, manufactured by Toto Kasei) 10
0 part and 100 parts of methyl ethyl ketone were uniformly mixed with a homogenizer to prepare a resin composition C. When the flexural modulus of this resin composition C was measured, it was 1 GPa.

【0034】実施例1と同様のプリント配線板上の半導
体素子実装位置の中心に、実施例1で用いた樹脂組成物
Bを約10mg塗布し、さらに、その周囲に上記樹脂組成物
Cを約12mg塗布し室温で乾燥させた。次いで、その上
に、実施例1と同様のシリコンチップを、ボンディング
装置を用いて、180℃、10kg/cm2 の条件で2分間、加熱
加圧して一体に接合させ、特性評価用サンプルを得た。
About 10 mg of the resin composition B used in Example 1 was applied to the center of the semiconductor element mounting position on the printed wiring board as in Example 1, and the resin composition C was applied to the periphery thereof. 12 mg was applied and dried at room temperature. Next, a silicon chip similar to that of Example 1 was further heated and pressed under the conditions of 180 ° C. and 10 kg / cm 2 for 2 minutes using a bonding apparatus to integrally bond the silicon chip to obtain a sample for property evaluation. Was.

【0035】比較例1 実施例1と同様のプリント配線板上の半導体素子実装位
置に、実施例1で用いた樹脂組成物Bを約16mg塗布し、
次いで、その上に、実施例1と同様のシリコンチップ
を、ボンディング装置を用いて、180℃、10kg/cm2 の条
件で2分間、加熱加圧して一体に接合させ、特性評価用
サンプルを得た。
Comparative Example 1 About 16 mg of the resin composition B used in Example 1 was applied to the same mounting position of the semiconductor element on the printed wiring board as in Example 1,
Next, a silicon chip similar to that of Example 1 was further heated and pressed under the conditions of 180 ° C. and 10 kg / cm 2 for 2 minutes using a bonding apparatus to integrally bond the silicon chip to obtain a sample for property evaluation. Was.

【0036】比較例2 実施例1と同様のプリント配線板上の半導体素子実装位
置に、実施例1で用いた樹脂組成物Aを約16mg塗布し、
次いで、その上に、実施例1と同様のシリコンチップ
を、ボンディング装置を用いて、180℃、10kg/cm2 の条
件で2分間、加熱加圧して一体に接合させ、特性評価用
サンプルを得た。
Comparative Example 2 About 16 mg of the resin composition A used in Example 1 was applied to a mounting position of a semiconductor element on a printed wiring board similar to that in Example 1,
Next, a silicon chip similar to that of Example 1 was further heated and pressed under the conditions of 180 ° C. and 10 kg / cm 2 for 2 minutes using a bonding apparatus to integrally bond the silicon chip to obtain a sample for property evaluation. Was.

【0037】上記各実施例および各比較例で得られた特
性評価用サンプルについて、シリコンチップの初期接着
強度を測定するとともに、冷熱サイクル加速試験(-40
℃〜125℃、1000サイクル)を実施し、接着強度および
導通を測定した。結果を表1に示す。
With respect to the sample for property evaluation obtained in each of the above Examples and Comparative Examples, the initial adhesive strength of the silicon chip was measured, and a thermal cycle acceleration test (-40
C. to 125.degree. C., 1000 cycles), and the adhesive strength and conduction were measured. Table 1 shows the results.

【表1】 [Table 1]

【0038】表1からも明らかなように、実施例では、
いずれも、初期接着強度は十分であり、冷熱サイクル試
験後も導通がOPENになることはなく初期接着強度を
維持していたのに対し、比較例1では、冷熱サイクル試
験後の接着強度が大きく低下しており(シリコンチップ
と樹脂組成物間で剥離の発生が認められた。)、導通も
不良になっていた。また、比較例2では、冷熱サイクル
による接着強度の低下は見られなかったものの、初期接
着強度が不十分で、冷熱サイクル後の導通は不良であっ
た。
As is clear from Table 1, in the embodiment,
In each case, the initial adhesive strength was sufficient, and the conduction did not become OPEN even after the thermal cycle test, and the initial adhesive strength was maintained. In Comparative Example 1, however, the adhesive strength after the thermal cycle test was large. The peeling was observed between the silicon chip and the resin composition, and the conduction was poor. Further, in Comparative Example 2, although no decrease in the adhesive strength due to the thermal cycle was observed, the initial adhesive strength was insufficient, and the conduction after the thermal cycle was poor.

【0039】[0039]

【発明の効果】以上説明したように、本発明によれば、
基板と半導体素子との間隙の周縁部を中央部より曲げ弾
性率の低いゴム・樹脂組成物で充填する構成としたの
で、半導体素子のサイズが大きくなっても、高い接合信
頼性を得ることができる。
As described above, according to the present invention,
Since the periphery of the gap between the substrate and the semiconductor element is filled with a rubber / resin composition having a lower flexural modulus than the central part, high bonding reliability can be obtained even when the size of the semiconductor element increases. it can.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体装置の一実施形態を示す概略断
面図。
FIG. 1 is a schematic sectional view showing one embodiment of a semiconductor device of the present invention.

【符号の説明】[Explanation of symbols]

10………基板 20………半導体素子 30………バンプ 41………第1の樹脂充填部 42………第1の樹脂充填部 10 Substrate 20 Semiconductor element 30 Bump 41 First resin filled part 42 First resin filled part

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 基板上に半導体素子がフェイスダウンに
実装され、かつ、前記基板と半導体素子との間隙がゴム
・樹脂組成物で充填されてなる半導体装置であって、 前記基板と半導体素子との間隙の中央部が主として第1
のゴム・樹脂組成物で充填され、周縁部が主として前記
第1のゴム・樹脂組成物より低曲げ弾性率の第2のゴム
・樹脂組成物で充填されていることを特徴とする半導体
装置。
1. A semiconductor device in which a semiconductor element is mounted face down on a substrate, and a gap between the substrate and the semiconductor element is filled with a rubber / resin composition. The center of the gap is mainly the first
And a peripheral portion mainly filled with a second rubber / resin composition having a lower flexural modulus than the first rubber / resin composition.
【請求項2】 前記第2のゴム・樹脂組成物の曲げ弾性
率が、前記第1のゴム・樹脂組成物の弾性率の0.9倍以
下であることを特徴とする請求項1記載の半導体装置。
2. The semiconductor device according to claim 1, wherein the flexural modulus of the second rubber / resin composition is not more than 0.9 times the modulus of elasticity of the first rubber / resin composition. .
【請求項3】 前記第1のゴム・樹脂組成物の曲げ弾性
率が6GPa〜15GPaであり、前記第2のゴム・樹脂組成物の
曲げ弾性率が1GPa〜10GPaであることを特徴とする請求
項1または2記載の半導体装置。
3. The flexural modulus of the first rubber / resin composition is 6 GPa to 15 GPa, and the flexural modulus of the second rubber / resin composition is 1 GPa to 10 GPa. Item 3. The semiconductor device according to item 1 or 2.
【請求項4】 前記第2のゴム・樹脂組成物が主として
充填されている周縁部に、前記基板と半導体素子の電気
的接合部を有することを特徴とする請求項1乃至3のい
ずれか1項記載の半導体装置。
4. The semiconductor device according to claim 1, further comprising an electrical connection portion between the substrate and the semiconductor element at a peripheral portion mainly filled with the second rubber / resin composition. 13. The semiconductor device according to claim 1.
【請求項5】 前記電気的接合部は、前記基板および半
導体素子の少なくとも一方の電極に設けられたバンプを
備えていることを特徴とする請求項4記載の半導体装
置。
5. The semiconductor device according to claim 4, wherein the electrical junction includes a bump provided on at least one electrode of the substrate and the semiconductor element.
【請求項6】 前記第1および第2のゴム・樹脂組成物
は、ブタジエンゴム、ニトリルゴム、ウレタンゴム、シ
リコーンゴム、ポリスチレン、ポリビニルアルコール、
メタクリル樹脂、ポリアミド、フェノール樹脂、メラミ
ン樹脂、エポキシ樹脂、および不飽和ポリエステル樹脂
から選ばれた少なくとも1種を主成分とする組成物であ
ることを特徴とする請求項1乃至5のいずれか1項記載
の半導体装置。
6. The first and second rubber / resin compositions comprise butadiene rubber, nitrile rubber, urethane rubber, silicone rubber, polystyrene, polyvinyl alcohol,
The composition according to any one of claims 1 to 5, wherein the composition is a composition mainly containing at least one selected from methacrylic resin, polyamide, phenolic resin, melamine resin, epoxy resin, and unsaturated polyester resin. 13. The semiconductor device according to claim 1.
JP2000106576A 2000-04-07 2000-04-07 Semiconductor device Withdrawn JP2001291805A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000106576A JP2001291805A (en) 2000-04-07 2000-04-07 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000106576A JP2001291805A (en) 2000-04-07 2000-04-07 Semiconductor device

Publications (1)

Publication Number Publication Date
JP2001291805A true JP2001291805A (en) 2001-10-19

Family

ID=18619722

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000106576A Withdrawn JP2001291805A (en) 2000-04-07 2000-04-07 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2001291805A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007134356A (en) * 2005-11-08 2007-05-31 Matsushita Electric Ind Co Ltd Semiconductor packaging apparatus
WO2007139101A1 (en) * 2006-05-29 2007-12-06 Henkel Corporation Electronic component mounting structure
JP2007324360A (en) * 2006-05-31 2007-12-13 Henkel Corp Mounting structure of electronic component

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007134356A (en) * 2005-11-08 2007-05-31 Matsushita Electric Ind Co Ltd Semiconductor packaging apparatus
WO2007139101A1 (en) * 2006-05-29 2007-12-06 Henkel Corporation Electronic component mounting structure
JP2007324360A (en) * 2006-05-31 2007-12-13 Henkel Corp Mounting structure of electronic component

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