JP2724713B2 - Power amplifier - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention particularly relates to a power amplifier in which distortion due to nonlinearity of an output transistor is reduced.

2. Description of the Related Art Conventionally, a power amplifier that performs a class A operation for a small signal and performs a class B operation for a large signal for audio has been known, and its output stage has a configuration as shown in FIG. Have.

Multi-stage Darlington-connected positive third drive transistor Q5, first drive transistor Q3 and first output transistor Q1, multi-stage Darlington-connected negative fourth drive transistor Q6, second drive transistor Q4 And a second output transistor Q2. The emitters of the first and second output transistors Q1, Q2 are connected in series via first and second emitter resistors r, r connected in series.
The connection point of the first and second emitter resistors r and r is connected as an output terminal to the load RL, and the first and second bias voltages VB are connected to the bases of the third and fourth drive transistors Q5 and Q6. , VB are applied.

[Problems to be Solved by the Invention] In the class AB and class B operation regions of the power amplifier, the base-emitter voltage VBE of the first and second output transistors Q1 and Q2 is non-linear with respect to the current, Further, since the current change is much larger than that of the other driving transistors, the first and second output transistors Q1 and Q2 generate large distortion due to their non-linearity.

Hereinafter, the problem to be solved by the present invention will be clarified by a circuit analysis method.

As shown in FIG. 8, the equivalent circuit of the first and second output transistors Q1 and Q2 is a fixed component (linear component), that is, the base-emitter voltage VBE of the first and second output transistors Q1 and Q2, the emitter internal resistance. re and base-emitter voltage V
Decomposed into fluctuation components (non-linear components) D1 and D2 of BE, the equivalent circuit of the conventional example in FIG. 7 can be expressed as in FIG. 9, which is equivalent to FIG. is there.

Here, D1: a fluctuation component of the base-emitter voltage VBE of the first output transistor Q1 D2: a fluctuation component of the base-emitter voltage VBE of the second output transistor Q2 re: the first and second output transistors Q1 , Q2 internal resistance of emitter 3VBE: sum of third drive transistor Q5, first drive transistor Q3 and base-emitter voltage VBE of first output transistor Q1 fourth drive transistor Q6, second drive transistor Q4 And the sum r of the base-emitter voltage VBE of the second output transistor Q2: first and second emitter resistances Vs: input voltage.

In the class A operation region, the output voltage V0 is Becomes

In this formula, the first term is a distortion-free signal component, and the second term is a distortion component based on the fluctuation components D1, D2 of the base-emitter voltage VBE of the first and second output transistors Q1, Q2.

Next, considering a class B operation region (for example, when the second output transistor Q2 is OFF), its equivalent circuit is as shown in FIG. 11, and similarly, its output voltage V0
Is Becomes

In this equation, the first term is a distortion-free signal component, and the second term is a distortion component based on a fluctuation component D1 of the base-emitter voltage VBE of the first output transistor Q1.

As described above, in the conventional power amplifier, large distortion occurs due to the non-linearity of the first and second output transistors Q1 and Q2, and this distortion component is included in the output voltage.

[Means for Solving the Problems] The present invention provides a multi-stage Darlington-connected positive-side third drive transistor Q5, a first drive transistor Q3 and a first output transistor Q1, and a multi-stage Darlington-connected negative side transistor. A first driving transistor Q6, a second driving transistor Q4, and a second output transistor Q2; a first and a second emitter in which the emitters of the first and second output transistors Q1 and Q2 are connected in series; Connected through resistors r1 and r1,
The connection point of the first and second emitter resistors r1 and r1 is connected as an output terminal to the load RL, and the first and second bias voltages VB are connected to the bases of the third and fourth drive transistors Q5 and Q6. , VB respectively applied, the bases of the first and second output transistors Q1, Q2
A voltage proportional to the fluctuation components D1 and D2 of the emitter-to-emitter voltage VBE is added to the base voltages of the first and second drive transistors Q3 and Q4, and the first and second output transistors Q1 and Q2 are added.
Characterized in that the fluctuation components D1 and D2 are canceled.

[Operation] Hereinafter, the operation will be described with reference to a circuit analysis method in FIG. 1 showing a typical embodiment of the present invention.

The equivalent circuit of the first and second output transistors Q1 and Q2 is represented by the same concept as that of FIG.
In the class operation area, the result is as shown in FIG.

Here, D1: a fluctuation component of the base-emitter voltage VBE of the first output transistor Q1 D2: a fluctuation component of the base-emitter voltage VBE of the second output transistor Q2 re: the first and second output transistors Q1 , Q2, the internal resistance of the emitter Vs: input voltage V1: voltage of the signal component at the base of the first and second drive transistors Q3, Q4 V2: voltage V0 of the signal component at the emitter of the fifth and sixth transistors 7a, 7b ': Voltage of the signal component at the emitter of the first and second output transistors Q1, Q2 (voltage at point b) I0: output (load) current Ic: of the first and second current mirror circuits 6a, 6b Collector currents of the first and third transistors on the input side KIc: Collector currents of the second and fourth transistors on the output side of the first and second current mirror circuits 6a and 6b r1: First and second Emitter resistance R1: 13th and 14th resistance R2: 11th Twelfth resistor R3: Fifth and sixth resistors R4: Ninth and tenth resistors r2: Seventh and eighth resistors R1 ': R1 / 2 R2': R2 / 2 R3 ':( R3 + r2) / 2 R4 ': R4 / 2.

In FIG. 1, the change in current of the fifth and sixth transistors 7a and 7b is sufficiently smaller than that of the first and second output transistors Q1 and Q2, and the change in the base-emitter voltage VBE is also small. .

Therefore, considering the signal components, in FIG. 2, the base voltage V1 of the first and second driving transistors Q3 and Q4 and the emitter voltage of the fifth and sixth transistors 7a and 7b are shown in FIG.
V2 is V2 = V1.

Also, generally, the first and second output transistors Q1, Q2
Emitter current I1 and fifth and sixth transistors 7a and 7b
Emitter voltage V2--first and second output transistors Q1,
The relationship between the current flowing due to the potential difference between the emitter voltage V0 'of Q2 (that is, the current flowing due to the fluctuation components D1 and D2 of the first and second output transistors Q1 and Q2) is I3. Therefore, it is considered that I0 ≒ I1.

Under the above conditions, in the class A operation region, if RL '= r1 / 2 + RL, the voltage V0' of the signal component at the emitters of the first and second output transistors Q1 and Q2 becomes Becomes

Since V1 = V2, the current iR2 'flowing through R2' and the current iR4 'flowing through R4' are inversely proportional to the respective resistance values. iR4 '= (KR1'R2') / (R2 '+ R4') ic. Becomes

Also, So that Becomes

Therefore, Substituting this into Equation A gives Becomes

Than this, Becomes

 Therefore, if each constant is set so that KR1′R4 ′ = R3 ′ ｛(1 + K) R2 ′ + R4 ′｝, that is, KR1R4 = (r2 + R3) ｛(1 + K) R2 + R4｝, then V0 ′ = Vs Become.

Therefore, And the output voltage V0 does not include the terms of the fluctuation components D1 and D2.

Further, the influence of the impedance (re / 2) between (a) and (b) in FIG. 2 does not appear in the output voltage V0.

Next, in the class B operation region (for example, when the second output transistor Q2 is OFF), its equivalent circuit is changed to the third output transistor Q2.
It can be represented as shown in the figure.

This equivalent circuit differs from that of FIG. 2 only in that the constant of each part is partially changed. Similarly, the voltage V0 'of the signal component at the emitters of the first and second output transistors Q1 and Q2 is similarly obtained.
Is KR1'R4 '= R3' {(1 + K) R2 '+ R4'} That is, when KR1R4 = (r2 + R3) {(1 + K) R2 + R4}, And the output voltage V0 does not include the terms D1 and D2 of the distortion component. Further, the impedance between (a) and (b) in FIG. Does not appear in the output voltage V0.

As described above, according to the present invention, the distortion component D caused by the change in the base-emitter voltage VBE of the first and second output transistors Q1 and Q2 is reduced to the fifth and the fifth in which the change in the base-emitter voltage VBE is small. The change in the emitter current of the sixth transistors 7a and 7b is detected and the change in the current is detected as the first change.
Third, the distortion component is added to the input signal Vs as a voltage drop by flowing through the fourteenth resistors 12a and 12b (resistance value R1).

That is, in the present invention, the fluctuation components D1, D2 of the base-emitter voltage VBE of the first and second output transistors Q1, Q2.
2, a voltage proportional to the fluctuation components D1 and D2 is generated, and the proportional voltage is added to the base voltages of the first and second driving transistors Q3 and Q4 to obtain the fluctuation components D1 and D2.
D2 has been canceled.

As described above, in the present invention, the same transfer characteristics are obtained in any of the class A operation region and the class B operation region.
The distortion component due to the non-linearity of the base-emitter voltage VBE of the first and second output transistors Q1 and Q2 can be canceled to perform faithful power amplification without the distortion component.

[Embodiment] This will be described with reference to FIGS. In the figure, the same parts as those in the conventional example of FIG. 7 are denoted by the same reference numerals, and the description thereof will be omitted.

First Embodiment: First and second transistors 2a connecting bases,
2b is connected to the positive power supply 1a via first and second resistors 4a and 5a, respectively, and the first transistor
A first current mirror circuit 6a is formed by connecting the base and collector of the second transistor 2a. Similarly, the emitters of the third and fourth transistors 2b and 3b connected to the bases are connected to the third and fourth transistors.
Are connected to the negative power supply 1b via the resistors 4b and 5b, respectively, and are connected between the base and collector of the third transistor 2b to form a second current mirror circuit 6b.

Here, the first and second current mirror circuits 6a and 6b are:
The first and second resistors 4a and 5a, the third and fourth resistors 4b and 5b
In another embodiment, for example, taking the first current mirror circuit 6a as an example, as shown in FIG. 4, the first resistor 4a and the 1
Is connected to a series circuit of a second resistor 5a having the same resistance value as the first resistor 4a and a second transistor 3a having the same specification as the first transistor 2a.
5, or as shown in FIG. 5, an emitter of the second transistor 3a has second resistors 5a, 5a having the same resistance value as the K first resistors 4a. ,
.. May be connected in parallel to achieve an approximately k-fold transmission ratio.

The collectors of the first and third transistors 2a and 2b are connected to the collectors of fifth and sixth transistors 7a and 7b, respectively, and the emitters are connected in series to form fifth and sixth resistors 8a and 8b (resistors). Both values are connected via R3), and the bases of the fifth and sixth transistors 7a and 7b are connected to the bases of the first and second drive transistors Q3 and Q4, respectively. Further, the second and fourth transistors 3
Connect the collectors of a and 3b.

And the first and second emitter resistors connected in series.
Seventh and eighth resistors 9a and 9b connected in series with r1 and r1
(The resistance values are both r2), and the connection midpoint is connected to the connection midpoint of the fifth and sixth resistors 8a and 8b connected in series.

On the other hand, the fifth and sixth resistors 8a and 8b connected in series and the ninth and tenth resistors 10a and 10b (both having a resistance value of R4) connected in series are connected in parallel. 2, connected to the collectors of the fourth transistors 3a and 3b, and
The transistors are connected to the bases of the fifth and sixth transistors 7a and 7b via twelfth resistors 11a and 11b (both having a resistance value of R2).
7b and the third and fourth driving transistors Q5 and Q6
The thirteenth and fourteenth resistors 12a and 12b (both have a resistance value of R1) are connected between the first and second emitters.

 Then, as described in the section of [Action], each constant is set so that KR1′R4 ′ = R3 ′ ｛(1 + K) R2 ′ + R4 ′｝ That is, KR1R4 = (r2 + R3) ｛(1 + K) R2 + R4｝ Set.

FIG. 6 shows another embodiment.

In this embodiment, the first and second current mirror circuits 6a and 6b
, K = 1 R1 = R3 + r2 R2 = arbitrary R4 = ∞ where the first and second resistors 4a and 5a have the same resistance value, and the third and fourth resistors 4b and 5b have the same resistance value. Thus, the condition is satisfied.

In the present embodiment, by connecting the fifteenth resistor 13 in parallel with the fifth and sixth resistors 8a and 8b connected in series, the bias current of the fifth and sixth transistors 7a and 7b increases. And the fifth and sixth transistors 7 under load.
Since the current fluctuations of the transistors a and 7b can be relatively reduced, the bases of the fifth and sixth transistors 7a and 7b
The effect of the non-linear component of the emitter-to-emitter voltage VBE can be further reduced.

[Effects of the Invention] In the present invention, the same transfer characteristic is obtained in both the class A operation region and the class B operation region, and the distortion component due to the non-linearity of the first and second output transistors Q1 and Q2 is reduced. By canceling, it is possible to perform faithful power amplification without distortion components.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a power amplifier of the present invention, FIGS. 2 and 3 are diagrams showing equivalent circuits, and FIGS.
FIG. 6 is a diagram showing another example of the current mirror circuit, FIG. 6 is a diagram showing the configuration of another embodiment, FIG. 7 is a diagram showing the configuration of a conventional power amplifier, and FIGS. FIG. 11 is a diagram showing an equivalent circuit. 1a ... positive power supply, 1b ... negative power supply, 2a ... first transistor, 3a ... second transistor, 2b ... third transistor, 3b ... fourth transistor, 4a ... 1st resistor, 5a... 2nd resistor, 4b... 3rd resistor, 5b.
, 6a... First current mirror circuit, 6b.
Current mirror circuit, 7a... Fifth transistor, 7b
... Sixth transistor, 8a ... Fifth resistor, 8b ... Sixth resistor, 9a ... Seventh resistor, 9b ... Eighth resistor, 10a
... 9th resistance, 10b ... 10th resistance, 11a ... 11th resistance, 11b ... 12th resistance, 12a ... 13th resistance, 12b ...
Fourteenth resistor, 13 ... 15th resistor, Q1 ... first output transistor, Q2 ... second output transistor, Q3 ... first
Drive transistor, Q4 ... second drive transistor,
Q5: third drive transistor; Q6: fourth drive transistor; r1: first and second emitter resistors.

Claims (1)

(57) [Claims] 1. A positive driving third driving transistor (Q5) and a first driving transistor (Q5)
3) and the first output transistor (Q1), the fourth driver transistor (Q
6) a second driving transistor (Q4) and a second output transistor (Q2), the first and second output transistors (Q1) and (Q2) being connected in series with the first emitter, Connected via a second emitter resistor (r1), (r1), and connected to a load (RL) as an output terminal at a connection midpoint between the first and second emitter resistors (r1), (r1); In the configuration in which the first and second bias voltages (VB) and (VB) are applied to the bases of the third and fourth driving transistors (Q5) and (Q6), respectively, The fluctuation components (D1) and (D2) of the base-emitter voltage VBE of the second output transistors (Q1) and (Q2) are detected, and a voltage proportional to the fluctuation components (D1) and (D2) is generated. And this proportional voltage is used as the base voltage of the first and second drive transistors (Q3) and (Q4). San, the fluctuation component (D1), a power amplifier which is characterized in that so as to cancel the (D2).