KR830001980B1 - Power amplification circuit - Google Patents

Abstract

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Description

Power amplification circuit

1 is a circuit diagram showing an embodiment of the power amplifier circuit according to the present invention.

2 is a characteristic diagram for explaining the operation of the embodiment.

3 is a circuit diagram showing another embodiment of the present invention.

The present invention relates, in particular, to improvements in power amplification circuits suitable for integrated circuit (IC).

In general, when the integrated circuit (IC), the power amplifier circuit uses a complimentary single-ended push-pull (SEPP) amplifier circuit to the output stage.

However, in the integrated circuit (IC), a large current PNP transistor is difficult to manufacture, and in particular, the lateral (multi-collector) PNP transistor has a small current capacity, a small current amplification factor, and a gain. There is a problem that it is easy to oscillate because the bandwidth is low, and it is difficult to obtain a large output. In addition, if the transistor connected to the output terminal is an emitter ground type, the output amplification can be large even without a bootstrap circuit. However, this method makes it difficult to set the idle current of the transistor in the output terminal. Something bad has happened.

Therefore, conventionally, it has been conceived that the output terminal of the power amplifier circuit is configured using only transistors of the same polarity, that is, NPN type, without making the complimentary type, but setting the idle current is similarly difficult.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and it is easy to set an idle current, obtain a large output, and stably and reliably operate, and very good power amplification suitable for integrated circuit (IC). It is an object to provide a circuit.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

In Fig. 1, reference numeral 11 denotes, for example, an input terminal of a power amplified signal which is made up of 'jack copper'. The input terminal 11 is connected to the base of the PNP transistor Q ₁ and grounded via a resistor R ₁ . The emitter of the T transistor Q ₁ described above is connected to the emitter of the other PNP transistor Q ₂ , and the connection point thereof is connected to an applied power supply terminal 12 of DC voltage + Vcc via a resistor R ₂ .

In addition, the collectors of the transistors Q ₁ and Q ₂ are commonly connected separately through the resistors R ₃ and R ₄ , and the connection points thereof are connected to the power supply terminal 13 to which the DC voltage -Vcc is applied through the resistor R ₅ . have.

The preamplification circuit 14 of the power amplification circuit is constituted by the circuit composed of the resistors R ₁ to R ₅ and the transistors Q ₁ and Q ₂ .

The gal collector and the resistance R _3, R ₄ of the above node between the transistor Q _1, Q ₂ are respectively connected to the base of the NPN type of the transistor Q _3, Q _4. The emitters of the transistors Q ₃ and Q ₄ are commonly connected, and the connection point thereof is connected to the power supply terminal 13 described above via a resistor R ₆ . The collectors of the transistors Q ₇ and Q _{4 described} above are connected to the power supply terminal 12 described above via resistors R ₇ and R ₈ , respectively.

Then, the above-described resistor R ₆ to R ₈ and a transistor Q _3, (15) a drive circuit of a power amplifier circuit rosseoneun circuit consisting of Q ₄ is configured.

Again, the connection point between the collector of transistor Q ₃ and resistor R ₇ is connected to the base of NPN transistor Q ₅ , and the collector of transistor Q ₅ is connected to power supply terminal 12 described above. The emitter of this transistor Q ₅ is connected to the base of another NPN transistor Q ₆ , and the collector of this transistor Q ₆ is connected to the above-described power supply terminal.

On the other hand, a connection point of the collectors of the transistors Q ₄ and the resistor R ₈ is connected to the base of the transistor Q ₇ of the NPN type, is connected to the transistor Q ₈ the base of the emitter another NPN type of the transistor Q _7.

The emitter of the transistor Q ₈ is connected to the power supply terminal 13 described above, the collector of the transistor Q ₈ is connected to the emitter of the transistor Q ₆ described above, and the connection point is connected to the collector of the transistor Q ₇ . have.

The output circuit 16 of the power amplification circuit is constituted by the above-described transistors Q ₅ to Q ₈ .

The transistor base of the one transistor Q ₆ is the common connection transfection indicated emitter Q ₉ and the base of the other NPN type, constituting the emitter resistance R the above-described pre-amplifier through the _seven circuit 14 of the transistor Q ₉ It is connected to the base of Q ₂ .

The connection point between the emitter of transistor Q ₉ and the resistor R ₉ is connected to the connection point between the emitter of transistor Q ₆ and the collector of transistor Q ₈ and at the same time, for example, an output terminal 17 made of a jack or the like. Is connected to the inner terminal 171.

The outer terminal 172 of this output terminal 17 is grounded via a resistor R ₁₀ . Further, the connection point of the base of the transistor Q ₂ and a resistor R ₁₀ is being grounded via a resistor R _10.

On the other hand, the base of the above-described transistor Q ₈ is commonly connected to another NPN transistor Q ₁₀ and the base, and the emitter of the transistor Q ₁₀ is connected to the emitter of the transistor Q ₈ .

The transistor Q ₉ , Q ₁₀ described above constitutes the detection circuit 18 separately for the operating currents of the transistors Q ₆ , Q ₈ of the output circuit 16, and the transistor Q as described above. The feature of the present invention is that the bases ₆ , Q ₈ and the bases of the transistors Q ₉ and Q ₁₀ are commonly connected.

Here, the collector of transistor Q ₉ is connected to the collector of NPN transistor Q ₁₁ and to the base of NPN transistor Q ₁₂ . The base of the transistor Q ₁₁ is connected to the base of the transistor Q ₁₂ , and the emitter of the transistor Q ₁₁ and the collector of the transistor Q ₁₂ are connected together to the power supply terminal 12 described above.

Again, the emitter of the transistor Q ₁₂ is connected to the collector of the transistor Q ₁₀ and to the base of the transistor Q ₁₃ of the PNP type. The emitter of this transistor Q ₁₃ is connected to the emitter of the NPN type transistor Q ₁₄ , and the transistor is connected to the power supply terminal 12 described above with a collector. The collector of the above-described transistor Q ₁₃ is connected to a connection point between the resistors R ₃ and R ₄ and the resistor R ₅ constituting the preamplifier circuit 14 described above.

The circuit composed of the transistors Q ₁₁ to Q ₁₄ synthesizes the output from the transistors Q ₉ Q ₁₀ of the detection circuit 18 to form a relationship described below, and returns to the preamplification circuit 14 described above. The operation feedback circuit 19 is constituted.

In the power amplifying circuit having the above configuration, the overall operation will first be described as follows. That is, if the input terminal 11 is supplied with a power amplification signal of a sinusoidal waveform alternately repeating a positive half cycle and a negative half cycle on the basis of the ground potential, for example, the power amplification signal is a preamplification circuit. It is supplied to the transistor Q ₁ in (14). Here, since the transistors Q ₁ and Q ₂ are common to the emitter, they operate as differential amplifiers, and the negative half cycle and the positive half cycle of the amplified signal described above are amplified from the respective collectors so that the transistor Q of the driving circuit 15 is amplified. _It is output to ₃ and Q ₄ . Then, the current according to the collector output of the transistors Q ₁ and Q ₂ , that is, the amplification current corresponding to the negative half cycle and the positive half cycle of the above-mentioned power amplified signal, is output to the collectors of the transistors Q ₃ and Q ₄ . . The collector outputs of the transistors Q ₃ and Q ₄ of the drive circuit 15 are supplied to the transistors Q ₅ and Q ₇ constituting the output circuit 16, respectively. As a result, an amplification current corresponding to the negative half cycle and the positive half cycle of the above-described power amplified signal flows through the collectors of the transistors Q ₆ and Q ₈ connected to the darling tone with the transistors Q ₅ and Q ₇ , respectively. Is outputted at 17. That is, the output circuit 16 has a push-pull configuration for amplifying the positive and negative half cycles of the power amplified signal, respectively.

Here, the output circuit 16 is supplied with the base currents of the transistors Q ₆ , Q ₈ , that is, the operating current, to the bases of the transistors Q ₉ , Q ₁₀ of the detection circuit 18, respectively.

The collector output currents of the transistors Q ₉ and Q ₁₀ are synthesized by the operational feedback circuit 19 so that the synthesized current is output from the collector of the transistor Q ₁₃ and returned to the preamplification circuit 14 described above.

Here, the detailed operation of the arithmetic feedback circuit 19 will be described. The first, when the transistors Q ₆ and Q ₉ and the transistor Q ₈ and Q ₁₀ and the emitter area ratio of N, transistor Q ₆ operating current Iv, a saturation current of the transistor Q ₁₁ of PNP type Ig _F of diode connected Base of transistor Q ₁₁ . The inter-emitter voltage [V _BE (Q ₁₁ )] is

However, k: Boltzmann constant, T: the charge of the electron, and, if the saturation current of the operation current of the transistor Q ₈ I _L, NPN type transistor Q ₁₂ of the I _SN, the transistor Q _12: the absolute temperature, q Base. The inter-emitter voltage [V _BE (Q ₁₂ )] is given by the following equation.

On the other hand, if the current flowing through the transistors Q ₁₃ and Q ₁₄ is I _F , each base of the transistors Q ₁₃ and Q ₁₄ . The sum of the emitter voltage (V _BE (Q _13)] and [V _BE (Q _14)] in the case of a monolithic IC transistor Q _13, the same saturation current of Q ₁₄ are each type transistor Q _11, the saturation of Q ₁₂ Since it is almost equal to the current, it becomes as follows.

Here, as shown in FIG. 1, the above Equation 3 is equal to the sum of the above [V _BE (Q ₁₁ )] and [V _BE (Q ₁₂ )].

I_U, I₄=

I_L……⑤이므로, 상기 ④식은

……⑥ 으로 된다.Therein, the currents I ₃ and I ₄ flowing through the transistors Q ₉ and Q ₁₀ are defined as I ₃ =.

I _U , I ₄ =

I _L … … Since ⑤, the expression ④ above

… … Becomes ⑥.

Since I _F is fed back to the resistance R ₅ of the preamplifier circuit 14, I _F R ₅ = V _BE (Q ₄ ) + R ₆ (I _Q3 + I _Q4 )-(R ₄ + 5R ₅ )

However, V _BE (Q ₄ ) ≒ V _BE (Q ₃ )

I _Q1 ≒ IQ ₂

V _BE (Q ₄ ), V _BE (Q ₃ ): Each base of transistors Q ₄ , Q ₃ . Emitter Voltage

IQ ₁ , IQ ₂ , IQ ₃ , IQ ₄ : collector current of transistors Q ₁ , Q ₂ , Q ₃ , Q ₄ ,

β: current amplification factor,

Is given as an approximately constant value, and when there is no signal

I _V ≒ I _L

Therefore, the idle currents Ic idle of the transistors Q ₆ and Q ₈ are determined as Ic idle = N × I _F. Here, when the power-amplified signal is supplied to the input terminal 11, if the current I _F of the transistor Q ₆ increases as a negative half cycle of the power amplified signal, for example, the current I _L of the transistor Q ₈ is It decreases, the I _U decreases with the increase of the above-mentioned I _L as a positive half cycle, and eventually the characteristic as shown by the solid line in FIG. 2 is obtained, and the class AB push-pull operation is performed.

It is noted that in the Figure 2, the horizontal axis is the output voltage V, is shown by a chain line 1 that the transistor Q _6, idle current (Ic idle) of Q _8.

Therefore, according to the power amplifying circuit having the above-described configuration, in the integrated circuit IC, as in the prior art, the same gain bandwidth as the lateral (multi-collector) PNP transistor is provided at the output stage of the single-ended push-pull (SEPP) type. The need for using an unstable element with low fr is also high output and high stability. In addition, the output stage can be easily designed even in the case of an emitter ground type complimentary connection, and also eliminates the need for a bootstrap circuit. Moreover, despite the formation of the circuit of the output stage, the idle current of the output transistor can be easily set.

Subsequently, the transistor Q _6, Q ₈ and Q ₉ transistor, between the base of Q ₁₀ to be a feature of the invention described below the effect due to the common connection as follows. That is, in the conventional power amplifier circuit constructed in the manner of the same polarity transistor push-pull, a diode is connected in series with the output transistor to detect the operating current of the transistor. For this reason, the output from the output transistor was reduced by the diode, and there were many disadvantages in operating as a low power supply voltage. In addition, since the large output current of the output transistor flows in the diode, the area of the diode needs to be increased, and when the integrated circuit IC is used, the chip area has to be increased.

However, the transistors in the detection and Q ₈ output of the transistor Q _6, as in the present invention, Q _9, the transistors Q _9, Q ₁₀ for when the common connection of the base to each other of Q _10, eliminating the need for a diode, and the detection the output transistor Q _6, because it operates as a base current of Q ₈ there is no need to be a large current capability, is suitable for integrated circuit (IC) to create a simple configuration screen.

Here, as described above, the relationship between each transistor Q ₆ Q ₈ operating current I _U I _L of the output circuit 16 and each transistor Q ₉ Q ₁₀ output current I ₃ I ₄ of the detection circuit 18 is ideal. (4) It should be as shown in the equation, but in the high current region, parasitic resistance values such as parasitic base resistance and emitter resistance of transistor Q ₆ are affected. For this reason, when a resistor (not shown) having a resistance value N times the parasitic resistance value in series is inserted into the base or emitter of each of the transistors Q ₉ and Q ₁₀ of the detection circuit 18 described above, the transistor Q _The influence of parasitic resistance of ₆ can be compensated for.

In addition, when a resistor having a resistance value equal to or greater than N be of the parasitic resistance is inserted, the operating currents I _U and I _L of the output transistor Q ₆ or Q ₈ on the current reduction side can be increased as shown in FIG. 2 as a dotted line. In addition, crossover distortion or notching distortion may be reduced.

Then, the unit fixes this in the case of using a strap circuit, it is also possible to connect either one of the power terminals 12, 13 connected to the transistor Q ₉ to Q ₁₄ in Buu terminal strap.

Further, when it is able, when the transistor Q ₁₀ current is reduced shed as required base current of the transistor Q ₁₄ has, bonded to each other to the transistor Q ₁₄ base so as to connect a resistor or a constant current source, while the transistor Q ₁₃ an emitter A resistor or a constant current power supply may be connected to the

3 shows another embodiment of the present invention, and shows a case where the transistor of the output terminal is an emitter ground type. In other words, if the positive and negative half cycles of the sinusoidal power amplified signal are supplied to the input terminal 51, respectively, the above-mentioned power amplified signal is transistors Q ₂₁ and Q ₂₂ and transistors Q ₂₃ and Q _24. And are supplied to a preamplification circuit 22 made up of a differential amplification circuit formed by connecting the emitters in common. The amplification current corresponding to the positive half cycle and the negative half cycle of the above-mentioned power amplified signal is output to the collectors of the transistors Q ₂₁ and Q ₂₃ described above. Here, the collector outputs of the transistors Q ₂₁ and Q ₂₃ of the preamplifier circuit 22 are configured by a push-pull method in which Darlington connections of transistors Q ₂₅ and Q ₂₆ and transistors Q ₂₇ and Q ₂₈ are respectively connected. It is supplied to transistors Q ₂₅ and Q ₂₇ of the circuit 23. As a result, an amplification current corresponding to the positive half cycle and the negative cycle of the above-mentioned power amplified signal flows through the transistors Q ₂₆ and Q ₂₈ and is output from the output terminal 24.

Here, the transistor base current of the transistor Q _2, Q ₂₈ of the output circuit 23 that is operating current that the transistor Q _26, between Q ₂₈ and the base constituting the common is connected to the detection circuit 25, respectively, Q _29, It is supplied to the base of Q ₃₀ .

The output currents of the transistors Q ₂₉ and Q ₃₀ are supplied to the operational feedback circuit 26 and each emitter of the transistors Q ₃₃ and Q ₃₄ constituting the constant current circuit 27 in each collector of the transistors Q ₃₁ and Q ₃₂ . Are fed back respectively.

Here, the currents I _F flowing through the transistors Q ₃₁ and Q ₃₂ and the currents I ₅ and I ₆ of the transistors Q ₂₉ and Q ₃₀ satisfy the following equation.

In the above-described configuration, for example, when the idle currents of the transistors Q ₂₆ and Q ₂₈ increase, the currents of the transistors Q ₃₁ and Q ₃₂ also increase, and the preamplification circuit 22 causes the preamplification circuit 22 to increase. It is controlled so that the idle current always remains approximately constant by reducing the idle current of transistor Q ₂₆ .

Therefore, the same effect as the above embodiment can be obtained by the above-described configuration, and since the bases of the transistors Q ₂₆ , Q ₂₈ and the transistors Q ₂₉ , Q ₃₀ are commonly connected, it is also suitable for the integrated circuit Ic. Do.

The feedback of the operation trace circuit is returned to the preamplifier circuit 14 as shown in FIG. 1 or the constant current circuit 27 as shown in FIG. 3, and in the case of FIG. 1, the driving circuit 15 and the second circuit. In the case of Fig. 1, the preamplification circuit 22, which is a load circuit of the constant current circuit 27, may be returned.

Incidentally, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope thereof.

Therefore, as described in detail above, according to the present invention, these currents can be easily set, large output can be obtained, stable or reliable operation can be performed, and very good power amplification suitable for integrated circuit (Ic) can be achieved. A circuit can be provided.

Claims (1)

First and second transistors for push-pull output, third and fourth transistors for separately detecting operating currents of the first and second transistors, and detection currents of the third and fourth transistors, respectively. About by I ₃ , I ₄

And a computing circuit for outputting a current I _F which is to, in a power amplifier circuit with a feedback circuit for the output current I _F of the operational circuit functions so as to maintain substantially constant, said first and above a transistor of the second A power amplifier circuit comprising the base electrodes of the third and fourth transistors connected in common.

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