JPS62171308A - Differential amplifier - Google Patents

Abstract

PURPOSE:To amplify an input signal which has a large amplitude with good linearity by providing two auxiliary differential amplifiers which share a load resistance with a conventional differential amplifier and are applied with a bias in the opposite directions. CONSTITUTION:Transistors (TR) 21 and 22, a resistance 40, and low current sources 31 and 32 constitute a main differential amplifier. The collectors of TRs 23 and 24 are connected to output terminals 15 and 16 respectively to form the 1st auxiliary differential amplifier. The base of a TR 25 is connected to the base (input terminal 11) of the TR 21 through a bias voltage 75 (voltage value VB5) and the base of a TR 26 is connected to the emitter of the TR 22 through a bias voltage 76 (voltage value VB6); and the collectors of the TRs 25 and 26 are connected to output terminals 15 and 16 respectively to form the 2nd auxiliary differential amplifier.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to improvements in differential amplifiers, and particularly relates to differential amplifiers suitable for handling large amplitude signals.

For example, the present invention provides a differential amplifier that is extremely suitable for generating 1q of large (film width) signals with little distortion for deflecting the X-axis or Y-axis of a cathode ray tube in an oscilloscope.

[Conventional technology] A conventional differential amplifier circuit is shown in FIG. 4 and will be explained.

Here, 11 and 12 are input terminals to which a signal source 13 with a signal voltage of E3 and a signal source 14 with a signal voltage of opposite polarity -E are input, respectively.

Input terminals 11 and 12 are connected to transistors 21 whose respective emitters are coupled by a resistor 40 (resistance value R8).
and 22. A bias current I is applied to each emitter of the transistors 21 and 22, respectively.

Constant current sources 31 and 32 are connected to flow the current. Resistors 43 (resistance value R3) and 44 (resistance value R4) for loads are connected between the respective collectors of transistors 21 and 22 and the power supply voltage of 10V, and the voltages from the collectors of both transistors 21 and 22 are connected. , output terminals 15 and 16 are provided for obtaining outputs, respectively.

Generally, the emitter spread resistance r8 of a transistor is approximately expressed as re[Ω]=26/lE[mA] (1), where IE is the emitter current of the transistor.

In FIG. 4, when the voltages of signal sources 13 and 14 are zero, the emitter current of each transistor 21 and 22 is I, respectively. It is. Here, when the voltages of the signal sources 13 and 14 are E and -E, the emitter currents of the transistors 21 and 22 are I+I and I-1, S. where I is the signal current at the emitter due to the signals @E s and -E.

Letting the emitter spread resistances of transistors 21 and 22 be r and 'e2, respectively, then from equation (1), r -26/(I +1) (2) el
e5re2=26/R8-I,) (3).

As shown in equations (2) and (3), if the signal current I is small with respect to the bias current I, the changes in the emitter spread resistances r.1 and r.2 can be ignored, but When the signal current I3 becomes too large, changes in the emitter spread resistances r.1 and r.2 cannot be ignored.

The voltage series 11i of this differential amplifier is G= (R3+R4)/(R(> +reI+rc2
> is expressed.

Problems to be Solved by the Invention The voltage gain G of a differential amplifier is expressed by equation (4), where r is included in the denominator. 1 and r. 2 is the signal voltage E of the signal source 13.14 as shown in equations (2) and (3),
As the value of increases, the emitter spreading resistance r. 1 and r.

Since the sum of 2 increases, the voltage gain G decreases. That is, there is a problem in that linearity deteriorates and the waveform becomes distorted for input signals of large amplitude.

[Means for Solving the Problems] The present invention has been made in order to solve these problems, and is to provide a conventional differential amplifier with a load resistance common to that of the conventional differential amplifier. Two sets of auxiliary differential amplifiers were provided with their biases shifted in opposite directions.

[Function] When the amplitude of the input signal is small, the two sets of auxiliary differential amplifiers are not in a balanced state due to the bias applied, so they do not operate as amplifiers, and only the conventional differential amplifier operates. do.

For example, when there is a large positive amplitude input signal, one of the auxiliary differential amplifiers becomes active and adds its amplification effect in addition to the amplification effect of the conventional differential amplifier. Furthermore, when there is an input signal with a large negative amplitude, the auxiliary differential amplifier used becomes active and adds its amplification effect in addition to the amplification effect of the conventional differential amplifier. In this way, the auxiliary differential amplifier becomes active and amplifies only large-amplitude input signals.
Since the reduction in the amplification effect of the conventional differential amplifier when the input signal has a large amplitude is compensated for, even a large amplitude input signal can be amplified with good linearity.

[Example] An embodiment of the present invention is shown in FIG. 1A and will be described.

Components corresponding to those shown in FIG. 4 are given the same symbols and numbers in FIG. 1A.

! - transistors 2] and 22, resistor 40, and low current sources 31 and 32 form a main differential amplifier.

The transistors 23 and 24 are coupled between their emitters by a resistor 41 (resistance value R1), and a constant current source 33 (current value I.Q) and a current value I. . ) are connected to each other, and the base of the transistor 23 is connected to a bias voltage 73 (voltage value VB, ).
1- to the emitter of the transistor 21 and the base of the transistor 24 to the bias voltage 74 (voltage value V134)
is connected to the base of transistor 22 (input terminal 12) through
They are connected to output terminals 15 and 16, respectively, and form a first auxiliary differential amplifier.

The transistors 25 and 26 have both emitters coupled by a resistor 42 (resistance value R2), and constant current sources 35 (current value I.0) and 3
6 (current value I...) are respectively connected, and the base of the transistor 25 is connected to the base of the transistor 21 (input terminal 11) via a bias voltage 75 (voltage value V85).
The base of the transistor 26 is connected to the emitter of the transistor 22 via a bias voltage 76 (voltage value V86), the collectors of the transistors 25 and 26 are connected to the output terminals 15 and 16, respectively, and the second auxiliary differential It acts as an amplifier.

Now, regarding the first auxiliary differential amplifier, assuming that the base-emitter voltages of the transistors 21 to 26 are all equal to VBE, the signal source 13; When the signal voltages of 3 and 14 are zero, the base voltage of transistor 23 is less than the base voltage of transistor 24, V B
3 + V 840 V BE (B is a low value. Therefore, ■ ・R ■ B3 + V134 + ■ 8. (5) e
If 1°o, R1, VB3 and VB4 are set so that
Transistor 24 also has no amplification effect. In this state, even if signal voltages E and -F are applied to terminals 11 and 12, 2Es +Ice-R1 83-'-v84+VBE
In the range of , the transistor 23 is in the cutoff region and the transistor 24 also does not perform an amplifying action, so the first auxiliary differential amplifier does not operate.

In the second auxiliary differential amplifier including transistors 25 and 26, transistor 25 corresponds to 24, transistor 26 corresponds to 23, resistor 42 (R2) corresponds to 41 (R1), and constant current sources 35 and 36 correspond to 346 and 23, respectively. 33, so it does not operate for small signal voltages, similarly to the first auxiliary differential amplifier.

Therefore, when the signal voltage E is small, it operates like a conventional differential amplifier. For example, the signal voltage E increases in the positive direction so that 2 Es + Iee゛R1>VI33+VB4+VB
When the condition of Equation (6) is no longer satisfied, the amplification degree of the main differential amplifier including the transistors 21 and 22 decreases, but the transistors 23 and 24 enter the active region and the first auxiliary differential amplifier operates. resistor 43 (first load means>,
44 (second load means), linearity is improved and waveform distortion is significantly reduced.

When the signal voltage ffEE increases in the negative direction, the second auxiliary differential amplifier similarly operates to remove waveform distortion.

When the circuit shown in Fig. 1A is applied to an amplifier for deflecting the Y axis of a cathode ray tube of a wideband oscilloscope, the result is as follows.
At full scale on the tube surface, the conventional waveform distortion of about 10% has become about 2%.

Figure 1B shows a case where the second auxiliary differential amplifier is omitted and the first auxiliary differential amplifier is combined with the main differential amplifier, which is effective when the signal voltage E3 has a large amplitude only in one direction. be.

In FIGS. 1A and 1B, the collectors of the transistors 23 to 26 of the first and second auxiliary differential amplifiers may be connected to the output terminals 15 and 16 through filters, respectively or in part thereof. These filters have frequency characteristics by a combination of resistors, inductances, capacitors, etc., and are necessarily effective when trying to obtain 1q of the effects of the present invention in the frequency region determined by the characteristics of these filters.

It will also be apparent that resistor 41 (R1) and resistor 42 (R2) may have different values to provide asymmetric distortion correction for positive and negative large Jlfi width input signals.

In the above, the case has been explained in which the voltages of the signal sources 13 and 14 are F and -E, respectively, or only one of the signal sources 13, for example, is applied to the input terminal 11, and the input terminal 12 is grounded. You may. Alternatively, one signal source may be connected between input terminals 11j3 and 12. Further, the signal sources 13 and 14 may exhibit completely different voltage values.

Furthermore, the signal voltage may not be applied to either one of the input terminals of the first auxiliary differential amplifier, but a fixed voltage may be applied. Similarly, no signal voltage may be applied to either input terminal of the second auxiliary differential amplifier, and a fixed voltage may be applied.

The bias voltage means 73 to 76 shown in FIGS. 1A and 1B may be replaced with the various bias voltage means shown in FIG. It is also possible to connect directly by line.

Figure 2(a) shows a transistor 8 forming an emitter follower.
1 and a constant current source 89 are shown. An emitter like this
In addition to the follower, a resistor is used instead of the constant current source 89,
Furthermore, it will be obvious that even if an amplifier is used in which a resistor is inserted between the collector of the transistor 81 and the power supply +V, the voltage between the base and emitter of the amplifier can be used as a bias voltage means. (b) uses a diode 82 to use the voltage between its anode and cathode as a bias voltage means; similarly, 83 uses a resistor 83, and 84 uses a constant voltage diode 84 as a bias voltage means. In (e), a field effect transistor 85 is used in place of the transistor 81 shown in (a). In FIG. 2, it is also possible to use a PNP transistor for the transistor 81 and a P-channel transistor for the field effect transistor 85, or to reverse the polarity of the diode 82 and the constant voltage diode 84 from those shown, and to use the constant current source 89. It will be clear that the polarity of the power supply voltage and the polarity of the power supply voltage may be reversed.

In FIGS. 1A and 1B, resistors 43 and 44 as load means are used for the output terminals 15 and 16, but these may include active elements as shown in FIG. 3.

In FIG. 3, the l-transistors 27 and 28 are each connected to the base ground, and in (a), the l-transistors 27 and 28 are
1 current output from each collector of Herangis 27 and 28! I can do something. In FIG. 3(b), i~
A current output of 1q can be obtained from the collector of the transistor 27. In FIG. 3(C), transistor 27. of FIG. 3(a). Resistors 45 and 46 are connected between the collectors of B and 2B and the power supply 1, respectively.
A voltage output 17 is available from each collector of transistors 27 and 28.

In FIGS. 3(d) to (f>), 51 and 52 are operational amplifiers, 29 and 301J are transistors, and 61 and 62 are impedances for parallel feedback.

In FIG. 3(d) to (f), the operational amplifier 51d3
and 52 are output terminals 15iJ'3, respectively.
and 16, and operational amplifiers 51 and 52.
A voltage output can be output to one output terminal of the circuit. (e
) are transistors 29 and 3 whose emitters are connected to ground.
Each base of 0 is connected to output terminals 15 and 16, respectively, and an output voltage can be obtained at each collector. (f) is a combination of (d) and (e).

When the load means shown in FIGS. 3(d) to 3(f) are used in FIGS. 1A to 1D, when signal voltages E3 and -E3 are applied between input terminals 11 and 12 and ground, respectively, is the amplified signal current I flowing to output terminals 15 and 16, and r is the emitter spreading resistance of transistors 21a3 and 22, respectively. 1 and r. If it is 2,
I =2E, / (R□ +ro1+ro2).

Therefore, if the respective values of the impedances 6iJ and 62 are Z "IJ"; and Zr2, then the A amplifier 51
The signal voltages EOI and [02 of each output of transistors 29 and 30 (collectors of transistors 29 and 30) are [EO1=I, -Zfl (9) E:o
2=1. - Z(2(10)).

Even in the cases shown in FIGS. 3(d) to (f), one of the load means connected to each of the output terminals 15 and 16 may be omitted as shown in FIG. 3(b). Alternatively, one of the load means can be replaced by a resistor or a transistor whose base is connected to ground.

In FIG. 3, it is also possible to replace all or part of transistors 27-30 with field effect transistors.

[Effects of the Invention] As is clear from the above description, according to the present invention, it is possible to significantly reduce the distortion of a differential amplifier when the amplitude is large, and the effect is extremely large.

[Brief explanation of drawings]

1A and 1B are circuit diagrams showing an embodiment of the present invention, FIGS. 2 and 3 are circuit diagrams not showing other embodiments of the present invention, and FIG. 4 is a circuit diagram showing a conventional example. be. 11.12... Input terminal 13.14... Signal source 15.16... Output terminal 21-30... Transistor 31-36... Constant current source 40-46... Resistor 51.52 ...Essential amplifier 61.62...Impedance 73-76...Bias voltage 81...Transistor 82...Diode 83
... Resistance 84 ... Constant voltage diode 8
5... Field effect l/ransistor 89... constant current source E,... signal voltage.

Claims (11)

[Claims] (1) a first input terminal and a second input terminal between which an input signal is applied; respective bases connected to the first input terminal and the second input terminal; and respective collectors connected to the first input terminal and the second input terminal; is the first
a first transistor connected to the output terminal of the first transistor and the second output terminal, an emitter resistor extending between the emitters thereof, and a constant current means for supplying an emitter current to the emitters of the first transistor; main differential amplification means comprising a second transistor; bias voltage means on at least one of the emitter of the first transistor and the base of the second transistor, one base of which may contain zero volts; connected through the first output terminal and the second output terminal, each of which has a collector current supplied through the first output terminal and the second output terminal, and is connected to a first resistor that spans between the emitters of each other, and supplies an emitter current to the emitters of the other. a first auxiliary differential amplifier including a third transistor and a fourth transistor connected to constant current means for controlling the output of at least one of the first output terminal and the second output terminal; and at least one load means connected to the terminals. (2) one base is connected to at least one of the base of the first transistor and the emitter of the second transistor via bias voltage means which may include zero volts, and the respective collector current is connected to the base of the first transistor and the emitter of the second transistor; through a first output terminal and the second output terminal;
a second auxiliary differential amplifier including a fifth transistor and a sixth transistor connected to a second resistor spanning between their emitters and connected to constant current means for supplying emitter current to the emitters of each other; A differential amplifier according to claim 1, comprising: (3) At least one of the collectors of the third and fourth transistors is connected to at least one of the first and second output terminals via at least one filter means. A differential amplifier according to claim 1. (4) The differential amplifier according to claim 1, wherein the at least one load means is at least one resistor. (5) The at least one load means is a transistor whose base is connected to a common ground, and the emitter of the transistor is connected to at least one of the first and second output terminals. A differential amplifier according to range 1. (6) The at least one load means is a field effect transistor whose gate is connected to ground, and the source of the field effect transistor is connected to at least one of the first and second output terminals. A differential amplifier according to claim 1. (7) The at least one load means is a common emitter-connected transistor having a parallel feedback impedance, and the base of the transistor is connected to at least one of the first and second output terminals. A differential amplifier according to claim 1. (8) said at least one load means is a field effect transistor having a parallel feedback impedance and whose source is connected to ground, the gate of said field effect transistor being connected to at least one of said first and second output terminals; A differential amplifier according to claim 1, wherein the differential amplifier is connected to two output terminals. (9) A patent in which the at least one load means is an operational amplifier having a parallel feedback impedance, and the input of the operational amplifier is connected to at least one of the first and second output terminals. A differential amplifier according to claim 1. (10) The bias voltage means, which may include zero volts, includes a connection line, a battery, a voltage between the base and emitter of a transistor, a voltage between electrodes of a diode, a voltage drop of a resistor, a voltage between the electrodes of a constant voltage diode, and 3. The differential amplifier according to claim 1, wherein the differential amplifier includes at least one of those using a gate-source voltage of a field effect transistor. (11) At least one of the collectors of the third, fourth, fifth, and sixth transistors is connected to at least one of the collectors of the third, fourth, fifth, and sixth transistors.
3. A differential amplifier according to claim 2, wherein the differential amplifier is connected to at least one of the first and second output terminals through two filter means.