JP2716285B2 - Debug device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a debugging device, and more particularly, to a debugging device having a host computer and an in-circuit emulator for performing circuit functions of a system to be debugged and supporting debugging.

[0002]

2. Description of the Related Art As a first example, as shown in FIG. 3, a conventional debugging apparatus of this type includes a host computer 5 for debugging, and an in-circuit circuit for substituting circuit functions of a system to be debugged and supporting debugging. An emulator 6 was provided.

[0003] The host computer 5 includes a microprocessor 12, a memory 13, and a system bus 14. The in-circuit emulator 6
A target device bus controller 24 connected to the system bus 14 of the host computer 1; a target device ROM 25;
6 and a trace memory 27 and the like.

Next, the operation of the first example of the conventional debugging device will be described.

The exchange of the host computer 5 with the internal information of the in-circuit emulator 6 is performed as follows. The in-circuit emulator control software on the host computer 5 directly accesses the target device bus controller 24 of the in-circuit emulator 6 via the system bus 14. Therefore, during this access, it is necessary to consider that data transfer to other hardware running on the system bus 14 does not interfere with each other.

In order to solve this drawback, there is a debugging device shown in a second example described below. As shown in FIG. 4, the debugging device of this second conventional example includes a host computer 7, an in-circuit emulator 8, and a communication line 9 for transmitting serial data of information between the two. Was.

The host computer 7 includes a microprocessor 12, a memory 13, and a system bus 14 similar to those of the first example, and a serial communication control unit 71. The in-circuit emulator 8 includes a target device bus controller 24 similar to the first example.
, A target device ROM 25, a target device RAM 26, a trace memory 27, and the like, a serial communication control unit 81, a microprocessor 22,
The configuration includes a memory 23 and a system bus 28.

Next, the operation of the debug device of the second conventional example will be described.

In this case, the exchange of the host computer 7 with the internal information of the in-circuit emulator 8 is performed as follows. First, a command for exchanging internal information of the in-circuit emulator 8 is sent from the host computer 7 to the in-circuit emulator 8 via the communication line 9. Next, the microprocessor 22 of the in-circuit emulator 8 interprets and processes the command, and transmits the contents of the internal information specified by the command from the in-circuit emulator 8 to the communication line 9 again.
Is sent back to the host computer 7 via the. In this case, the data transmission speed of the communication line 9 is much lower than that of the system bus 14 or the like. Met.

[0010]

In the above-mentioned conventional debugging device, in the first example, the in-circuit emulator control software on the host computer directly accesses the in-circuit emulator via the system bus. It has the disadvantage that during this access it must be taken into account that it does not interfere with the data transfer to other hardware running on the system bus.

In the second example for solving this drawback, since data is transferred through a serial communication line having a low data transfer speed, when a large amount of data is exchanged, the in-circuit emulator control software is required. It has the disadvantage of poor responsiveness.

[0012]

SUMMARY OF THE INVENTION A debugging device of the present invention operates on an operating system having an auxiliary storage device processing means and performs debugging by using a host computer and an in-circuit which substitutes circuit functions of a debugging target system and supports debugging. A debugging device comprising an emulator and the emulator ;
A first auxiliary storage device control circuit for controlling the in-circuit emulator as a first auxiliary storage device via a bus , wherein the in-circuit emulator comprises:
Via the data bus comprises a second auxiliary storage device control circuit for controlling the host computer as a second auxiliary storage device, the host computer, the data bus
And the internal information of the in-circuit emulator is exchanged via the auxiliary storage device processing means of the operating system.

[0013]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a debugging device according to the present invention.

As shown in FIG. 1, the debugging device according to the present embodiment includes a host computer 1 for debugging, an in-circuit emulator 2 for substituting circuit functions of a system to be debugged and supporting debugging, and an auxiliary storage device 3. And a data bus 4 for connecting the host computer 1, the in-circuit emulator 2, and the auxiliary storage device 3.

The host computer 1 has an auxiliary storage device 3
And the like, an auxiliary storage device control circuit 11, a microprocessor 12, a memory 13, and a system bus 14.

The in-circuit emulator 2 has an auxiliary storage control circuit 21 similar to the auxiliary storage control circuit 11.
A microprocessor 22, a memory 23, a target device bus controller 24, a target device ROM 25, a target device RAM 26,
It comprises a trace memory 27 and the like, and a system bus 28.

The microprocessor 12 of the host computer 1 controls the overall operation of the host computer 1. System bus 1 of microprocessor 12
4 is a memory 1 in which an operating system and in-circuit emulator control software are stored.
3 and an auxiliary storage control circuit 11 controlled by an operating system. This auxiliary storage control circuit 1
1 is connected to an auxiliary storage device 3 via a data bus 4, and further connected so that the in-circuit emulator 2 can be regarded as one of the auxiliary storage devices.

The microprocessor 22 of the in-circuit emulator 2 includes, via a system bus 28, a memory 23 in which internal resource management software S22 (described later) is stored, and a target device ROM 25 which is an internal resource of the in-circuit emulator 2. And a target device bus controller 24 for connecting a target device RAM 26 and the like.

Next, the operation of this embodiment will be described.

FIG. 2 is a software block diagram showing the software system of this embodiment.

As shown in FIG. 2, the software system of this embodiment includes two parts, a software block S1 of the host computer 1 and a software block S2 of the in-circuit emulator 2.

The software block S1 of the host computer 1 includes an in-circuit emulator control software S11 and an auxiliary storage device control software S121.
And an operating system S12 having the following. The software block S2 of the in-circuit emulator 2 includes auxiliary storage device control software S21 and internal resource management software S22 for managing internal resources as files.

The mutual information exchange is performed by the respective auxiliary storage device control software S121 and S21. It should be noted here that the auxiliary storage device is not directly controlled by the in-circuit emulator control software S11 in the software block S1 of the host computer 1, but the auxiliary storage device control software S121 of the operating system S12 is used.

The software block S2 of the in-circuit emulator 2 exchanges information between the auxiliary storage device control software S21 and the internal resource management software S22. The internal resource management software S22
The target device ROM 25 and the target device RAM 2 which are internal resources of the in-circuit emulator 2
6 and the trace memory 27 are managed as files.

[0026]

As described above, in the debugging device of the present invention, both the host computer and the in-circuit emulator each have the auxiliary storage device control circuit for mutually controlling each as an auxiliary storage device, and the host computer Exchanges the internal information of the in-circuit emulator via the data bus via the auxiliary storage processing means of the operating system, so that both system buses are separated from each other. The data transfer to the hardware does not interfere with each other, and the data transfer speed can be improved because the data transfer is performed via a data bus faster than the serial communication line.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of a debugging device of the present invention.

FIG. 2 is a software block diagram illustrating an example of a software system in the debugging device according to the embodiment.

FIG. 3 is a block diagram illustrating an example of a conventional debugging device.

FIG. 4 is a block diagram showing a second example of a conventional debugging device.

[Explanation of symbols]

 1, 5, 7 Host computer 2, 6, 8 In-circuit emulator 3 Auxiliary storage device 4 Data bus 9 Communication line 11, 21 Auxiliary storage device control circuit 12, 22 Microprocessor 13, 23 Memory 14, 28 System bus 24 Target device Bus controller 25 Target device ROM 26 Target device RAM 27 Trace memory

Continuation of the front page (56) References US Pat. No. 4839812 (US, A) US Pat. No. 4,748,875 (US, A) Nikkei Electronics, Nikkei BP, 1991-6-10 (Accepted date of the JPO archives 1991-6-7), NO. 529, p. 198, 203, 232 "Special Feature: Realization of Personal Computer LAN", Interface, CQ Publishing Company, August 1988, NO. 135, NO. 135, p. 148-243 Transistor Technology, CQ Publishing Company, 1991-5, 28, 5, p. 28-29, "ICE Compatible with 80960CA with an Operating Frequency of 40 MHZ", Nikkei Electronics, Nikkei BP, 1991-6-10 (Acceptance date of the JPO archives 1991-6-7), NO. 261

Claims (1)

(57) [Claims] 1. A debugging device comprising: a host computer which operates under an operating system having an auxiliary storage device processing means and performs debugging; and an in-circuit emulator which substitutes a circuit function of a debugging target system and supports debugging. A computer includes a first auxiliary storage device control circuit that controls the in-circuit emulator as a first auxiliary storage device via a data bus, and the in-circuit emulator connects to the data bus.
A second auxiliary storage device control circuit that controls the host computer as a second auxiliary storage device via the data bus , wherein the host computer is connected to the auxiliary storage device of the operating system via the data bus. A debug device for exchanging internal information of the in-circuit emulator via device processing means.