JP2664578B2 - Video signal playback method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention displays, on a reproduction screen, a video signal obtained from a solid-state imaging device in which the number of rows of light receiving pixels is different from the number of horizontal scanning periods set in a vertical scanning period. The present invention relates to a method for reproducing a video signal.

[0002]

2. Description of the Related Art In a CCD solid-state image pickup device mounted on an image pickup device such as a television camera, the type of the image pickup device is considered at the stage of element design, and the number of pixels and the pixel pitch are set so as to correspond to the television system. Is done. For example, in the solid-state imaging device corresponding to the NTSC system, the number of rows of the light receiving pixels is set to 485 to 525, and in the solid-state imaging device corresponding to the PAL system, the number is set to 575 to 625. Then, a vertical synchronizing signal and a horizontal synchronizing signal for setting a horizontal scanning period of 262.5 (NTSC system) or 312.5 (PAL system) within each vertical scanning period corresponding to each television system are created, The drive timing of the element is determined based on these synchronization signals.

A solid-state image pickup device having a large number of pixels requires a high degree of integration.
Adapting to the system increases manufacturing costs and raises the price of TV cameras. In view of this, the present applicant has proposed a method of configuring an imaging device using a solid-state imaging device having a small number of pixels in Japanese Patent Application No. 1-337359. According to this method, the number of rows of light receiving pixels of the solid-state imaging device can be reduced to half of the number of horizontal scanning periods set in the vertical scanning period, so that the manufacturing cost of the imaging device can be reduced. Will be possible.

[0004]

However, in the above-described imaging apparatus, the number of pixels of the solid-state imaging device is associated with the television system, and therefore, the solid-state imaging device corresponding to a specific television system is different. There is no compatibility between television systems, and for example, a solid-state imaging device corresponding to the PAL system cannot be operated by a synchronization signal corresponding to the NTSC system. For this reason, the applicable range of the solid-state imaging device is limited, which results in an increase in cost.

In general, when a video signal format is converted, video information corresponding to a display position of a horizontal scanning line according to the converted television format is obtained by a linear interpolation process based on the video signal of the television format before the conversion. It is composed of In this linear interpolation processing, the arithmetic processing is repeated for the digitally converted video signal in units of one screen,
By calculating the video signal corresponding to the predetermined position,
A video signal of a desired format is created. In such an arithmetic processing, a large-scale arithmetic circuit is required because it is desired to process a large amount of data at a high speed, and a signal processing device for converting a format of a video signal becomes complicated. Therefore, even if the cost on the camera side is reduced by applying a specific solid-state imaging device to a plurality of television systems, the cost of the circuit portion at the stage of video signal processing increases, and the overall system has a low cost. Price cannot be expected.

Accordingly, the present invention provides an image pickup apparatus using a solid-state image pickup device corresponding to a specific television system, which can be driven by a plurality of television systems, thereby reducing costs on the image pickup apparatus side and simultaneously performing signal processing. The purpose is to enable cost reduction on the side.

[0007]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and is characterized in that the number of horizontal scanning periods set in a vertical scanning period is reduced. In a reproduction method for displaying a video signal obtained by transferring and outputting video information from a solid-state imaging device having a small number of rows of light-receiving pixels in an imaging region in accordance with scanning lines on a screen, the transfer output of the solid-state imaging device is periodically changed. While stopping in a predetermined horizontal scanning period, the video information sequentially output from the solid-state imaging device is alternately stored in two line memories, and the two video information and the two video information read from these line memories are read every horizontal scanning period. It is another object of the present invention to selectively linearly combine two pieces of information of one piece of video information output from the solid-state imaging device at a predetermined ratio, and to display the combined video information along the scanning line.

[0008]

According to the present invention, in the horizontal scanning period during which the transfer output of the solid-state imaging device is stopped, the video information read from the two line memories is synthesized to obtain a video signal, and the video information is output from the solid-state imaging device. Is output, the video information is synthesized with the video information read from one of the two line memories to obtain a video signal. Further, during a horizontal scanning period during which video information is output from the solid-state imaging device, the video information is written to the other of the two line memories. Therefore, each line memory operates efficiently, and the process of arithmetic processing is simplified.

[0009]

FIG. 1 is a diagram for explaining a video signal reproducing method according to the present invention. FIG. 2 shows the correspondence between video information output from a solid-state image sensor and video signals forming a reproduced screen. FIG. Here, the EI from the solid-state image sensor corresponding to the CCIR method (corresponding to the PAL method)
A case where a video signal corresponding to the A system (corresponding to the NTSC system) is obtained is shown. The light receiving section of the solid-state imaging device is
The number of rows of light receiving pixels is reduced to half the number of horizontal scanning lines.

The output of the solid-state imaging device is stopped in the 2H period of the 5H period, and at this time, the horizontal scanning period is compressed to 3/5. That is, since the number of rows of light receiving pixels of the solid-state imaging device is ／ of the number of horizontal scanning periods set in the vertical scanning period, solid-state imaging is performed in the second and fourth horizontal scanning periods of a continuous 5H period. Stop the line shift of the element,
The video information is output during the H period. Therefore,
The output of the solid-state imaging device is associated one-to-one with the virtual output obtained when the solid-state imaging device is operated according to the original CCIR method. The video information I _1, I ₂ · · · of this output is stored alternately in the first line memory and the second line memory, image information I ₁ to be read in the subsequent 2H period from the line memories, By synthesizing I ₂ ... At a predetermined ratio, video information L ₁ , L ₂ . Read / write signals R / W1 and R / W1 for controlling the operation of each line memory
W2 (the write state is set when it is "1" and the read state is set when it is "0") is the video information I ₁ , I ₃
.. And the video information I ₂ , I _4, ..., The line memory is in the writing state in the 1H period, and is in the reading state in the following 2H period. Here, each video information I ₁ , I _2.
Are combined so that the display positions of the horizontal scanning lines on the playback screen correspond to the positions where the virtual output video information R ₁ , R ₂ ... Are displayed, and the virtual output video information R ₁ , R _2. Set to maintain linearity with respect to. Specifically, when the horizontal scanning period is compressed to 3/5, each video information L ₁ , L _2.
Is calculated by the following equation.

L _5n−4 = I _3n−2 (L ₁ = I ₁ ) L _5n−3 = 0.4I _3n−2 + 0.6I _3n−1 (L ₂ = 0.
_{4I 1 + 0.6I 2) L 5n} -2 = 0.8I 3n-1 + 0.2I 3n (L 3 = 0.
_{8I 2 + 0.2I 3) L 5n} -1 = 0.2I 3n-1 + 0.8I 3n (L 4 = 0.
2I ₂ + 0.8I ₃ ) L _5n = 0.6I _3n + 0.4I _{3n + 1} (L ₅ = 0.
6I ₃ + 0.4I ₄ ) (n = 1, 2, 3,...) Therefore, the calculation is repeated in the 5H cycle, and the horizontal scanning period is set for the virtual output video information R ₁ , R _2. 3/5 video information L ₁ , L ₂ ...
Can be obtained. This makes it possible to obtain a video signal according to the EIA method while using a solid-state imaging device compatible with the CCIR method.

FIG. 3 is a diagram for explaining a method of reproducing a video signal corresponding to interlaced scanning. The A field corresponds to the arithmetic processing operation shown in FIG. First, the video information L _A1 , L _A2 ... Output in the A field is obtained through the same arithmetic processing as the video information L ₁ , L ₂ . _Are calculated from the video information I ₁ , I _2, ... So as to correspond to the video information R _A1 , R _A2 . That is, each of the video information L _A1 , L _A2 ... Is calculated by the following equation.

LA _(5n-4) = IA _(3n-2) LA _(5n-3) = 0.4IA _(3n-2) + 0.6IA _(3n-1) LA _{(5n-2) )} = 0.8IA _(3n-1) + 0.2IA _(3n) LA _(5n-1) = 0.2IA _(3n-1) + 0.8IA _(3n) LA _(5n) = 0. 6IA _(3n) + 0.4IA _{(3n + 1)} Also, video information L _B1 , L _B2.
··· are obtained through the same arithmetic processing as that of the A field at a timing shifted by 2.5H from the A field, and each of the video information L _B1 , L _B2.
It is calculated by the following equation so as to correspond to _B1 , R _B2 .

[0014] _{L B (5n-4) =} 0.8I B (3n-2) + 0.2I B (3n-1) L B (5n-3) = 0.2I B (3n-2) + 0.8I B _{(3n-1) L B (} 5n-2) = 0.6I B (3n-1) + 0.4I B (3n) L B (5n-1) = I B (3n) L B (5n) = 0. _{4I B (3n) + 0.6I B} (3n + 1) or more, the image information L _A1 obtained by such processing as L
_{Since A2} ..., L _B1 , L _B2 ... _Are each subjected to linear interpolation processing, the display position of the horizontal scanning line corresponding to each image information may not be inverted with respect to the subject image. Instead, a playback screen faithfully corresponding to the subject image is configured. Therefore, the resolution in the vertical direction is improved by the interlaced scanning of the solid-state imaging device, and the light receiving pixels of the solid-state imaging device are effectively used.

FIG. 4 is a block diagram showing a configuration of a signal processing circuit for performing a linear interpolation process on a video signal. FIGS. 5 and 6 are timing diagrams showing operations in an A field and a B field. is there. The line shift signal SH that determines the line shift timing of the solid-state imaging device is
Of the continuous 5H, the second and fifth (in the B field,
The line shift is set to stop during the third and fifth horizontal scanning periods, whereby the first, third and fourth (first, second and fourth in the B field) of 5H are set.
Video information I _A1 from the solid-state imaging device only horizontal scanning period, I _A2 ···, I _B1, configured as I _B2 · · · are sequentially output. Thus, the video signal YA0 obtained from the solid-state imaging device, image information _{I A1, I A2 ···, I} B1,
_IB2 ... _Are the first, third and fourth (in the B field,
The first, second and fourth) horizontal scanning periods are superimposed.

The two line memories 11 and 12 are digital
Information I of the video signal YA0 converted to video data_A1,
I_A2..., I_B1, I_B2... are stored alternately in 1H units
Video information at the timing delayed by 1H and 2H.
The signals are output as signals YA1 and YA2. These line notes
Read / write signal R /
W1 and R / W2 are synchronized with the video signal YA0 and are the same as in FIG.
And the video information I _A1, I_A3..., I_B1, I_B3・ ・
. And video information I_A2, I_A4..., I_B2, I_B4...
Correspondingly, it becomes "1" and "0" in the following 2H
Is set. Thus, the video signals YA1 and YA2 are
The video information I is stored in the line memories 11 and 12._A1, I_A2...
I_B1, I_B2... is the same as 2H next to 1H in which is written
Information is repeatedly superimposed.

The video signals YA1 and YA2 obtained from the line memories 11 and 12 are input to the selector 13 together with the video signal YA0, and two of them (in some cases, 1
) Are input to the multiplication circuit 14. The multiplication circuit 14 includes five multipliers 14a to 14e whose multipliers are set in stages from 0.2 to 1.0 (in the case of a multiplier of 1.0, there is no need for multiplication processing, and there is no multiplier 14e). Good)
The video signal YA0 selectively input from the selector 13,
YA1 and YA2 are multiplied by a predetermined multiplier (0.2 to 1.0) and output. As for the output of the multiplying circuit 14, the output of the multiplier 14a (multiplier 0.2) and the output of the multiplier 14d (multiplier 0.8) are added by the adder 15a.
The output of the multiplier 14b (multiplier 0.4) and the output of the multiplier 14c (multiplier 0.6) are added by the adder 15b and input to the selector 16 together with the output of the multiplier 14e (multiplier 1.0). Is done. Then, the selector 16 selectively takes out one of the outputs of the multiplier 14e and the outputs of the adders 15a and 15b in units of 1H, so that each video information I
_{A1, I A2 ···, I B1} , I B2 ··· video information is synthesized at a predetermined ratio L _A1, L _A2 ···, a L _B1, L _B2 ··· successive video signals YB0 Output.

The selection operation by the two selectors 13 and 16 is performed by selecting control signals CS1 and CS2 supplied to the selectors 13 and 16 respectively.
And is configured to execute the arithmetic processing shown in FIG. For example, the selector 13 supplies the video signal YA1 to the multiplier 14b and supplies the video signal YA0 to the selector 13c with respect to the video information L _A2 to supply 0.4I _A1 + 0.6IA ₂ from the adder 15b to the selector. And the video signal Y _B
A1 is supplied to the multiplier 14a, and the video signal YA2 is supplied to the multiplier 14d.
Configured to I _B1 + 0.8I _B2 to supply to the selector 13. In addition, video information L _A1 , L
_{For A6} or _LB4 , the selector 13 sets the video signal YA
1 or YA2 is provided to the multiplier 14e. Then, the selector 16 extracts the video information after the respective arithmetic processings, selectively combines the output of the multiplier 14e and the outputs of the adders 15a and 15b every 1H, and outputs the video signal YB0.

According to such a signal processing circuit, the CCI
Since the solid-state imaging device corresponding to the R system is driven at a scanning timing according to the EIA system and the obtained video signal YA0 is subjected to linear interpolation processing, a video signal YB0 corresponding to the EIA can be obtained. Number is CCI
The solid-state imaging device set to support the R system is EI
It can be used for a TV camera compatible with the A system. Therefore, the synchronization signal given to the solid-state image sensor is
In addition, switching between a signal conforming to the EIA scheme as shown in FIG.
One television camera can be associated with two television systems, and the range of use of the solid-state imaging device is expanded.

In the above-described embodiment, the case where the solid-state imaging device corresponding to the CCIR system is adapted to the EIA system is exemplified. However, the line shift timing of the solid-state imaging device is changed, and each multiplier of the multiplication circuit 14 is set. It is also possible to correspond to other television systems by changing.

[0021]

According to the present invention, the solid-state imaging device can be shared between television cameras of different television systems, so that the range of use of the solid-state imaging device can be expanded. Therefore, it is possible to reduce the cost of the apparatus as well as the cost by reducing the size of the solid-state imaging device, and it is possible to obtain an inexpensive television camera in which a decrease in image quality is suppressed.

Further, the process of the linear interpolation processing on the video signal is simplified, and the circuit scale of the signal processing circuit is reduced.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a video signal reproducing method according to the present invention.

FIG. 2 is a timing chart showing the operation of the video signal reproducing method of the present invention.

FIG. 3 is a diagram illustrating a signal processing process in the case of interlaced scanning.

FIG. 4 is a block diagram of a signal processing circuit employing the video signal reproducing method of the present invention.

FIG. 5 is a timing chart showing an operation of the signal processing circuit in an A field.

FIG. 6 is a timing chart showing the operation of the signal processing circuit in the B field.

[Explanation of symbols]

11 and 12 line memories 13 and 16 the selector 14a~14e multiplier 15a, 15b adder YA0~YA2, YB0 video signal _{I A1, I A2 ···, I} B1, I B2 ··· video information (input side) L _A1 , L _A2 ..., L _B1 , L _B2 ... Video information (output side)

Claims (2)

(57) [Claims] 1. A video signal obtained by transferring and outputting video information from a solid-state imaging device in which the number of rows of light receiving pixels in an imaging region is smaller than the number of horizontal scanning periods set in a vertical scanning period is displayed on a screen. The transfer output of the solid-state imaging device is periodically stopped in a predetermined horizontal scanning period, and video information sequentially output from the solid-state imaging device is alternately stored in two line memories. And
In each horizontal scanning period, two pieces of information of two pieces of video information read from these line memories and one piece of video information output from the solid-state imaging device are selectively linearly combined at a predetermined ratio, and combined. And displaying the obtained video information along the scanning line. 2. The transfer output of the solid-state imaging device is stopped during the second and fourth horizontal scanning periods every five periods of the first to fifth horizontal scanning periods, and during the stop period, the transfer of the line memory is stopped. A video signal is obtained from the video information stored in both or one of them, and in the first, third, and fifth horizontal scanning periods, the video information output by the solid-state imaging device and the video signal stored in one of the line memories are stored. 2. The video signal reproducing method according to claim 1, wherein the video signal is obtained from the video information.