JP4525388B2 - Imaging signal recording device - Google Patents

Description

  The present invention relates to an imaging signal recording apparatus for recording video imaging signals and film (movie) imaging signals.

  As a conventional imaging signal recording apparatus, there is one described in Patent Document 1. This technology tries to obtain an image pickup signal equivalent to that of a film camera with a video camera in response to the recent digital cinema. Especially, the frame rate can be freely changed as an image creation peculiar to a film camera. An imaging signal with a variable frame rate is realized in the same manner as a film camera, and is recorded and reproduced. An imaging signal recording apparatus based on this technique is shown in FIG. FIG. 18 shows a configuration diagram of a conventional imaging signal recording apparatus. In FIG. 18, 1 is a lens for connecting an optical image to an imaging surface, 2 is an imaging signal generator capable of outputting imaging signals of various frame rates, and 50 outputs a driving pulse corresponding to the frame rate to the imaging signal generator. A drive pulse generator 5 is a frame rate converter that converts image signals of various frame rates into predetermined frame rates, and 51 is an image signal processor that performs necessary processing of the image signals, such as gamma correction, detail correction, and matrix processing. To do. 7 is a recording unit, 8 is a display unit, 10 is a flag signal generation unit that indicates the frame position of a necessary signal, and 52 is a system control unit that generates necessary pulses and the like for each unit, and controls the entire imaging signal recording apparatus. .

  The operation of the conventional imaging signal recording apparatus configured as described above will be described below with reference to FIG. 18, FIG. 19, and FIG.

  19 and 20 show signal waveform diagrams of the respective parts (a) to (c) of FIG. 18. (d) is a signal recorded by the recording part, and (e) is a conversion of a frame rate converter (not shown). The signal after operation is shown.

  The optical image connected by the lens 1 is converted into an electrical signal by the imaging signal generator 2, and an imaging signal is obtained based on the drive pulse of the drive pulse generator 50. At this time, when the frame rate is a 60 frame signal (hereinafter referred to as a 60P signal), a 60P imaging signal is obtained every 1/60 seconds as shown in FIG. This signal is converted into a predetermined frame rate, in this case 60P rate, by the frame rate conversion unit 5 and output as shown in FIG. The output signal of the frame rate conversion unit 5 is then input to the imaging signal processing unit 51, where necessary processing of the imaging signal such as gamma correction, detail correction, matrix processing is performed, and the imaging signal is output to the recording unit 7 and the display unit 8. At this time, the flag signal generator 10 outputs a signal shown in FIG. That is, flag signals are generated for all frame signals and output to the recording unit 7. As shown in FIG. 19D, the recording unit 7 records the signals of all the frames output from the imaging signal generation unit 2 as they are, and also records the corresponding flag signals. Here, a frame rate converter (not shown) extracts the frame to which the flag signal is added as an effective frame, converts it to a 24P rate, and outputs it (FIG. 19 (e)). In this case, all signals are valid frames, and as a result, a slow motion 24P signal whose time axis is extended by 2.5 times is obtained, and a variable speed signal similar to that of a film camera for movies can be realized. .

  FIG. 20 shows a case where the frame rate is 12P, and the output signal of the imaging signal generator 2 is considered as an intermittent signal as shown in FIG. Is output. As for this signal, the same frame signal is duplicated as shown in FIG. 20B by the frame rate conversion unit 5 and converted to the 60P rate. In the case of this example, the flag signal generation unit 10 generates a flag signal at the position of the first frame signal of the same frame converted as shown in FIG. The signal to the recording unit 7 is as shown in FIG. 20D, and a flag signal is added to the head of each identical frame and recorded with a 60P rate signal in which the same frame signal is duplicated. Similarly to the case of FIG. 19, when converted to a 24P signal by a frame rate converter (not shown), only effective frames are extracted and output as shown in FIG. In this case, in contrast to the case of FIG. 19, a fast-forward 24P signal whose time axis is compressed to ½ is obtained.

  In this way, imaging signals of various frame rates are converted to a predetermined frame rate of 60P rate, a flag is added to a necessary frame, and the imaging signal is recorded together with the flag. By extracting only and reproducing at a 24P rate, it is possible to obtain an imaging signal for variable-speed imaging such as slow motion and fast-forwarding similar to a movie film camera.

In addition, an imaging signal recording apparatus which performs a specific gamma correction to give this technology the same gradation as a movie film camera and switches to a conventional video gamma correction to obtain an imaging signal for a movie, and Display devices and the like have been proposed. In this way, it has become possible to realize variable speed and gradation with a video camera similar to a film camera for movies.
Japanese Patent Laying-Open No. 2002-152569 (paragraph number “0033”)

  However, in the conventional imaging signal recording apparatus, the signal output to the recording unit and the signal output to the display unit are basically the same frame rate signal. For example, when the frame rate is reduced, the display unit The displayed image pickup signal is a skip signal, and it is difficult to grasp the actual movement of the subject, which causes a problem in image creation.

  In addition, in one shooting, shooting is performed at a single frame rate, and in the case of shooting that is not intended for production, reshooting has occurred several times.

  The present invention solves the above-mentioned conventional problems, and variously changes the frame rate of an image signal to be recorded. In particular, the image signal displayed on the display unit has a hindrance to image creation even at a low frame rate. Provided is an imaging signal recording apparatus capable of providing a signal with no frame rate. It is another object of the present invention to provide an image pickup signal recording apparatus that can produce a desired image and obtain an image pickup signal having a frame rate suitable for production by one shooting.

The invention described in claim 1 of the present invention
A first imaging signal generator that can vary the frame rate of the imaging signal and outputs imaging signals of various frame rates ;
A second imaging signal generator that images the same subject image as the first imaging signal generator and outputs an imaging signal of an arbitrary frame rate suitable for display ;
A frame rate conversion unit that regularly replicates an image pickup signal of various frame rates output from the first image pickup signal generation unit according to each frame rate and converts the image into a predetermined frame rate;
An imaging signal processing unit that performs various signal processing on the output signal of the frame rate conversion unit and the output signal of the second imaging signal generation unit;
A recording unit that records an output signal of the imaging signal processing unit that has processed a signal from the frame rate conversion unit ;
For each frame signal constituting the output signal of the imaging signal processing section that processes the signal from the frame rate conversion unit, for each of the frame signal group of the same image signal to the frame rate converting section outputs, at least A flag signal generator for generating a flag signal in one frame signal ;
A display unit for displaying a display signal output by the imaging signal processing unit that has processed the signal from the second imaging signal generation unit ;
Is composed of
The first imaging signal generator and the second imaging signal generator output imaging signals of various frame rates. The frame rate conversion unit converts the various frame rate imaging signals of the first imaging signal generation unit into predetermined frame rates by regularly replicating the frames according to each frame rate. The imaging signal processing unit performs various signal processing as an imaging signal recording device on the output signal of the frame rate conversion unit and the output signal of the second imaging signal generation unit, and outputs them to the recording unit and the display unit. By outputting a signal obtained by processing the signal of the frame rate conversion unit and outputting a signal obtained by processing the output signal of the second imaging signal generation unit to the display unit, the recording unit and the display unit are substantially different. Output frame rate imaging signal. The flag signal generation unit has an operation of outputting a flag signal to an effective frame corresponding to an actual frame rate among duplicate frames of the imaging signal output to the recording unit.

The invention according to claim 2 of the present invention is
An imaging signal generator that outputs an imaging signal in which the frame rate for each pixel is changed by changing the accumulation time for each pixel;
Write the output signal for each pixel with the same frame rate of each pixel of the imaging signal output from the imaging signal generator, and copy and read the frame regularly according to each frame rate, so that all the same frames A frame rate conversion unit that converts the signal into a rate and outputs the result simultaneously;
A synthesis circuit unit for switching and synthesizing each output signal of the frame rate conversion unit in units of pixels;
A camera process unit that performs each process as an imaging signal recording device on the output signal of the synthesis circuit unit;
A division circuit unit that divides the output signal of the camera process unit again for each pixel having the same accumulation time and outputs a plurality of signals having substantially different frame rates;
A display unit for displaying an output signal of the divided circuit unit;
A recording unit for recording the output signal of the camera process unit or the output signal of the dividing circuit unit;
Is composed of
The imaging signal generator outputs imaging signals with different frame rates for each pixel. Since the frame rate conversion unit converts each pixel signal having the same frame rate into a predetermined frame rate, the frame rate conversion unit creates a duplicate frame corresponding to each frame rate. The synthesizing circuit switches a plurality of predetermined frame rate signals to be output in synchronization on a pixel basis. The camera process unit performs signal processing as an imaging signal recording device on the synchronized signal. The dividing circuit divides the output signal of the camera process unit again for each pixel having the same accumulation time, and outputs a plurality of signals having substantially different frame rates. The display unit displays one of a plurality of signals output from the dividing circuit, and the recording unit has an operation of recording one of the output signals of the dividing circuit or the output signal of the camera process unit as it is.

The invention according to claim 4 of the present invention is
An imaging signal generator that outputs an imaging signal in which the frame rate for each pixel is changed by changing the accumulation time for each pixel;
Write the output signal for each pixel with the same frame rate of each pixel of the imaging signal output from the imaging signal generator, and copy and read the frame regularly according to each frame rate, so that all the same frames A frame rate conversion unit that converts the signal into a rate and outputs the result simultaneously;
A synthesis circuit unit for switching and synthesizing each output signal of the frame rate conversion unit in units of pixels;
A camera process unit that performs each process as an imaging signal recording device on the output signal of the synthesis circuit unit;
A division circuit unit that divides the output signal of the camera process unit again for each pixel having the same accumulation time and outputs a plurality of signals having substantially different frame rates;
A display unit for displaying an output signal of the divided circuit unit;
A recording unit for recording the output signal of the camera process unit or the output signal of the dividing circuit unit;
A flag signal generating unit that outputs a flag signal indicating an effective frame corresponding to an actual frame rate from each replicated frame signal group of an imaging signal having a predetermined frame rate output to the recording unit;
Is composed of
The imaging signal generator outputs imaging signals with different frame rates for each pixel. Since the frame rate conversion unit converts each pixel signal having the same frame rate into a predetermined frame rate, the frame rate conversion unit creates a duplicate frame corresponding to each frame rate. The synthesizing circuit switches a plurality of predetermined frame rate signals to be output in synchronization on a pixel basis. The camera process unit performs signal processing as an imaging signal recording device on the synchronized signal. The dividing circuit divides the output signal of the camera process unit again for each pixel having the same accumulation time, and outputs a plurality of signals having substantially different frame rates. The display unit displays one of a plurality of signals output from the dividing circuit, and the recording unit records one of the output signals of the dividing circuit or the output signal of the camera process unit as it is. The flag signal generation unit has a function of outputting a flag signal indicating an effective frame corresponding to the actual frame rate from each of the duplicated frame signal groups of the imaging signal having a predetermined frame rate output to the recording unit.

The invention according to claim 6 of the present invention provides
An imaging signal generator that outputs an imaging signal in which the frame rate for each pixel is changed by changing the accumulation time for each pixel;
Write the output signal for each pixel with the same frame rate of each pixel of the imaging signal output from the imaging signal generator, and copy and read the frame regularly according to each frame rate, so that all the same frames A frame rate conversion unit that converts the signal into a rate and outputs the result simultaneously;
A synthesis circuit unit for switching and synthesizing each output signal of the frame rate conversion unit in units of pixels;
A camera process unit that performs each process as an imaging signal recording device on the output signal of the synthesis circuit unit;
A division circuit unit that divides the output signal of the camera process unit again for each pixel having the same accumulation time and outputs a plurality of signals having substantially different frame rates;
A display unit for displaying an output signal of the divided circuit unit;
A recording unit for recording the output signal of the camera process unit or the output signal of the dividing circuit unit;
A flag signal generating unit that outputs a flag signal indicating an effective frame corresponding to an actual frame rate from each replicated frame signal group of an imaging signal having a predetermined frame rate output to the recording unit;
An imaging signal with an arbitrary frame rate is output to the display unit, and the signal output to the recording unit is added to each pixel at the same frame rate so that all pixels have the lowest frame rate signal. A frame addition circuit unit;
Is composed of
The imaging signal generator outputs imaging signals with different frame rates for each pixel. Since the frame rate conversion unit converts each pixel signal having the same frame rate into a predetermined frame rate, the frame rate conversion unit creates a duplicate frame corresponding to each frame rate. The synthesizing circuit switches a plurality of predetermined frame rate signals to be output in synchronization on a pixel basis. The camera process unit performs signal processing as an imaging signal recording device on the synchronized signal. The dividing circuit divides the output signal of the camera process unit again for each pixel having the same accumulation time, and outputs a plurality of signals having substantially different frame rates. The display unit displays one of a plurality of signals output from the dividing circuit, and the recording unit records one of the output signals of the dividing circuit or the output signal of the camera process unit as it is. The flag signal generation unit outputs a flag signal indicating an effective frame corresponding to the actual frame rate from each of the duplicated frame signal groups of the imaging signal having a predetermined frame rate output to the recording unit. The frame addition circuit has an operation of adding signals for each pixel having the same frame rate so as to match the lowest frame rate in order to match a substantially different frame rate for each pixel to a signal having the lowest frame rate.

  As described above, according to the present invention, even when the recording frame rate changes, the display unit can display at a substantially constant frame rate, and the movement of the subject can be surely grasped even in low-speed frame rate shooting. Excellent effect is obtained.

  In addition, the present invention can output frame rate signals having substantially different frame rates to the display unit and the recording unit with a single imaging signal generation unit as in the prior art, and the movement of the subject particularly in low-speed frame rate shooting. It is possible to obtain an excellent effect of reliably grasping.

  In addition, the present invention can output frame rate signals having substantially different frame rates to the display unit and the recording unit with a single imaging signal generation unit as in the prior art, and the movement of the subject particularly in low-speed frame rate shooting. Can be reliably grasped, and the recording unit can simultaneously output imaging signals of a plurality of frame rates, and can simultaneously record each of the effective frames. An excellent effect that can be recorded is obtained.

  In addition, the present invention can output frame rate signals having substantially different frame rates to the display unit and the recording unit with a single imaging signal generation unit as in the prior art, and the movement of the subject particularly in low-speed frame rate shooting. Can be surely grasped, and an excellent effect that an image signal of a plurality of frame rates can be recorded with the same image quality as before can be obtained by one photographing.

  Hereinafter, embodiments of the present invention will be described with reference to FIGS.

(Embodiment 1)
FIG. 1 is a block diagram showing a configuration of an imaging signal recording apparatus according to Embodiment 1 of the present invention.

  In FIG. 1, 1 is a lens for connecting an optical image to an imaging surface, and 2 and 3 are imaging signal generators capable of outputting imaging signals of various frame rates, for example, a solid-state imaging device such as a CCD (charge coupled device). Consists of. Reference numeral 4 denotes a drive pulse generator for outputting drive pulses corresponding to the frame rate to the imaging signal generators 2 and 3, and reference numeral 5 denotes a frame rate converter for converting imaging signals of various frame rates into predetermined frame rates. It is comprised by the memory element of. Reference numeral 6 denotes an imaging signal processing unit, which includes an LSI, FPGA, or the like that performs necessary processing of imaging signals such as gamma correction, detail correction, and matrix processing. Reference numeral 7 denotes a recording unit which is composed of a storage device such as a VTR, a disk or a semiconductor memory. Reference numeral 8 denotes a display unit which includes an electronic viewfinder, a CRT, a liquid crystal monitor, or the like. Reference numeral 10 denotes a flag signal generator that indicates a frame position of a necessary signal, and 9 denotes a system controller that generates necessary pulses and the like for each part. The system controller is composed of, for example, a microcomputer and controls the entire imaging signal recording apparatus.

  The operation of the imaging signal recording apparatus according to Embodiment 1 configured as described above will be described below with reference to FIG.

  (A) to (f) in FIG. 2 show signal waveform diagrams of the respective parts (a) to (f) in FIG. FIG. 2G shows a signal after a conversion operation of a frame rate converter (not shown).

  FIG. 2 shows a case where the image pickup signal recording apparatus operates at a 12P rate, and FIG. 2A shows a 12P vertical synchronizing signal. Here, when the first imaging signal generator 2 operates at a 12P rate, the 12P signal shown in FIG. 2A is obtained as an intermittent signal. The frame rate conversion unit 5 converts the input signal into a 60P rate signal as shown in FIG. On the other hand, the second imaging signal generator 3 outputs an imaging signal shown in FIG. In this case, a signal having a frame rate of 60P is output. The imaging signal processing unit 6 performs processing such as gamma correction, detail correction, matrix processing, and the like necessary for the imaging signal recording device on these signals, and outputs them to the recording unit 7 and the display unit 8. Here, a signal obtained by processing the output signal of the frame rate conversion unit 5 in FIG. 2B is output to the recording unit 7, and the second imaging signal generation unit 3 in FIG. 2C is output to the display unit 8. The signal of FIG. 2 (d) obtained by processing the output signal is output. As in the conventional example, the flag signal generator 10 generates a flag signal in the first frame of the duplicated frame signal group as shown in FIG. The recording unit 7 records the signal shown in FIG. This recording signal is a variable speed signal whose time axis is halved as shown in FIG. 2 (g) by extracting an effective frame by a frame rate converter (not shown) and further converting it to a frame rate of 24P. (Fast forward) can be played.

  On the other hand, since the signal shown in FIG. 2D is output to the display unit 8, the display is the same as when shooting (recording) at a frame rate of 60P rate in the conventional shooting. Therefore, the movement of the subject is displayed smoothly. In addition, if the frame rate of the second image pickup signal generator 3 is photographed at a 24P rate as shown in FIG. 2 (c1), the signal shown in FIG. 2 (d1) can be displayed on the display unit. It can be displayed at a shooting speed of 24P rate.

  As described above, according to the first embodiment, the frame rate of the second imaging signal generation unit 3 can be set regardless of the frame rate of the first imaging signal generation unit 2 that generates the imaging signal of the frame rate desired to be recorded. For example, even when the recording frame rate is a low frame rate, by setting the frame rate of the second imaging signal generation unit 3 to a high frame rate, the movement of the subject can always be displayed as a smooth movement. It is possible, and it is possible to confirm important movements without any hindrance in the production of images.

  In addition, although the frame rate of the 2nd imaging signal generation part 3 showed the example with 60P rate and 24P rate, it cannot be overemphasized that you may select other suitable frame rates, for example, 48P rate, 50P rate, etc. freely.

  Further, although the optical system (lens 1) is the same, it goes without saying that it may be divided separately.

  Needless to say, the flag signal generation unit 10 may be included in the imaging signal processing unit 6 or the system control unit 9.

(Embodiment 2)
FIG. 3 is a block diagram showing the configuration of the imaging signal recording apparatus according to Embodiment 2 of the present invention.

  In FIG. 3, reference numeral 11 denotes a lens for connecting an optical image to an imaging surface, and reference numeral 12 denotes an imaging signal generation unit capable of outputting imaging signals of various frame rates for each pixel, and is constituted by a solid-state imaging device such as a CMOS. Reference numeral 13 denotes a drive pulse generator that outputs a drive pulse corresponding to the frame rate of each pixel to the image signal generator 12. Reference numeral 14 converts image signals of various frame rates into predetermined frame rates for each pixel of the same frame rate. A frame rate conversion unit configured by a memory element such as a frame memory. Reference numeral 15 denotes an imaging signal processing unit, which includes an LSI, FPGA, or the like that performs necessary processing of imaging signals such as gamma correction, detail correction, and matrix processing. Reference numeral 16 denotes a recording unit which is composed of a storage device such as a VTR, a disk, or a semiconductor memory. A display unit 17 includes an electronic viewfinder, a CRT, a liquid crystal monitor, and the like. Reference numeral 18 denotes a flag signal generator for indicating a frame position of a necessary signal, and 19 denotes a system controller for generating a necessary pulse or the like for each part. The system controller is composed of, for example, a microcomputer and controls the entire imaging signal recording apparatus. The difference from the configuration of the first embodiment shown in FIG. 1 is that there is one imaging signal generator and the frame rate can be changed for each pixel.

  The operation of the imaging signal recording apparatus according to Embodiment 2 configured as described above will be described below with reference to FIGS.

  (1) to (4) in FIG. 4A show the readout pulse and readout period (signal output period) of each pixel of the imaging signal generator 12 corresponding to four types of frame rates. Here, the frame rates are 60P, 30P, 20P, and 15P. FIG. 6B is an image diagram showing the position of the same frame rate on each pixel at that time, and the pixel columns are repeated in the order of 60P rate, 30P rate, 20P rate, and 15P rate from the left end of the vertical column. FIG. 8C shows an example of a horizontal switching pulse for obtaining the readout signal of FIG. 9A (which vertical column is selected and read in which period). Is shown.)

  FIG. 5 is a block diagram showing an example of the internal configuration of the frame rate conversion unit 14. Reference numerals 20 to 23 denote frame memories for converting four types of frame rates to the same predetermined frame rate.

  FIGS. 6A and 6B show vertical and horizontal timing charts of the reset pulse, clock, etc. to the frame rate conversion unit 14.

  FIG. 7 is a block diagram showing an example of the internal configuration of the imaging signal processing unit 15. Reference numerals 24 to 27, 31, and 32 denote data holding circuits that hold data using the master clock mck of the imaging signal processing unit 15. A combining circuit unit that switches pixel signals belonging to different frame rates into one pixel column, 29 is a camera process unit that performs the main processing of the camera, and 30 is a dividing circuit unit that divides the pixel data into four types of pixel data again. .

  8 (b1) to (b4), (p1) to (p8), (d1), (d) are the parts (b1) to (b4), (p1) to (p8), (d1) of FIG. ) And (d) are signal waveform diagrams of horizontal rates of signals.

  Further, FIGS. 9A to 9C are image diagrams showing pixel images in the camera process unit 29, the display unit 17, and the recording unit 16. FIG.

  The imaging signal generator 12 repeatedly outputs signals of pixel columns having four types of accumulation times shown in FIG. That is, the first column from the left end is a 60P signal (filled) with an accumulation time of 1/60 seconds, the second column is a 30P signal with an accumulation time of 1/30 seconds (left oblique line), and the third column is an accumulation time of 1/20 seconds. 20P signal (right oblique line), the fourth column is a 15P signal (outlined) with an accumulation time of 1/15 seconds, and this signal is repeated thereafter. The readout timing of each pixel column is read at the readout interval of each accumulation time as shown in FIG. 5A, and the period during which the signal is read out is always 1/60 second, and the conventional frame rate is changed. With the same reading method as the time, intermittent reading is performed as the accumulation time becomes longer. Therefore, there are six types of periods from which signals of each pixel column are selected and read out, from period A to period F, and in order to perform such reading, the horizontal switching pulse shown in FIG. A drive pulse is output from the drive pulse generator 13 to the imaging signal generator 12. If all the horizontal switching pulses are regularly output, all the pixels are read out. If they are skipped, the signals of the skipped pixel columns are selectively read out. Therefore, in the period A, all the pixel columns are arranged, in the period B, the pixel columns are 1, 5, 9,..., And in the period C, the pixel columns are 1, 2, 5, 6, 9, 10,. Selected and output.

  The internal structure of the frame rate conversion unit 14 is as shown in FIG. 5, and the corresponding frame memories 20 to 23 correspond to the pixel columns of the four types of accumulation times, as in the conventional example. The signal is written, and the frame rate conversion is performed so that the signal always has a 60P rate. FIGS. 6A and 6B show the write and read reset pulses and clocks. FIG. 4A shows the timing at the vertical rate. For example, the frame memory 20 repeatedly writes and reads every 1/60 seconds, the 60P signal is written to the 60P signal, and the frame memory 22 writes every 1/20 second. The read 20P signal is converted into a 60P signal every 1/60 seconds. Others are the same. In this manner, the signals of all the pixel columns having different accumulation times are synchronized (in parallel) and output to the imaging signal processing unit 15 as 60P signals. As shown in FIG. 4B, the horizontal timing is such that a write clock and a read clock are output every four pixels with respect to the master clock mck, and given to each frame memory 20-23 at a timing shifted by one pixel. Yes.

  The internal configuration of the imaging signal processing unit 15 is as shown in FIG. 7, for example, and the internal signal waveform diagram is as shown in FIG. The pixel signals shown in FIGS. 8B1 to 8B4 are input from the frame memory conversion unit 14 to the imaging signal processing unit 15 (FIG. 8 shows a signal of a horizontal rate. Each number is a pixel from the left end. Shows the number.) That is, the pixel column signals for each accumulation time are synchronized and input in parallel. The rate is a quarter of the master clock mck. The data hold circuits 24 to 27 hold the respective input data with the master clock mck. As a result, the data of FIG. 8 (p1) to (p4) is output. The same pixel data is output for every four pixels. The synthesizing circuit unit 28 rearranges these data in the order of the original pixels after switching one pixel at a time, and outputs the data to the camera process unit 29 as the signal shown in FIG. At this point, pixel signals having different accumulation times are input to the signal processing block at the same 60P rate. The camera process unit 29 performs camera main processing such as gamma, detail, and matrix necessary for the imaging signal recording apparatus, and outputs the signal of FIG. 8 (p6) to the dividing circuit 30 in the next stage. The dividing circuit 30 selects data to be output to the recording unit 16 and the display unit 17. Here, the pixel data of FIG. 8 (p7) is selected for the display unit 17, and the pixel data of FIG. 8 (p8) is selected for the recording unit 16. That is, a 60P signal with an accumulation time of 1/60 seconds is selected for the display unit 17, and a 20P signal with an accumulation time of 1/20 seconds is selected for the recording unit 16. The data hold circuits 31 and 32 re-hold with the master clock mck and output signals shown in FIGS. 8 (d1) and 8 (d), respectively. 9A to 9C are image diagrams of pixel data input to the camera process unit 29, the display unit 17, and the recording unit 16. In other words, the camera process unit 29 simultaneously performs the same processing on pixel data of a plurality of types (in this case, four types) of accumulation time, and inputs one type of separate data to the recording unit 16 and the display unit 17, respectively. The recording unit 16 and the display unit 17 perform display and recording operations at the same clock rate as in the prior art.

  As described above, according to the second embodiment, it is possible to output signals of different frame rates to the display unit 17 and the recording unit 16 by changing the accumulation time for each pixel by one imaging signal generation unit 12. Therefore, for example, even when an image signal with a low frame rate such as 20P is imaged and recorded, an image signal with a high frame rate can be displayed on the display unit, and there is no hindrance to the movement confirmation for image creation and production.

  The selection of the frame rate on the display unit is preferably a high-speed frame rate, but it goes without saying that other frame rates may be selected as long as they do not hinder the confirmation of movement.

  Needless to say, the setting and type of the accumulation time of each pixel of the imaging signal generator 12 may be set freely.

(Embodiment 3)
FIG. 10 is a block diagram showing an internal configuration of the imaging signal processing unit 15 of the imaging signal recording apparatus according to Embodiment 3 of the present invention. The overall configuration of the imaging signal recording apparatus is exactly the same as that of the second embodiment shown in FIG.

  In FIG. 10, reference numerals 24 to 27 and 31 denote data holding circuits for holding data by the master clock mck of the imaging signal processing unit 15, and reference numeral 28 denotes a synthesis circuit for switching each pixel signal belonging to four types of frame rates into one pixel column. Reference numeral 29 denotes a camera process unit for performing main processing of the camera, and reference numeral 30 denotes a dividing circuit unit for dividing the pixel data into four types of pixel data again. Since these constituent elements are exactly the same as those of the imaging signal processing unit 15 of the second embodiment and the operation thereof is also the same, detailed description thereof is omitted.

  The third embodiment is different from the second embodiment in that the output signal of the camera process unit 29 is directly output to the recording unit 16 and the operation of the flag signal generation unit 18 changes accordingly. is there.

  The operation of the third embodiment configured as described above will be described below with reference to FIGS.

  11A to 11C are image diagrams of pixel data processed in the camera process unit 29, the display unit 17, and the recording unit 16. FIG. Since the configuration shown in FIG. 10 is used, the pixel data in the recording unit 16 is the same as the pixel data in the camera process unit 29. FIG. 12 is an explanatory diagram for explaining how the flag signal generator 18 generates a flag signal.

  As shown in FIG. 11 (c), pixel data of all accumulation times, that is, imaging signals having a plurality of frame rates, are input to the recording unit, and the signals can be recorded. In a conventional system, a valid flag is detected by a frame rate converter (not shown), and the frame is converted to a 24P rate to obtain a reproduction signal of a variable speed imaging signal. For example, if the flag signals can be distinguished, the reproduction of a plurality of types of variable speed imaging signals can be selected by one shooting recording. FIG. 12 shows how to apply the flag signal (incorporation of types).

  12A shows a flag signal when the recording frame mode is one type, and FIG. 12B shows how the flag signal is generated when the recording frame mode is four types.

  For the flag signal when the recording frame mode is one type, the flag signal is generated and added during one frame period of the first frame of the duplicate frame, for example. On the other hand, in the case of simultaneous recording at a plurality of frame rates, effective frames having a plurality of frame rates are included in the period of each frame rate, so that the flag signal in each period has a meaning. For example, as shown in FIG. 12B, the effective frame period of which frame rate is determined by associating the flag numbers with the periods A to F. For example, in period A, four types of frame rates (60P, 30P, 20P, 15P) are valid frame periods, and this period is associated with flag number 1.

  In period B, flag number 2 is associated with only one type (60P) of valid frame periods. The same applies to other periods, and the types of valid frames in all periods can be determined. In a frame rate converter (not shown), an effective frame having a frame rate selected according to the number is determined, and the frame is extracted and converted to a 24P rate, thereby obtaining a reproduction signal of a variable speed imaging signal as in the conventional case. be able to.

  In the frame period in which the valid frames overlap, it is necessary to change the pixel selection position according to the frame rate to be selected, but it goes without saying that the operation can be easily performed.

  As described above, according to the third embodiment, as in the second embodiment, the single imaging signal generator 12 changes the accumulation time for each pixel, so that the display unit 17 and the recording unit 16 have different frame rates. Can be output. Therefore, for example, even when an image signal with a low frame rate such as 20P is imaged and recorded, an image signal with a high frame rate can be displayed on the display unit, and there is no hindrance to the movement confirmation for image creation and production. In addition, it is possible to output not only one type of frame rate but also a plurality of frame rates to the recording unit, and it is possible to simultaneously record imaging signals of a plurality of types of frame rates in one shooting, As the range of production expands, re-shooting and the like are reduced, and efficient shooting can be performed.

(Embodiment 4)
FIG. 13 is a block diagram showing an internal configuration of the imaging signal processing unit 15 of the imaging signal recording apparatus according to Embodiment 4 of the present invention. In the fourth embodiment, the entire configuration of the imaging signal recording apparatus is the same as that in the second embodiment shown in FIG.

  In FIG. 13, reference numerals 24 to 27 and 31 denote data hold circuits for holding data by the master clock mck of the image pickup signal processing unit 15, and reference numeral 28 denotes a synthesis circuit for switching each pixel signal belonging to three types of frame rates into one pixel column. , 29 is a camera process unit for performing main processing of the camera, 30 is a division circuit unit for dividing again into three types of pixel data, and 33 is a frame addition circuit unit, which includes a frame addition circuit 34 and a synthesis circuit 35. . The components other than the frame addition circuit unit are exactly the same as those of the imaging signal processing unit 15 of the second embodiment, and the operation thereof is also the same, so that detailed description thereof is omitted.

  The fourth embodiment is different from the second and third embodiments in that a frame addition circuit unit 33 for adding the frame of the output signal of the camera process unit 29 is provided, and the output signal is output to the recording unit 16. It is a point. In the fourth embodiment, there are three frame rates of 60P, 30P, and 15P that are different for each pixel.

  The operation of the third embodiment configured as described above will be described below with reference to FIGS.

  FIG. 14 is a block diagram showing an example of the internal configuration of the frame addition circuit 34. Reference numerals 36, 43 to 46 denote data hold circuits, 37 and 38 denote selection circuits, 39 denotes an addition circuit, and 40 denotes data for frame addition. It is a frame memory to keep.

  FIG. 15 is a horizontal rate signal waveform diagram of each part of the frame addition circuit 34, and is a waveform diagram of the corresponding symbol portion indicated by (p6) and the like.

  FIG. 16 is also a vertical rate signal waveform diagram of each part of the frame addition circuit 34, and is a waveform diagram of a corresponding symbol portion indicated by (p6) and the like.

  Further, FIGS. 17A to 17C are image diagrams of pixel data processed in the camera process unit 29, the display unit 17, and the recording unit 16. FIG.

  When FIG. 15 (p6) is input to the frame adder circuit 34, when the pixels corresponding to the respective frame rate positions hold data with the clocks wck1, wck2, and wck3, FIG. 15 (p8 ′) and (p9 ′) , (P10 ′). In this case, since only the calculation rate is shown, the selection of the selection circuit 38 is SO input and the output of the frame memory 40 is zero. That is, here, similarly to the dividing circuit unit 30 and the like, the pixel data strings (three types) are divided for each accumulation time. Since the subsequent data rate is held by the master clock mck, it is output at a rate as shown in FIGS. 15 (p8) to (p10).

  Here, the frame addition operation operates as shown in FIG. For example, FIG. 16A is a signal waveform diagram in which a 60P signal having an accumulation time of 1/60 seconds is added to a frame. In the case of a 60P pixel signal, the frame signal is different every frame as shown in FIG. 16 (p6). Frame signal. The selection operation of the selection circuit 38 selects GND every 4 frames as shown in FIG. 16 (p6 '). A signal obtained by adding the output of the data hold circuit 36 and the output of the frame memory 40 and the output signal of the selection circuit 38 by the adder 39 is selected as an input (FMin) of the frame memory 40 through the selection circuit 37. If the operation of the selection circuit 37 selects the input side of the data hold circuit 36 every four frames, the output (FMout) of the frame memory 40 and the output (p8) of the data hold circuit 44 are as shown in FIG. A signal obtained by adding four frames of a 60P rate signal (for example, 1 + 2 + 3 + 4) is output at the corresponding effective frame position. That is, a 60P rate pixel signal can be converted into a 15P rate signal equivalently. Similarly, if the selection circuit is selected as shown in FIG. 16B for the 30P pixel signal ((p6 ′), (FMin)), the output (p9) of the data hold circuit 45 is a 1/30 second frame signal. A signal obtained by adding two frames is obtained at an effective frame position corresponding to 15P. Also in this case, a 30P rate pixel signal can be equivalently converted to a 15P rate signal. For the 15P pixel signal, the frame data as it is is selected corresponding to the effective frame position as shown in (p10) of FIG.

  At the horizontal rate, the above data is divided and output by the data with the pixels skipped as shown in FIG. This operation is exactly the same as that of the synthesis circuit unit 28.

  FIG. 17 shows an image diagram of pixel data processed by the camera process unit 29, the display unit 17, and the recording unit 16. The fourth embodiment is different from the second and third embodiments in that the recording unit All the pixels at 16 are equivalently pixel signals having a frame rate of 15P. In addition, a 60P frame rate signal can be selectively output on the display unit 17 as in the second and third embodiments.

  As described above, according to the fourth embodiment, as in the second and third embodiments, by changing the accumulation time for each pixel by one imaging signal generation unit 12, the display unit 17 and the recording unit 16 are separately provided. A frame rate signal can be output. Therefore, for example, even when an image signal with a low frame rate such as 20P is imaged and recorded, an image signal with a high frame rate can be displayed on the display unit, and there is no problem in confirming the motion for image creation and production. In addition, since the pixel signal recorded by the recording unit 16 can be a signal using all the pixels, it is possible to record an imaging signal whose resolution is improved as compared with the second and third embodiments.

  In the second, third, and fourth embodiments, it is needless to say that the preceding data hold circuits 24 and 25 and the like may be taken into the synthesizing circuit unit 28, and the latter data hold circuit 31 and the like may be taken into the dividing circuit unit 30.

  Needless to say, the synthesis circuit unit 28 and the division circuit unit 30 may be incorporated into the camera process unit 29.

  Further, by changing the frame rate for each pixel, the sensitivity (signal level) changes for each pixel group corresponding to each frame rate. However, the pixel group having the highest sensitivity in the camera process unit 29 or the dividing circuit unit 30. It goes without saying that processing such as matching to the level of, or conversely to the level of a pixel group having a low sensitivity, or matching to the reference sensitivity can be easily performed.

  In addition, it goes without saying that processing capable of realizing the optimum gradation characteristics by appropriately mixing the pixel signals of each frame rate, particularly when shooting a still image, can be easily introduced into the camera process unit 29 or the like.

  An imaging signal recording apparatus according to the present invention is an apparatus capable of recording an imaging signal by changing a frame rate. The frame rate can be changed between the display unit and the recording unit, and the display unit can be skipped particularly during low-speed shooting. It is possible to display the motion smoothly, and it does not interfere with the confirmation of the subject movement that is important for image creation and production. It can be recorded and the range of production and production can be expanded. Therefore, it can be applied to applications such as digital cinema and commercial photography in recent years.

1 is a block diagram showing a configuration of an imaging signal recording apparatus according to Embodiment 1 of the present invention. Signal waveform diagram of each part for explanation of operation of imaging signal recording apparatus in embodiment 1 The block diagram which shows the structure of the imaging signal recording device in Embodiment 2 of this invention. Operation explanatory diagram of image pickup signal generator 12 in the second embodiment The block diagram which shows an example of the internal structure of the frame rate conversion part 14 in Embodiment 2 Horizontal and vertical timing chart of each pulse to the frame rate conversion unit in the second embodiment The block diagram which shows an example of the internal structure of the imaging signal process part 15 in the same Embodiment 2. Horizontal rate signal waveform diagram of each part for explanation of operation of imaging signal processing unit 15 in the second embodiment Image diagram of pixels in camera process unit 29, display unit 17, and recording unit 16 in the second embodiment The block diagram which shows the internal structure of the imaging signal process part 15 of the imaging signal recording device in Embodiment 3 of this invention. Image diagram of pixels in camera process unit 29, display unit 17, and recording unit 16 in the third embodiment Operation explanatory diagram of flag signal generation of flag signal generation unit 18 in the third embodiment The block diagram which shows the internal structure of the imaging signal process part 15 of the imaging signal recording device in Embodiment 4 of this invention. FIG. 6 is a block diagram showing an example of the internal configuration of the frame addition circuit 34 in the fourth embodiment. Horizontal rate signal waveform diagram of each part of frame addition circuit 34 in the fourth embodiment Vertical rate signal waveform diagram of each part of frame adder circuit 34 in the fourth embodiment Image diagram of pixels in camera process unit 29, display unit 17, and recording unit 16 in the fourth embodiment Block diagram showing the configuration of a conventional imaging signal recording apparatus Signal waveform diagram of each part for explanation of operation in conventional imaging signal recording device Signal waveform diagram of each part for explanation of operation in conventional imaging signal recording device

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,11 Lens 2 1st imaging signal generation part 3 2nd imaging signal generation part 4,13 Drive pulse generation part 5,14 Frame rate conversion part 6,15 Imaging signal processing part 7,16 Recording part 8,17 Display part 9 , 19 System control unit 10, 18 Flag signal generation unit 12 Imaging signal generation unit 28 Synthesis circuit unit 29 Camera process unit 30 Division circuit unit 33 Frame addition circuit unit

Claims (6)

A first imaging signal generator that can vary the frame rate of the imaging signal and outputs imaging signals of various frame rates ;
A second imaging signal generator that images the same subject image as the first imaging signal generator and outputs an imaging signal of an arbitrary frame rate suitable for display ;
A frame rate conversion unit that regularly replicates an image pickup signal of various frame rates output from the first image pickup signal generation unit according to each frame rate and converts the image into a predetermined frame rate;
An imaging signal processing unit that performs various signal processing on the output signal of the frame rate conversion unit and the output signal of the second imaging signal generation unit;
A recording unit that records an output signal of the imaging signal processing unit that has processed a signal from the frame rate conversion unit ;
For each frame signal constituting the output signal of the imaging signal processing section that processes the signal from the frame rate conversion unit, for each of the frame signal group of the same image signal to the frame rate converting section outputs, at least A flag signal generator for generating a flag signal in one frame signal ;
A display unit for displaying a display signal output by the imaging signal processing unit that has processed the signal from the second imaging signal generation unit ;
With
An imaging signal recording apparatus that outputs imaging signals having substantially different frame rates to the recording unit and the display unit. An imaging signal generator that outputs an imaging signal in which the frame rate for each pixel is changed by changing the accumulation time for each pixel;
Write the output signal for each pixel with the same frame rate of each pixel of the imaging signal output from the imaging signal generator, and copy and read the frame regularly according to each frame rate, so that all the same frames A frame rate conversion unit that converts the signal into a rate and outputs the result simultaneously;
A synthesis circuit unit for switching and synthesizing each output signal of the frame rate conversion unit in units of pixels;
A camera process unit that performs each process as an imaging signal recording device on the output signal of the synthesis circuit unit;
A division circuit unit that divides the output signal of the camera process unit again for each pixel having the same accumulation time and outputs a plurality of signals having substantially different frame rates;
A display unit for displaying an output signal of the divided circuit unit;
A recording unit for recording the output signal of the camera process unit or the output signal of the dividing circuit unit;
With
An imaging signal recording apparatus that outputs imaging signals having substantially different frame rates to the display unit and the recording unit. The imaging signal recording apparatus according to claim 2, wherein a signal supplied to the display unit from an output signal of the division circuit unit is a signal having the highest frame rate. An imaging signal generator that outputs an imaging signal in which the frame rate for each pixel is changed by changing the accumulation time for each pixel;
Write the output signal for each pixel with the same frame rate of each pixel of the imaging signal output from the imaging signal generator, and copy and read the frame regularly according to each frame rate, so that all the same frames A frame rate conversion unit that converts the signal into a rate and outputs the result simultaneously;
A synthesis circuit unit for switching and synthesizing each output signal of the frame rate conversion unit in units of pixels;
A camera process unit that performs each process as an imaging signal recording device on the output signal of the synthesis circuit unit;
A division circuit unit that divides the output signal of the camera process unit again for each pixel having the same accumulation time and outputs a plurality of signals having substantially different frame rates;
A display unit for displaying an output signal of the divided circuit unit;
A recording unit for recording the output signal of the camera process unit or the output signal of the dividing circuit unit;
A flag signal generating unit that outputs a flag signal indicating an effective frame corresponding to an actual frame rate from each replicated frame signal group of an imaging signal having a predetermined frame rate output to the recording unit;
An imaging signal recording apparatus comprising: When the recording unit records the output signal of the camera process unit, the flag signal generation unit generates a plurality of types of flag signals in order to distinguish effective frame positions having different actual frame rates for each pixel. The imaging signal recording apparatus according to claim 4, wherein An imaging signal generator that outputs an imaging signal in which the frame rate for each pixel is changed by changing the accumulation time for each pixel;
Write the output signal for each pixel with the same frame rate of each pixel of the imaging signal output from the imaging signal generator, and copy and read the frame regularly according to each frame rate, so that all the same frames A frame rate conversion unit that converts the signal into a rate and outputs the result simultaneously;
A synthesis circuit unit for switching and synthesizing each output signal of the frame rate conversion unit in units of pixels;
A camera process unit that performs each process as an imaging signal recording device on the output signal of the synthesis circuit unit;
A division circuit unit that divides the output signal of the camera process unit again for each pixel having the same accumulation time and outputs a plurality of signals having substantially different frame rates;
A display unit for displaying an output signal of the divided circuit unit;
A recording unit for recording the output signal of the camera process unit or the output signal of the dividing circuit unit;
A flag signal generating unit that outputs a flag signal indicating an effective frame corresponding to an actual frame rate from each replicated frame signal group of an imaging signal having a predetermined frame rate output to the recording unit;
The display unit outputs an imaging signal of an arbitrary frame rate, and the signal output to the recording unit is a signal for each pixel of the same frame rate so that all pixels have the lowest frame rate. A frame addition circuit unit to add;
An imaging signal recording apparatus comprising:

Images