JP2647083B2 - Active matrix display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] In the present invention, a scan bus line and a data bus line are provided on two separate opposing substrates, and a switching element provided for each pixel scans its control terminal in a row direction. In an active matrix type liquid crystal display connected to a bus line and having a first output terminal connected to an adjacent scan bus line, a bus line connecting a second output terminal in a row direction overlaps with the scan bus line. The active matrix circuit is formed by a simple process by forming and electrically connecting the two at the outer edge of the panel, and furthermore, it is possible to prevent display unevenness and display failure due to bus line resistance. .

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type display device, and particularly to a configuration of a bus line electrode thereof. An active matrix display device can provide color display comparable to a cathode ray tube (CRT) by being combined with a liquid crystal, and is expanding its use as a thin flat display. However, since the switching element is provided for each pixel, the manufacturing process is complicated, and it is not easy to increase the yield. For this reason,
There has been a demand for an active matrix device having a configuration in which a high yield can be obtained by a simple process.

[Problems to be solved by conventional technology and invention]

Methods for simplifying the process of the active matrix display device and increasing the yield have been performed so far. FIG. 6 schematically shows a method of forming a thin film transistor and a bus line by a two-mask process. In the figure, 1 is a glass substrate, 2 is a transparent electrode, 3 is n ^{+ type} amorphous silicon doped with phosphorus (n ^{+ type} a-Si).
The contact layer, 4 is an operating semiconductor layer made of a-Si, and 5 is
Si ₃ N ₄ gate insulating film, 6 is a gate electrode, S is a source portion, D is a drain portion, DB is a drain bus (data bus line), and GB (ie, 6) is a gate bus line (scan bus line). , IE represent pixel electrodes. In the manufacturing method of this device, the transparent electrode 2 and the n ⁺ -Si layer 3 are first patterned to form the source (including the pixel electrode IE) S, the drain D, and the drain bus DB, and then the n ⁺ a Patterning of the gate bus line GB by patterning the -Si layer 3, the a-Si layer 4, the gate insulating film 5 and the gate electrode layer 6;

In such an active matrix display device, the gate bus lines (scan bus lines) and the drain bus lines (data bus lines) are formed orthogonally on the same glass substrate. Poor insulation at the intersections becomes a problem. Further, since a step occurs at the intersection, there is a problem that the bus line is disconnected or the resistance value increases.

Therefore, by providing the data bus line on the gate bus line (scan bus line) and the counter electrode of the substrate on which the thin film transistor is formed, there is no crossover structure on the substrate, and the gate bus line and the drain bus line are doubled. A method for reducing both short-circuit defects and open-circuit defects by overlapping one bus line has been previously proposed (Japanese Patent Application No. 60-274011). FIG. 7 is a perspective view of such a device, and FIG. 8 shows an equivalent circuit of a circuit on a substrate including a thin film transistor. 10 is a data bus line, 11 is a pixel electrode, 12 is a thin film transistor, 13 is a gate bus line (scan bus line), 14 is a drain bus line, 15 is a panel terminal portion, and a drain bus line 14 is an adjacent gate bus line. And are electrically connected 16.

However, in such a method, it is necessary to provide a connection hole in the gate insulating film of the active matrix portion in order to duplicate the bus line, and therefore, at least three masks are required at the time of manufacturing. .

Therefore, it has been difficult to achieve both an active matrix method capable of obtaining a high yield and a simplified process capable of forming a thin film transistor with two masks.

[Means and actions to solve the problems]

In order to solve the above problems, the present invention provides a switching element provided for each pixel on a first substrate, a scan bus line in which control terminals of the switching element are connected in a row direction, And a pixel electrode connected to the first output terminal, and a data bus line running in the column direction is formed on the second substrate, and the data bus line and the pixel electrode on the first substrate respectively form the data bus line. In the active matrix type display device, an additional bus line connecting the second output terminal of the switching element in the row direction is connected to an adjacent scan bus connecting the control terminal of the switching element in the row direction. The additional bus line and the adjacent scan bus line are electrically connected at the outer edge of the display panel by being formed so as to overlap with the line via the insulating film. To provide an active matrix type display device comprising.

FIG. 1 is a diagram illustrating the principle of the present invention. The control electrode of the switching element 22 in the n-th row is connected to the n-th scanning bus line 21, and the first output terminal of the switching element 22 in the n-th row forms an insulating film on the adjacent (n + 1) -th scanning bus line 23. Drain bus line 24 formed by sandwiching and overlapping
It is connected to the. And scan bus line as shown
23 and the drain bus line 24 are connected by panel terminal portions 25 at both ends, and a distributed capacitor 26 exists between the two. In the figure, reference numeral 20 denotes a pixel electrode.

Since the canvas line and the drain bus line are connected at both ends of the panel, the electrical connection is maintained even if one of them is disconnected at one place. In addition, even if one electrode layer has a high resistance and the waveform at the time of rising becomes blunt due to a capacitive load, the waveform is suppressed by the current supply from the other capacitively coupled bus line. In addition, a drive waveform with little distortion can be applied to each switching element.

FIG. 2 and FIG. 3 show the structure of the active matrix portion of the embodiment. FIG. 3 shows a section taken along line III-III in FIG. The process of fabricating the active matrix portion is a simple process using two masks described with reference to FIG. That is, the glass substrate
On the transparent electrode 32, an n ^{+ type} a for ohmic contact
Patterning the stacked film of the Si film 33 to form a drain electrode D;
Drain bus line DB, source electrode s and pixel electrode section
After forming the IE, the a-Si film 34, the Si ₃ N ₄ film 35 and the aluminum electrode film 36 are laminated and patterned to form the gate electrode G
And a scan bus line SB is formed. The hatched portion in FIG. 2 indicates the drain bus line DB as shown in FIG.
And a scan bus line SB are laminated with the Si ₃ N ₄ film 35 and the a-Si film 34 interposed therebetween, and a distributed capacitance is formed between the two. In these figures, 37 is a pixel electrode, 38
Denotes a thin film transistor, and 39 denotes a double bus line portion.

4 and 5 show an embodiment in which the drain bus line DB and the scan bus line SB are connected at the panel terminal. FIG. 5 shows a section taken along line VV in FIG. As shown in the drawing, the terminal pattern 41 of the drain bus line and the terminal pattern 42 of the scan bus line are branched and exposed in the panel terminal portion, so that they are connected by the electrode 43 of the flexible cable for terminal connection. is there. In this way, by connecting both bus lines after the panel process is created, there is also an advantage that independent voltages can be applied to both bus lines at the time of thin film transistor characteristic measurement or aging.

In this embodiment, connection by a flexible cable is used, but other mounting methods such as an interconnector, soldering, and bonding can be used, and a so-called chip-on-glass method (COG method) for mounting an IC chip.
Can also be applied.

Further, as a method of connecting during the process, it is possible to mask the panel terminal portion at the time of forming the insulating film so that the scan bus electrode and the drain bus electrode are directly overlapped at the panel terminal portion.

〔The invention's effect〕

According to the present invention, an active matrix display device can be manufactured with a high manufacturing yield by using a simple process, which has a great effect on cost reduction.

[Brief description of the drawings]

FIG. 1 is a schematic view showing the principle of the present invention, FIG. 2 is a plan view of an active matrix portion according to an embodiment of the present invention, FIG. 3 is a sectional view taken along line III-III of FIG. FIG. 5 is a plan view of a panel terminal portion according to the embodiment of the present invention, and FIG. 5 is a line V in FIG.
FIG. 6 is a cross-sectional view taken along line -V, and FIG.
FIG. 7 and FIG. 8 are schematic views of an active matrix type display device previously proposed by the present applicant. 20 ... pixel electrode, 21 ... nth scan bus line, 22 ... switching element, 23 ... n + 1th scan bus line, 24 ... drain bus line, 25 ... panel terminal part, 26 ... distribution capacity, 31 ...... glass substrate, 32 ...... transparent electrode, 33 ...... n ⁺ form a-Si film, 34 ...... a-Si film, 35 ...... Si ₃ n ₄ film, 36 ...... aluminum electrode, 37 ... ... Pixel electrode, 38 ... Thin film transistor, 39 ... Double bus line, 41 ... Terminal pattern of drain bus line, 42 ... Terminal pattern of scan bus line, 43 ... Terminal connection electrode.

Continuing on the front page (72) Inventor Kenichi Yanai 1015 Uedanaka, Nakahara-ku, Kawasaki City Inside Fujitsu Limited (72) Inventor Kazuhiro Takahara 1015, Kamikodanaka, Nakahara-ku, Kawasaki City Fujitsu Limited (56) References JP 62-119574 (JP, A) JP-A-62-133478 (JP, A) JP-A-61-36825 (JP, U)

Claims (1)

(57) [Claims] A switching element provided for each pixel on a first substrate; a scan bus line connecting control terminals of the switching element in a row direction; and a first output terminal of the switching element. Having a pixel electrode,
In an active matrix display device in which a data bus line running in a column direction is formed on the second substrate, and each pixel is constituted by the data bus line and a pixel electrode on the first substrate, Forming an additional bus line connecting the second output terminal of the switching element in the row direction via an insulating film with an adjacent scan bus line connecting the control terminal of the switching element in the row direction; An active matrix display device, wherein the additional bus line and the adjacent scan bus line are electrically connected at an outer edge of the display panel.