JP2612114B2 - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP2612114B2
JP2612114B2 JP3193983A JP19398391A JP2612114B2 JP 2612114 B2 JP2612114 B2 JP 2612114B2 JP 3193983 A JP3193983 A JP 3193983A JP 19398391 A JP19398391 A JP 19398391A JP 2612114 B2 JP2612114 B2 JP 2612114B2
Authority
JP
Japan
Prior art keywords
semiconductor device
circuit board
external leads
chip
sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP3193983A
Other languages
Japanese (ja)
Other versions
JPH0536888A (en
Inventor
潤 柴田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3193983A priority Critical patent/JP2612114B2/en
Publication of JPH0536888A publication Critical patent/JPH0536888A/en
Application granted granted Critical
Publication of JP2612114B2 publication Critical patent/JP2612114B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【産業上の利用分野】本発明は、ＳＩＰやＺＩＰのよう
に、装置全体を基板に対して垂直に立てた状態で実装す
る半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, such as a SIP or a ZIP, in which the entire device is mounted in a state of standing upright on a substrate.

【０００２】[0002]

【従来の技術】図６は従来のこの種の半導体装置の実装
状態を示す正面図である。2. Description of the Related Art FIG. 6 is a front view showing a mounting state of a conventional semiconductor device of this kind.

【０００３】同図において、１は半導体装置の全体を示
し、２はＩＣチップを樹脂封止した樹脂封止部、４はこ
の樹脂封止部２の下部から互いに並列に突出された電気
的接続用の多数の外部リード、６は半導体装置１を実装
するための回路基板、８は回路基板６の上下を貫通する
スルーホールで、各外部リード４に個別に対応して設け
られている。１０は回路基板６上に形成された金属配線
層、１２は外部リード４と金属配線層１０を電気的、機
械的に接合するための半田である。In FIG. 1, reference numeral 1 denotes an entire semiconductor device, 2 denotes a resin sealing portion in which an IC chip is resin-sealed, and 4 denotes electrical connections projecting in parallel from a lower portion of the resin sealing portion 2. A large number of external leads, 6 is a circuit board for mounting the semiconductor device 1, 8 is a through-hole penetrating the circuit board 6 above and below, and is provided corresponding to each external lead 4 individually. Reference numeral 10 denotes a metal wiring layer formed on the circuit board 6, and reference numeral 12 denotes solder for electrically and mechanically joining the external lead 4 and the metal wiring layer 10.

【０００４】この半導体装置１を回路基板６に実装する
には、各外部リード４をスルーホール８にそれぞれ挿入
し、次に、半田１２によって外部リード４と金属配線層
１０とを電気的、機械的に接合する。この半田１２によ
る接合方法としては、半田槽浸漬やリフロー法などが採
用される。[0004] To implement this semiconductor device 1 to a circuit board 6 is inserted respectively external leads 4 in the through hole 8, then, electrical and external lead 4 and the metal wiring layer 10 by solder 12, the machine Bonding. As a joining method using the solder 12, a solder bath immersion, a reflow method, or the like is employed.

【０００５】[0005]

【発明が解決しようとする課題】従来の上記構成の半導
体装置１は、回路基板６に対して垂直に立てた状態で保
持されるので、水平状態に保持する場合よりも回路基板
６上の占有面積を少なくすることができ、実装密度を高
め得るという利点がある。The conventional semiconductor device 1 having the above-described structure is held upright with respect to the circuit board 6, so that the semiconductor device 1 occupies more space on the circuit board 6 than when it is held horizontally. There is an advantage that the area can be reduced and the mounting density can be increased.

【０００６】しかしながら、従来構成のものでは、外部
リード４は、回路基板６に対して電気的のみならず機械
的な接合の役目をも果させる必要性から、回路基板６の
反対側まで突出させており、そのため、外部リード４の
突出側の回路基板６部分には他の回路部品を実装するこ
とができない。また、多層配線基板の場合には、スルー
ホール８がじゃまとなり、配線の自由度を損ない、配線
密度が低下することがある。このようなことから、従来
の構成では、実装密度を今まで以上に高めるには自ずと
限界があった。However, by way of conventional configuration, the outer lead 4, a need also to play a role of not without mechanical interface electrical only to the circuit board 6, it is projected to the opposite side of the circuit board 6 Therefore, other circuit components cannot be mounted on the portion of the circuit board 6 where the external leads 4 protrude. Further, in the case of a multilayer wiring board, the through holes 8 may hinder the flexibility of wiring and reduce the wiring density. For this reason, in the conventional configuration, the increase the packing density than ever was Tsu limit and not a self there.

【０００７】[0007]

【課題を解決するための手段】本発明は上述した課題を
解決するためになされたもので、従来と同様に垂直に立
てた状態で保持されるとともに、回路基板を挟んで両面
実装が可能で実装密度を一層高めることができ、しか
も、回路基板の多層配線なども容易に行えるようにする
ものである。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and can be held in a vertical position as in the prior art, and can be mounted on both sides of a circuit board. The mounting density can be further increased, and the multilayer wiring of the circuit board can be easily performed.

【０００８】そのため、本発明では、ＩＣチップと、こ
のＩＣチップに電気的に接続された複数の外部リード
と、これらを一体に封止する樹脂封止部とを有し、上記
各外部リードは上記樹脂封止部の所定の側端面から互い
に並行して突出するようにされた半導体装置において、
上記各外部リードの先端部に湾曲したリード固定部を形
成すると共に、上記樹脂封止部から突出し、上記各外部
リードと電気的に切り離された支柱本体と、この支柱本
体の一部を折曲して形成された支柱固定部とを有する支
柱を設け、上記リード固定部を回路基板の一面に装着
し、上記支柱固定部を上記一面または回路基板の一面の
近傍に配置された放熱体に装着するようにしたことを特
徴とする。 [0008] Therefore, in the present invention, an IC chip,
External leads electrically connected to an IC chip
And a resin sealing portion for integrally sealing these,
Each external lead is separated from the specified side end surface of the resin sealing
In a semiconductor device that is configured to protrude in parallel to
Form a curved lead fixing part at the tip of each of the above external leads.
As well as projecting from the resin sealing portion,
The support body electrically separated from the lead, and this support book
A support having a column fixing portion formed by bending a part of a body
A pillar is provided, and the above lead fixing part is mounted on one side of the circuit board
Then, the support column fixing portion is connected to the one surface or the one surface of the circuit board.
It is noted that it is attached to a radiator located near.
Sign.

【０００９】[0009]

【作用】上記構成においては、外部リードは電気的接続
用としてのみ作用し、装置全体を垂直に立てた状態に機
械的に保持するのは、専ら支柱によってなされる。In the above construction, the external leads serve only for electrical connection, and mechanically holding the entire device in a vertically upright state is exclusively performed by the columns.

【００１０】また、外部リード、支柱ともに回路基板の
一面に装着され、回路基板を挿通させないため、回路基
板の両面実装が可能であり、しかも、スルーホールを多
層配線用として利用することができ、実装密度を一層上
げることができる。[0010] In addition, both the external leads and the pillars are on the circuit board.
It is mounted on one side, so as not to inserting the circuit board, but may be double-sided mounting of the circuit group <br/> board, moreover, it is possible to use a through-hole for the multi-layer wiring, is possible to increase the mounting density further it can.

【００１１】[0011]

【実施例】実施例１ 図１は本発明の実施例１に係る半導体装置を回路基板に
実装した状態を示す正面図、図２は図１の半導体装置の
側面図である。FIG. 1 is a front view showing a semiconductor device according to a first embodiment of the present invention mounted on a circuit board, and FIG. 2 is a side view of the semiconductor device shown in FIG.

【００１２】これらの図において、１1 は半導体装置の
全体を示し、２1 はＩＣチップを樹脂封止した樹脂封止
部、４1 はこの樹脂封止部２1 の下部に位置する側端面
から互いに並列に突出され、夫々の先端部に図２に示す
ようなＪ字状に湾曲したリード固定部を形成した電気的
接続用の多数の外部リード、６1 は半導体装置１1 を実
装するための回路基板、１０1 は回路基板６1 の一面に
形成された金属配線層で、外部リード４1 に個別的に対
応して設けられている。１２1 は外部リード４1 と金属
配線層１０1 を電気的に接続するための半田である。[0012] In these figures, 1 1 represents an entire semiconductor device, 2 1 a resin sealing portion of the IC chip sealed with a resin, 4 1 a side end surface located in the lower portion of the resin sealing portion 2 1 <br/> projecting in parallel from each other, and each tip is shown in FIG.
Such J-shape curved multiple external leads for electrical connections forming the lead fixing portion 61 is a circuit board for mounting the semiconductor device 1 1, 10 1 on one surface of the circuit board 6 1 in the formed metal interconnect layer is provided corresponding individually to the external lead 4 1. 12 1 is a solder for electrically connecting the external lead 4 1 and the metal wiring layer 10 1.

【００１３】この実施例の特徴は、樹脂封止部２1 の下
部に位置する側端面の左右から下方に向けて突出し、上
記の外部リード４1 とは別個に電気的に切り離された支
柱１４1 が突設されており、この支柱１４1 は、樹脂封
止部２ 1 から突出する支柱本体と、この支柱本体の下端
部に位置して半導体装置１1 を回路基板６1 の一面に垂
直に立った状態に支持出来るように、前後に二股状に分
岐屈曲された支柱固定部１６1 とから構成されている。
この支柱１４1 の支柱本体は、たとえば、樹脂封止部２
1 の内部に予め埋設された放熱板やダイパッドから延設
して形成してもよく、また、独自の部材を用いてその端
部が樹脂封止部２1 に埋設されたものとしてもよい。[0013] The feature of this embodiment, protrude from the left and right side end face located below the resin sealing portion 2 1 downward, said external lead 4 1 a tower detached separately electrically 14 1 has been projected, the column 14 1, the resin sealing
A post body projecting from stop unit 2 1, to so that can support the semiconductor device 1 1 is situated on the lower end of the strut body in a state of standing vertically on one surface of the circuit board 6 1, bifurcated into front and rear and it consists of a branch bent struts fixing portion 16 1 Tokyo.
The struts 14 1 of the strut body, for example, the resin sealing portion 2
It may be formed by extending from the previously buried radiating plate and the die pad inside the 1, or may be those whose ends are embedded in the resin sealing portion 2 1 using a unique member.

【００１４】そして、外部リード４1 のリード固定部と
金属配線層１０1 との間隔が半田１２1 による接合の際
に最適になるように、支柱１４1 の全体の長さが予め設
定される。なお、１８1 は支柱固定部１６1 を回路基板
６1 に固定するための接着剤である。[0014] Then, to optimize the time of joining the spacing between the external lead 4 1 a lead-fixing portion and the metal wiring layer 10 1 by the solder 12 1, the overall length of the strut 14 1 is set in advance . Incidentally, 18 1 is an adhesive for fixing the support post fixing portion 16 1 to the circuit board 6 1.

【００１５】上記構成の半導体装置１1 を回路基板６1
に実装するには、半田１２1 を各金属配線層１０1 の上
に印刷、めっき等の方法により供給する。そして、各外
部リード４1 が金属配線層１０1 に対応するように位置
決めし、支柱１４1 の支柱固定部１６1 を接着剤１８1
によって回路基板６1 に固定する。次に、エアーリフロ
ー法、赤外線リフロー法などにより半田１２1 を溶融し
て外部リード４1 と金属配線層１０1 とを電気的に接続
する。[0015] The semiconductor device having the above structure 1 1 of the circuit board 6 1
To implement, the print solder 12 1 on each metal wiring layer 10 1 is supplied by a method such as plating. Then, positioned so external leads 4 1 corresponds to the metal wiring layers 10 1, column 14 1 strut fixing portion 16 1 of the adhesive 18 1
Fixed to the circuit board 6 1 by. Next, an air reflow method, to electrically connect the external lead 4 1 and the metal wiring layer 10 1 by melting the solder 12 1 by infrared reflow.

【００１６】これにより半導体装置１1 が回路基板６1
上に垂直に立てた状態で実装保持される。As a result, the semiconductor device 11 is mounted on the circuit board 6 1
It is mounted and held upright.

【００１７】実施例２ 図３は本発明の実施例２に係る半導体装置を回路基板に
実装した状態を示す正面図、図４は図３の半導体装置の
側面図である。[0017] Example 2 FIG. 3 is a front view showing a state in which the semiconductor device according to the second embodiment mounted on the circuit board of the present invention, FIG. 4 is a side view of the semiconductor device in FIG.

【００１８】これらの図において、１3 は半導体装置の
全体を示し、２3 は樹脂封止部、４3 は外部リード、６
3 は回路基板、１０3 は金属配線層、１２3 は半田、１
８3は接着剤である。[0018] In these figures, 1 3 shows the entire semiconductor device, 2 3 resin sealing portion, 4 3 external leads, 6
3 is a circuit board, 10 3 is a metal wiring layer, 12 3 is solder, 1
8 3 is an adhesive.

【００１９】この実施例の特徴は、樹脂封止部２3 の左
右の各側端面から図において横方向に突出し、更に下方
に向けて折曲され、上記の外部リード４3 とは別に電気
的に切り離された支柱本体と、この支柱本体の下端部に
おいて外形寸法が余分に大きくならないように内側に折
り曲げられた支柱固定部１６3 からなる支柱１４ 3 が形
成されていることである。The feature of this embodiment, protrude from the side end faces of the left and right of the resin sealing portion 2 3 in the lateral direction in FIG., Is further bent downward, separately electrically from the external lead 4 3 above a post body, separated in the lower end portion of the strut body
It is that the struts 14 3 Oite outside dimension consists post fixing portion 16 3 which are bent inwardly so as not to be excessively large is formed.

【００２０】この支柱１４3 の支柱本体は、実施例１の
場合と同様に、たとえば、樹脂封止部２3 の内部に予め
埋設された放熱板やダイパッドから延設して形成しても
よく、また、独自の部材を用いてその端部が樹脂封止部
２3 に埋設されたものとしてもよい。[0020] forming the supports 14 3 posts body, as in the case <br/> Example 1, for example, to extend from the pre-buried radiating plate and the die pad in the resin sealing portion 2 3 it may be, or may be those whose ends are embedded in the resin sealing portion 2 3 using a unique member.

【００２１】上記構成の半導体装置１3 の回路基板６3
への実装の仕方は、実施例１の場合と同様の手順により
行われる。The circuit board 6 3 of the semiconductor device 1 3 of the above structure
The method of mounting on the server is performed in the same procedure as in the first embodiment.

【００２２】実施例３ 図５は本発明の実施例３に係る半導体装置の実装状態を
示す斜視図である。Embodiment 3 FIG. 5 is a perspective view showing a mounted state of a semiconductor device according to Embodiment 3 of the present invention.

【００２３】上述した各実施例１〜２では、支柱１
４1 ，１４3 を回路基板６1 ，６ 3 の一面に固定するよ
うにしているが、この実施例の半導体装置１4 では、樹
脂封止部２4 の左右の各側端面からそれぞれ支柱１４4
の支柱本体を張り出し、その支柱本体の先端部を図にお
いて手前側に折り曲げて支柱固定部１６4 を形成し、こ
の支柱固定部１６4 を放熱フィン１８4 に固定すること
により、半導体装置１4 全体を垂直に立てた状態に保持
するようにしている。なお、４ 4 は外部リードである。In each of the first and second embodiments, the support 1
4 1, 1 4 3 but be fixed to the one surface of the circuit board 6 1, 6 3, in the semiconductor device 1 4 of this embodiment, each of the side end faces of the left and right of the resin sealing portion 2 4 post 14 4
Overhanging the strut body, your tip portion of the strut body in FIG.
There is formed a support post fixing portion 16 4 is bent to the front side, by fixing the support post fixing portion 16 4 to the heat dissipating fins 18 4, and to hold the upright the entire semiconductor device 1 4 vertically . In addition, 4 4 is an external lead.

【００２４】以上の各実施例１〜３では、支柱を左右２
本設けているが、これに限定されるものではなく、樹脂
封止部の寸法が大きい場合には、３本以上設けることも
でき、逆に寸法形状の小さいものでは、支柱を１本だけ
設けてもよい。The above in the Examples 1 3 left struts 2
Although this is provided, the present invention is not limited to this. When the size of the resin sealing portion is large, three or more can be provided. Conversely, when the size and shape are small, only one support is provided. You may.

【００２５】[0025]

【発明の効果】本発明によれば、樹脂封止部から外部リ
ードとは別個に支柱を突設し、この支柱の支柱固定部
を、外部リードのリード固定部と共に回路基板の一面に
装着し、あるいは支柱固定部を放熱体等に装着すること
により、装置全体を垂直に立てた状態で保持出来るよう
にしたので、従来のように外部リードを回路基板のスル
ーホールに貫通させる必要がなく、したがって、回路基
板の両面実装が可能となる。しかも、回路基板のスルー
ホールは多層配線などに利用できるので、従来よりも一
層実装密度を高めることができるようになる。また支柱
固定部とリード固定部の折曲あるいは湾曲は同一工程で
一括成形することができるため、両者の位置精度を高め
ることが可能となる。さらに、支柱は放熱作用も果たす
から、信頼性も高くなる等の優れた効果を奏する。According to the present invention, a column is provided separately from the external lead from the resin sealing portion, and the column fixing portion of the column is provided.
On one side of the circuit board together with the lead fixing part of the external lead.
By mounting to or mounting the strut fixing portion to the heat radiating member or the like, since the so that can hold in a standing state the entire apparatus vertically, scan Le <br/> conventional circuit board external leads as it is not necessary to pass transmembrane to Horu, therefore, it is possible to double-sided mounting of the circuit groups <br/> board. Moreover, since the through holes of the circuit board can be used, such as a multi-layer wiring, it is possible to further enhance a packing density than the conventional. Also prop
The bending or bending of the fixing part and the lead fixing part are performed in the same process.
Because they can be molded at once, the positional accuracy of both is improved
It becomes possible. Further, since the pillar also has a heat radiation effect, it has excellent effects such as high reliability.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の実施例１に係る半導体装置を回路基板
に実装した状態を示す正面図である。FIG. 1 is a front view showing a state where a semiconductor device according to a first embodiment of the present invention is mounted on a circuit board.

【図２】図１の半導体装置の側面図である。FIG. 2 is a side view of the semiconductor device of FIG. 1;

【図３】本発明の実施例２に係る半導体装置を回路基板
に実装した状態を示す正面図である。FIG. 3 is a front view showing a state where a semiconductor device according to a second embodiment of the present invention is mounted on a circuit board.

【図４】図３の半導体装置の側面図である。FIG. 4 is a side view of the semiconductor device of FIG. 3 ;

【図５】本発明の実施例３に係る半導体装置の実装状態
を示す斜視図である。FIG. 5 is a perspective view showing a mounting state of a semiconductor device according to a third embodiment of the present invention.

【図６】従来の半導体装置を回路基板に実装した状態を
示す正面図である。FIG. 6 is a front view showing a state in which a conventional semiconductor device is mounted on a circuit board.

【符号の説明】[Explanation of symbols]

１1 ，１ 3 ，１4 …半導体装置、２1 ，２ 3 ，２4 …樹
脂封止部、４1 ，４ 3，４4 …外部リード、６1 ，６ 3
…回路基板、１４1 ，１４3 ，１４4 …支柱、１６1 ，
１６3 ，１６4 …支柱固定部。1 1, 1 3, 1 4 ... semiconductor device, 2 1, 2 3, 2 4 ... resin sealing portion, 4 1, 4 3, 4 4 ... external lead, 6 1, 6 3
... circuit board, 14 1, 1 4 3, 14 4 ... post, 16 1,
1 6 3, 16 4 ... post fixing unit.

Claims (4)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】 ＩＣチップと、このＩＣチップに電気的
に接続された複数の外部リードと、これらを一体に封止
する樹脂封止部とを有し、上記各外部リードは上記樹脂
封止部の所定の側端面から互いに並行して突出するよう
にされた半導体装置において、上記各外部リードの先端
部に湾曲したリード固定部を形成すると共に、上記樹脂
封止部から突出し、上記各外部リードと電気的に切り離
された支柱本体と、この支柱本体の一部を折曲して形成
された支柱固定部とを有する支柱を設け、上記リード固
定部を回路基板の一面に装着し、上記支柱固定部を上記
一面に装着するようにしたことを特徴とする半導体装
置。1. An IC chip and an electrical connection to the IC chip.
Multiple external leads connected to the device and sealing them together
And each of the external leads is made of the above-mentioned resin.
Project from the predetermined side end surface of the sealing part in parallel with each other
In the semiconductor device described above, the tip of each of the above external leads
A curved lead fixing part is formed in the
Protrudes from the sealing part and is electrically separated from each of the above external leads
Of the main body and a part of the main body
A support having a fixed support portion is provided,
Attach the fixed part to one side of the circuit board, and
A semiconductor device characterized by being mounted on one surface . 【請求項２】 ＩＣチップと、このＩＣチップに電気的
に接続された複数の外部リードと、これらを一体に封止
する樹脂封止部とを有し、上記各外部リードは上記樹脂
封止部の所定の側端面から互いに並行して突出するよう
にされた半導体装置において、上記各外部リードの先端
部に湾曲したリード固定部を形成すると共に、上記樹脂
封止部から突出し、上記各外部リードと電気的に切り離
された支柱本体と、この支柱本体の一部を折曲して形成
された支柱固定部とを有する支柱を設け、上記リード固
定部を回路基板の一面に装着し、上記支柱固定部を上記
回路基板の一面の近傍に配置された放熱体に装着するよ
うにしたことを特徴とする半導体装置。 2. An IC chip, and an IC chip electrically connected to the IC chip.
Multiple external leads connected to the device and sealing them together
And each of the external leads is made of the above-mentioned resin.
Project from the predetermined side end surface of the sealing part in parallel with each other
In the semiconductor device described above, the tip of each of the above external leads
A curved lead fixing part is formed in the
Protrudes from the sealing part and is electrically separated from each of the above external leads
Of the main body and a part of the main body
A support having a fixed support portion is provided,
Attach the fixed part to one side of the circuit board, and
Attach it to a radiator located near one side of the circuit board
A semiconductor device, characterized in that: 【請求項３】 各外部リードと支柱本体とは、樹脂封止
部の同じ側端面から突出するようにされたことを特徴と
する請求項１または請求項２記載の半導体装置。3. Each of the external leads and the column body are resin-sealed.
And protruded from the same side end face of the part
The semiconductor device according to claim 1 or 2, wherein 【請求項４】 各外部リードと支柱本体とは夫々、樹脂
封止部の異なる側端面から突出するようにされたことを
特徴とする請求項１または請求項２記載の半導体装置。4. Each of the external leads and the column body are made of resin.
That it protrudes from the different side end faces of the sealing part
The semiconductor device according to claim 1 or 2, wherein
JP3193983A 1991-08-02 1991-08-02 Semiconductor device Expired - Lifetime JP2612114B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3193983A JP2612114B2 (en) 1991-08-02 1991-08-02 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3193983A JP2612114B2 (en) 1991-08-02 1991-08-02 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH0536888A JPH0536888A (en) 1993-02-12
JP2612114B2 true JP2612114B2 (en) 1997-05-21

Family

ID=16317025

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3193983A Expired - Lifetime JP2612114B2 (en) 1991-08-02 1991-08-02 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2612114B2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0729534Y2 (en) * 1989-07-07 1995-07-05 和泉電気株式会社 Switch with indicator
JPH077117A (en) * 1993-04-28 1995-01-10 Nec Corp Electronic component
JP3150253B2 (en) * 1994-07-22 2001-03-26 三菱電機株式会社 Semiconductor device, its manufacturing method and mounting method
US5944199A (en) * 1997-11-25 1999-08-31 Micron Technology, Inc. Integrated circuit package support system
JP5312690B2 (en) 2010-06-07 2013-10-09 三菱電機株式会社 Heat sink and manufacturing method thereof

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60163756U (en) * 1984-04-06 1985-10-30 関西日本電気株式会社 electronic components
JPS63170967U (en) * 1987-04-27 1988-11-07
JPH04171752A (en) * 1990-11-06 1992-06-18 Micron Technol Inc Gull-wing zigzag in-line-lead package with package terminal anchor pin

Also Published As

Publication number Publication date
JPH0536888A (en) 1993-02-12

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