JP2597676B2

JP2597676B2 - Composite operational amplifier

Info

Publication number: JP2597676B2
Application number: JP24381988A
Authority: JP
Inventors: 秀雄日下部
Original assignee: Toshiba Corp
Current assignee: Toshiba Corp
Priority date: 1988-09-30
Filing date: 1988-09-30
Publication date: 1997-04-09
Anticipated expiration: 2012-04-09
Also published as: JPH0294705A

Description

【発明の詳細な説明】〔発明の目的〕（産業上の利用分野）高速、高精度のパルス増幅器（電子ビーム露光装置の
偏向増幅器）（従来の技術）従来技術を図２に示す。図２に於て高速演算増幅器
（OP11）１のマイナス入力の誤差を高増幅度演算増幅器
（OP21）２により検出し、高速演算増幅器（OP11）１の
プラス入力に補正する。パルスが抵抗（R11）３に入力
された時、高速演算増幅器（OP11）１の遅延により、高
速演算増幅器（OP11）１のマイナス入力には微分波形が
発生する。この微分波形は抵抗（R51）４、容量（C1）
５、高速度演算増幅器（OP21）２により積分され、高速
演算増幅器（OP11）１のプラス入力を変動させ、出力誤
差を大きくする。また、この誤差は入力の振幅に依存す
る。[Purpose of the Invention] (Industrial application field) High-speed and high-precision pulse amplifier (deflection amplifier of electron beam exposure apparatus) (Prior art) FIG. 2 shows a conventional technique. In FIG. 2, the error of the negative input of the high-speed operational amplifier (OP11) 1 is detected by the high-amplification operational amplifier (OP21) 2 and corrected to the positive input of the high-speed operational amplifier (OP11) 1. When the pulse is input to the resistor (R11) 3, a differential waveform is generated at the minus input of the high-speed operational amplifier (OP11) 1 due to the delay of the high-speed operational amplifier (OP11) 1. This differential waveform has resistance (R51) 4 and capacitance (C1)
5. The positive input of the high-speed operational amplifier (OP11) 1 is varied by being integrated by the high-speed operational amplifier (OP21) 2, thereby increasing the output error. This error also depends on the amplitude of the input.

（発明が解決しようとする課題）高速演算増幅器（OP11）１の遅延により、発生する微
分波形を抑えて高速、高精度の複合演算増幅器をえる。(Problems to be Solved by the Invention) Due to the delay of the high-speed operational amplifier (OP11) 1, a differential waveform to be generated is suppressed and a high-speed, high-accuracy composite operational amplifier is obtained.

[Configuration of the invention]

（課題を解決するための手段）高速演算増幅器の遅延時間を考慮した誤差検出出力を
高増幅度演算増幅器により高速演算増幅器のプラス入力
に補正を加えた複合演算増幅器（作用）高速演算増幅器の遅延により誤差検出の高増幅度演算
増幅器に発生する微分波形をスピードアップ・コンデン
サC1で抑えた複合演算増幅器（実施例）第１図は複合演算増幅器を示す回路構成図である。図
中11、12は演算増幅器（OP）、16は外部入力端子、17は
外部出力端子、21〜25は抵抗R1〜R5、26〜27はコンデン
サＣ、C1を示す。(Means for Solving the Problems) A composite operational amplifier in which an error detection output in consideration of a delay time of a high-speed operational amplifier is corrected to a plus input of the high-speed operational amplifier by a high-amplification operational amplifier. FIG. 1 is a circuit diagram showing a composite operational amplifier in which a differential waveform generated in a high-amplification operational amplifier for error detection is suppressed by a speed-up capacitor C1. In the figure, 11 and 12 are operational amplifiers (OP), 16 is an external input terminal, 17 is an external output terminal, 21 to 25 are resistors R1 to R5, and 26 to 27 are capacitors C and C1.

OP11の−入力端と外部入力端子16との間には抵抗R1が
接続され、外部出力端17に接続されたOP11の出力端と−
入力端との間には抵抗R2が接続されている。外部入力端
子16と外部出力端子との間には抵抗R4とコンデンサC1と
が並列接続され、この並列接続と抵抗R3が直列に接続さ
れている。抵抗R3、R4の接続点は抵抗R5を介してOP12の
−入力端に接続されている。OP12の＋入力端は接地さ
れ、−入力端と出力端の間にコンデンサＣが接続されて
いる。OP12、抵抗R5、コンデンサＣから積分回路が構成
され、この積分回路の出力がOP11の＋入力端に与えられ
る。A resistor R1 is connected between the-input terminal of OP11 and the external input terminal 16, and the output terminal of OP11 connected to the external output terminal 17 is connected to-
A resistor R2 is connected between the input terminal and the input terminal. A resistor R4 and a capacitor C1 are connected in parallel between the external input terminal 16 and the external output terminal, and the parallel connection and the resistor R3 are connected in series. A connection point between the resistors R3 and R4 is connected to a negative input terminal of the OP12 via a resistor R5. The positive input terminal of OP12 is grounded, and a capacitor C is connected between the negative input terminal and the output terminal. OP12, a resistor R5, and a capacitor C form an integration circuit, and the output of this integration circuit is given to the + input terminal of OP11.

OP11の特性がＡ（Ｓ）＝A1/（１＋sT）で、入力e1が加わってもOP12の出力e5が変化せず、e5＝
０の場合、第１図は第２図と等価である。The characteristic of OP11 is A (S) = A1 / (1 + sT). Even if input e1 is added, output e5 of OP12 does not change, and e5 =
In the case of 0, FIG. 1 is equivalent to FIG.

第２図の回路のラプラス変換は（e1−e3）/R1＝（e3−e2）/R2 …（１） e2＝−e3＊Ａ（ｓ） …（２）Ａ（ｓ）＝A1/（１＋sT） …（３）である。（１）（３）式を（２）に代入し、e2について
整理すると e2＝−（R2/R1）＊A1＊e1/｛１＋A1＋（R1/R2）｝＋｛（R1＋R2）＊sT/R2｝ …（４）となる。一般にA1》１であるから e2＝−（R2/R1）＊e2/｛１＋sT（R1＋R2）／（A1＊R
2）｝となる。T1＝｛（R1＋R2）／（R2＊A1）｝＊Ｔとおけば e2＝｛−（R2/R1）／（１＋sT）｝e1 …（６）（６）式のステップ応答は e2＝｛−（R2/R1）／（１＋sT）｝（e1/s） …（７）となる。（７）式をラプラス逆変換すると e2＝−（R2/R1）｛１−exp（−t/T1）｝ …（８）となる。The Laplace transform of the circuit of FIG. 2 is (e1-e3) / R1 = (e3-e2) / R2 (1) e2 = -e3 * A (s) (2) A (s) = A1 / (1 + sT) ) (3) Substituting the equations (1) and (3) into (2) and rearranging for e2, e2 =-(R2 / R1) * A1 * e1 / {1 + A1 + (R1 / R2)} + {(R1 + R2) * sT / R2} ... (4) Generally, A1 >> 1, so e2 = − (R2 / R1) * e2 / ｛1 + sT (R1 + R2) / (A1 * R
2) It becomes｝. T1 = {(R1 + R2) / (R2 * A1)} * T e2 = {− (R2 / R1) / (1 + sT)} e1 (6) The step response of equation (6) is e2 = ｛− ( R2 / R1) / (1 + sT)｝ (e1 / s) (7) When the equation (7) is subjected to Laplace inversion, e2 = − (R2 / R1) {1−exp (−t / T1)} (8)

第３図は出力e2を補正を説明するための回路である。
入力e1にステップ電圧を入力した時のe2（（８）式で決
まる波形）、e4、OP12の出力e5の波形を第４図に示す。FIG. 3 is a circuit for explaining the correction of the output e2.
FIG. 4 shows the waveforms of e2 (waveform determined by equation (8)), e4, and output e5 of OP12 when a step voltage is input to input e1.

e4、e5の波形で破線はコンデンサC1がない場合、実線
はコンデンサC1で補正した場合の波形である。このよう
な過渡期にはOP12の出力e2は応答しないのが理想であ
る。そこで、コンデンサC1の容量を調整して、OP12の出
力e5が変化しないようにする。In the waveforms of e4 and e5, the broken line is the waveform when the capacitor C1 is not provided, and the solid line is the waveform when the correction is performed by the capacitor C1. Ideally, the output e2 of the OP12 does not respond during such a transition period. Therefore, the capacity of the capacitor C1 is adjusted so that the output e5 of the OP12 does not change.

第１図に戻って、演算増幅器OP12の出力e5は入力e1、
演算増幅器OP11の出力e2の過渡期に無関係になり、演算
増幅器OP11の高速性を損なうことなく、演算増幅器OP12
の大きな増幅度により、演算増幅器OP11のドリフト、サ
ーマルテールを改善する。Returning to FIG. 1, the output e5 of the operational amplifier OP12 is the input e1,
It becomes irrelevant to the transition period of the output e2 of the operational amplifier OP11, and without impairing the high-speed performance of the operational amplifier OP11,
Improves the drift and thermal tail of the operational amplifier OP11.

〔The invention's effect〕

演算増幅器OP12の出力e5は入力e1、演算増幅器OP11の
出力e2の過渡期に無関係になり、増幅度の低い演算増幅
器OP11のドリフト、サーマルテールを増幅度の大きい演
算増幅器OP12で改善する。一方、演算増幅器OP11の高速
性は損なわれることなく、高精度で、かつ高速な複合演
算増幅器が実現できる。The output e5 of the operational amplifier OP12 becomes irrelevant to the transition period of the input e1 and the output e2 of the operational amplifier OP11, and the drift and thermal tail of the operational amplifier OP11 with low amplification are improved by the operational amplifier OP12 with high amplification. On the other hand, a high-accuracy and high-speed composite operational amplifier can be realized without impairing the high-speed performance of the operational amplifier OP11.

[Brief description of the drawings]

第１図は複合演算増幅器の回路構成図、第２図は複合演
算増幅器の回路構成図、第３図は複合演算増幅器の説明
図、第４図は複合演算増幅器の各部の波形図である。 OP11…演算増幅器高速タイプ OP12…演算増幅器高精度タイプFIG. 1 is a circuit configuration diagram of the composite operational amplifier, FIG. 2 is a circuit configuration diagram of the composite operational amplifier, FIG. 3 is an explanatory diagram of the composite operational amplifier, and FIG. 4 is a waveform diagram of each part of the composite operational amplifier. OP11: High-speed operational amplifier type OP12: High-precision operational amplifier type

Claims

(57) [Claims]

1. A composite operational amplifier comprising a first operational amplifier which amplifies a large signal and has a high DC amplification degree but a low DC amplification degree and a second operational amplifier which amplifies a small signal and has a large DC amplification degree. The voltage is input to the negative input of the first operational amplifier through a resistor R1 and the output voltage of the first operational amplifier through a resistor R1.
(R3 = k * R1, k is a positive real number) and the negative input of the second operational amplifier through the resistor R5, and the output voltage of the first operational amplifier is connected in parallel with the resistor R4 (R4 = k * R2). Capacity C
1. Input to the negative input of the second operational amplifier through the resistor R5, the positive input of the second operational amplifier is grounded, and the output voltage of the second operational amplifier is connected to the negative input of the second operational amplifier through the capacitor C. A combined operational amplifier, wherein the output voltage of the second operational amplifier is connected to the plus input of the first operational amplifier to obtain high speed and high accuracy.