JPS59183516A - Negative feedback circuit of agc amplifier - Google Patents

Abstract

PURPOSE:To attain purely a differential offset by utilizing a signal being a difference of maximum values between a non-inverting output and an inverting output and correcting an offset voltage to eliminate the effect of a common mode signal including a DC voltage at the output side. CONSTITUTION:The non-inverting output signal 112 and the inverting output signal 113 are expressed respectively as VP=VPO+(Avi/2) and VN=VNO-(Avi/2), and in equations, where A is a differential gain of the amplifier, vi is an input signal voltage and VPO, VNO are respectively DC components. An output VP' of an amplitude detecting circuit 102 is expressed as VP'=VPO+(Avi'/2), where vi' is the maximum value of the input signal and an output VN' of a detecting circuit 103 is expressed as VN'=VNO. An output voltage VC of a difference circuit 106 via an adder circuit 104 is expressed as VC=VPO+VNO+(Avi'/2)- VT, where VT is a reference voltage. Since the sum VPO+VNO is constant, when the relation of VPO+VNO-VT=-(Avt'/2) is set where vt' is a reference voltage vt' converted into the input as the definition, the VC becomes as VC=A(vi'-vt')/ 2 and the effect of the DC offset voltage is not given onto an output voltage of the difference circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides automatic gain control (AGC).
(Abbreviation for cGain Control)) It relates to a negative feedback circuit for an amplifier, and particularly to a differential AGC amplifier suitable for LSI integration.

Conventionally, this type of circuit has often been constructed from individual components or a hybrid integrated circuit, and even if it has been realized as an integrated circuit, it has only been small-scale. For this reason, an AC coupling method (coupling using inductance or capacitance) was often used for coupling between amplifier circuits. As integrated circuit technology advances, it has become possible to integrate large-scale analog circuits, but as is well known, methods that use inductance or capacitance between stages are not suitable for integration, so a DC coupling method was adopted. I have to. In this case, correction of the DC offset voltage becomes a problem.

An object of the present invention is to provide a negative feedback circuit including a differential offset voltage correction circuit and a gain control circuit suitable for a differential AGC amplifier integrated in one stage or in multiple stages. The present invention provides a negative feedback circuit suitable for an amplifier circuit that amplifies polar pulse signals.

When performing gain control in a differential AGC amplifier whose internal circuit is DC-coupled, the DC component contained in the output signal is removed and only the signal voltage is detected as a negative feedback signal, without performing gain control. must not. Furthermore, in order to correct the differential offset voltage, it is necessary to detect only the differential offset voltage and use it as a negative feedback signal. The present invention provides a new circuit system that can effectively perform these two negative feedback operations.

The present invention provides two amplitude detection circuits for detecting the amplitudes of a positive-phase output voltage and a negative-phase output voltage of a single-stage or multi-stage differential type AGC amplifier circuit, a summation circuit for calculating the sum of the outputs of the two amplitude detection circuits, and the above-mentioned A first difference circuit that takes the difference between the outputs of the two amplitude detection circuits, and a second difference circuit that takes the difference between the output of the summation circuit and a reference voltage, and uses the output signal of the first difference circuit. to control the offset voltage of the differential type AGC amplifier circuit, and control the gain of the differential type AGC amplifier using the output signal of the second difference circuit.
This is a GC amplifier negative feedback circuit.

FIG. 1 shows a system diagram of an AGC amplifier negative feedback circuit according to the present invention. 101 is a differential AGC amplifier circuit;
09 and 110 are its positive phase input terminal and negative phase input terminal,
112 and 113 are its positive phase output terminal and negative phase output terminal. Further, 111 is a gain control input terminal. 102
and 103 are an amplitude detection circuit for the positive phase output 112 and an amplitude detection circuit for the negative phase output 113, respectively. 10
4 is a summation circuit which calculates the sum of the outputs of the amplitude detection circuits 102 and 103. 105 is a first difference circuit which takes the difference between the outputs of the amplitude detection circuits 102 and 103. 106 is a second difference circuit which takes the difference between the output of the summation circuit 104 and the reference voltage T (114). 107
is an amplifier circuit that amplifies the output of the first difference circuit 105 and outputs it as a DC offset correction signal to the differential AGC amplifier circuit 10.
This is applied to the negative phase input terminal 110 of No. 1.

108 also amplifies the output of the second difference circuit 106 with a wide width circuit and applies it to the gain control input terminal 111 of the differential type AGC amplifier circuit 101 as a gain control signal.

Next, the operation of the above-mentioned AGC amplifier negative feedback circuit will be briefly explained. Positive phase output signal 112 and negative phase output signal 113
are expressed by the following formulas.

However, (1) and (2) are the total voltages at the positive-phase and negative-phase output terminals, and VPo and VNo are their respective DC components. A is the differential gain of the amplifier, and Vi is the signal voltage applied to the input terminal 104. Similarly to the amplitude detection circuit 102, the output ■ of the maximum value detection circuit 103 is ■=■ ...scream... 藺...
Four times...Tap...Song (3) N N
.

becomes. Therefore, the second difference circuit 1 is passed through the sum circuit 104.
06 output voltage■. Assuming that the reference voltage is ■A,■
A~vc=vpo+VNO+-Av
It is expressed as iVT...kawa...kawa (4). Here, from the characteristics of the differential amplifier circuit, ■ 10■ is constant, so it is the reference voltage PON in terms of input.

If the voltage v1 is defined, the output voltage of the second difference circuit 106 can be made proportional only to the difference between the input signal v1 and the reference voltage Vl, and the influence of the DC offset voltage can be ignored. (can do.

On the other hand, the output voltage (■) of the first difference circuit 105 and the multi-input converted DC offset voltage VFo are defined as (Po-■). =AVFo・・・・・・・・・・・・
・・・・・・・・・・・・・・・ (8) (The method is 1 VF=A(V,.-Tvi)・・・・・・・・・・・・
(9) If VFo is smaller than the amplitude of the input signal, then the output of the first difference circuit 105 will be equal to 10 times the maximum value of the input signal. That is, the offset correction circuit of this system works so as to generate a residual offset of 14 times the peak value of the input signal on the input side, so that the linear portion of the differential circuit can be used most effectively. Therefore, it is extremely effective when amplifying unipolar signals.

Next, the transistor 201.202 and the resistor 204.205 configure a differential amplification circuit, which shows the embodiment of the amplitude detection circuit in Fig. 2. Resistor 206 and capacitor 207 constitute a maximum voltage holding circuit. Input end 2
Only when the signal voltage input to 08 is higher than the voltage held by capacitor 207, emitter follower 203 is activated, a new voltage is charged to capacitor 207 through resistor 206, and the maximum voltage is maintained.

FIG. 3 shows an embodiment of the summation circuit 104.Resistor 301°30
2 constitutes a sum circuit, transistor 303 and resistor 304
constitutes an emitter follower circuit as an output buffer circuit of the sum circuit. Now, if voltage V□ is applied to the input terminal 305 and voltage ■2 is applied to the input terminal 306, then the output terminal 30
The voltage 6 obtained at 7 is calculated by assuming that the resistors 301 and 302 are equal, ignoring the base current of the transistor 3030, and setting its pace emitter voltage drop to VBE, then V6 = (V + 2) - VF, B...・・・・・・
......(11) The sum voltage can be obtained (■B
F can be interpreted as a DC level shift) If a differential circuit widely known as the first difference circuit 105 and the second difference circuit 106 is used, the amplification function can be used to create the amplifier circuits 107 and 108. It is also possible to use both.

Further, even if the second difference circuit 106 is mixed with the amplifier circuit 108 and the reference voltage (1) etc. cannot be clearly distinguished on the surface, this is within the scope of the present invention.

The features of the AGC amplifier negative feedback circuit according to the present invention described above are summarized below.

(1) By correcting the offset voltage using the signal of the difference between the maximum values of the positive-phase output and the negative-phase output, the influence of the common-mode signal including the DC voltage on the output side can be removed, Purely differential offset correction becomes possible.

(2) By further correcting the offset voltage using the difference signal between the maximum values of the positive phase output and the differential phase output, it is possible to leave a residual offset voltage equivalent to 1/2 of the amplitude of the single polarity input signal, The linear portion of the differential amplifier circuit can be used most effectively for signal amplification.

(3) By performing gain control based on the difference between the sum signal of the maximum value of the positive phase output and negative phase output and the reference voltage ■1,
The influence of the differential offset voltage on gain control can be removed, and gain control that depends purely on the output signal voltage becomes possible.

[Brief explanation of drawings]

FIG. 1 shows a configuration example of an AGC amplifier negative feedback circuit according to the present invention, FIG. 2 shows an embodiment of an amplitude detection circuit, and FIG. 3 shows an embodiment of a summation circuit. In the figure, 101... differential type AGC amplifier circuit, 102, 103... detection circuit, 104
...sum circuit, 105...first difference circuit, 106...second difference circuit, 107.108
......Amplification circuit, 109, 1.10...
Input terminal, 111... Gain control input terminal, 112° 113... Output terminal, 114... Reference voltage VT, 201° 202.203... Transistor , 204.205. 206...Resistor, 207...Capacitor, 208...Input terminal, 209...
Output end, 301, 302, 304...Resistance,
303...Transistor, 305.306...
. . . input terminal, 307 . . . output terminal.・'F・ Agent: Susumu Uchihara, patent attorney

Claims (1)

[Claims] Two amplitude detection circuits that detect the amplitudes of the positive-phase output voltage and the negative-phase output voltage of the differential AGC amplifier circuit, a summation circuit that sums the outputs of the two amplitude detection circuits, and the two amplitude detection circuits. and a second difference circuit that takes the difference between the output of the sum circuit and a reference voltage, and uses the output signal of the first difference circuit to calculate the difference. Dynamic AGC
An AGC amplifier negative feedback circuit, characterized in that the offset voltage of the amplifier circuit is controlled, and the gain of the differential ghaC amplifier circuit is controlled using the output signal of the second difference circuit.