JP2592656B2 - Testing method of AD converter with multiplexer - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a test method for an AD converter having a multiplexer in an input stage.

[Prior art] The conventional test method uses a single variable voltage source with a multiplexer.
Connected to one channel of the AD converter, the voltage value of the voltage source is simply changed from zero scale to full scale in 1 / N steps of the LSB of the AD converter, and the AD conversion output is loaded into the buffer memory. In addition, the linearity check for finding the transition point of the output was performed.

"Problems to be solved by the invention" Conventionally, static measurement was performed by simply changing the input value one step at a time. However, in practice, the input dynamically changed, and the test was different from actual operation. I was

The measurement is performed by changing the input voltage one step at a time. However, since there is a so-called settling time until the voltage changed by one step is stabilized, the measurement is stopped during this settling time. Need
Due to the very large number of measurements, waiting times of a few milliseconds cannot be ignored.

[Means for Solving the Problems] According to the present invention, two variable voltage sources are connected to an AD converter with a multiplexer under test, and channel selection, AD conversion, AD conversion output capture, and change in input value are performed. A series of operations are performed alternately for each channel. A change in the input value causes one to change from zero scale to full scale and the other to change from full scale to zero scale.

FIG. 1 shows an embodiment of the present invention. The AD converter 11 with a multiplexer under test has a multiplexer 12 at the input stage, and the channel selected by the multiplexer 12 is the AD converter.
Connected to 13. Multiplexer 12 is address latch 14
The selection control is performed based on the address latched in the control. The control logic 15 performs AD conversion mode selection and channel selection.

In the present invention, the variable voltage sources 16 and 17 are connected to the AD converter 11 with a multiplexer. In this example, variable voltage sources 16 and 17 are connected to the first channel CH1 and the fourth channel CH4, respectively. Address latch from pattern generator 18
The address latched to 14, that is, the channel to be selected is output, and the entire operation clock CLK and the conversion start command START of the AD converter 13 are output. Further, the pattern generator 18 controls the variable voltage sources 16 and 17 and the generated voltage.

Variable voltage source 16 is from zero scale to full scale,
It is changed in steps of 1 / N of the LSB of the AD converter 13. On the other hand, the variable voltage source 17 is changed from full scale to zero scale in steps of 1 / N of the LSB of the AD converter 13. The first channel is applied to the address latch 14 for each step change.
The addresses of CH1 and the fourth channel CH4 are alternately latched.

With respect to the operation clock shown in FIG. 2A, an address for selecting a channel is generated as shown in FIG. 2B, an AD conversion start command is generated as shown in FIG. 2C, and FIG. As shown, the A / D conversion output is taken out, the voltage setting for the variable voltage sources 16 and 17 is performed as shown in FIGS. 2E and 2F, and the A / D conversion output is taken into the buffer memory as shown in FIG. 2G. It is.

Channel selection is performed at the time shown in FIG.
The conversion is performed, and the AD conversion output is taken into the buffer memory at the time, and the voltage of the variable voltage source is changed at the time.

Since the variable voltage sources 16 and 17 are alternately selected as described above, a test can be performed without being affected by the settling time of the variable voltage sources. Further, the variable voltage source 16 changes from zero scale to full scale, and the variable voltage source 17 changes from full scale to zero scale, so that the output code is as shown in FIG. The voltage changes dynamically, and a test close to actual operation is performed.

Although two variable voltage sources are used in the above description, three or more variable voltage sources may be used.

[Effect of the Invention] As described above, according to the present invention, since the channels are alternately selected, the test can be performed without being affected by the settling time of the variable voltage sources 16 and 17, and the test can be shortened accordingly. The test can be carried out. Variable voltage source 16,1
Change one of 7 from zero scale to full scale,
Since the other is changed from full scale to zero scale and these voltages are alternately converted into analog signals, the input of the AD converter 13 dynamically changes, and a test close to actual operation can be performed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a time chart showing an operation example thereof, and FIG. 3 is a diagram showing a change state of an output.

Claims (1)

(57) [Claims] 1. An AD converter with a multiplexer under test
Connect two variable voltage sources, perform a series of operations of channel selection, AD conversion, capture of AD conversion output, and change of input value alternately for each channel, and change one of the input values from zero scale to full scale. A method of testing an AD converter with a multiplexer that changes the other and changes the other from full scale to zero scale.