JPH05102852A - A/d converting device - Google Patents

Abstract

PURPOSE:To enable the test of a digital part even without impressing an analog signal for test from the outside by setting a comparative value corresponding to the output of a comparator to a comparative value register by a software in a test mode and changing-over a switch so as to impress this comparative value to a successively comparative register. CONSTITUTION:A switch 7 is changed over so as to connect a comparative value setting register 8 and a successively comparative register 5. Thus, an analog part composed of an analog input pin 2, digital/analog (D/A) converter 3 and comparator 4 can be separated from a digital part composed of the comparative value setting register 8 and successively comparative register 5, and one bit of the comparative value setting register 8 can be freely set as the output of the comparator 4 by the software. Therefore, since an expected value can be written in the successively comparative register 5, the range of control to be executed for the test can be made wider.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog / digital converter having a function of sequentially comparing analog signals to convert them into digital signals and having a test function for the result of analog / digital conversion.

[0002]

2. Description of the Related Art FIG. 2 is a block diagram showing the configuration of a conventional analog / digital converter. In FIG. 2, 2 is an analog input pin for inputting an analog signal from the outside, 3 is a digital / analog (D / A) converter for converting the digital signal of the successive approximation register into an analog signal,
Reference numeral 4 is a comparator for successively comparing the analog signal from the analog input pin 2 and the analog signal from the digital / analog converter 3, 5 is a successive approximation register for sequentially storing the digital signal of the comparison result from the comparator 4, and 1 is an analog It is a control circuit that controls the operation timing of the input pin 2 and the successive approximation register 5.

Next, the operation will be described. When performing writing and reading tests on the successive approximation register 5 which is the digital section of the analog / digital converter, for example, a known analog signal (analog voltage) is supplied to the analog input pin 2 using the test digital / analog converter 6. To enter. The comparator 4 sequentially compares the analog signal input to the analog input pin 2 and the analog signal from the digital / analog converter 3, converts the analog signal into a digital signal, and stores the digital signal in the successive approximation register 5. The contents of the successive approximation register 5 are read out and converted into an analog signal by the digital / analog converter 3, the comparator 4 again compares the analog signal with the analog signal from the analog input pin 2, and the digital signal of the comparison result is obtained. Store in successive approximation register 5. Therefore, by reading the digital signal stored in the successive approximation register 5,
It is possible to test writing and reading with respect to the successive approximation register 5.

[0004]

Since the conventional analog / digital converter is constructed as described above, the controllability of the test is poor (the range of control that can be performed for the test is narrow), and it is expected. In order to write the value to the successive approximation register, a high-precision test digital / analog converter and a low-noise test environment are required, and there are problems such as poor efficiency during failure analysis.

The present invention has been made in order to solve the above-mentioned problems, and an expected value can be written to the successive approximation register without externally supplying an analog test signal, and the controllability of the test is improved. It is an object of the present invention to provide an analog / digital conversion device capable of improving the efficiency and efficiency during failure analysis.

[0006]

An analog / digital conversion device according to the present invention comprises a comparison value setting register 8 for setting a comparison value corresponding to the output of a comparator 4 by software, an output terminal of the comparator 4 and a comparison value. A switch 7 for selecting any one of the output terminals of the setting register 8 and connecting it to the input terminal of the successive approximation register 5 is provided.

[0007]

In the test mode, the switch 7 connects the output end of the comparison value setting register 8 to the input end of the successive approximation register 5. As a result, the comparison value of the comparison value setting register 8 is stored in the successive approximation register 5. The comparison value is freely set by software.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an analog / analog according to an embodiment of the present invention.
It is a block diagram which shows the structure of a digital converting device. Figure 1
In FIG. 2, components corresponding to those shown in FIG. 2 are designated by the same reference numerals, and their description will be omitted. In FIG. 1, 8
Is a comparison value setting register for setting a comparison value corresponding to the output of the comparator 4 by software, and 7 is an input terminal of the successive approximation register 5 by selecting either the output end of the comparator 4 or the comparison value setting register 8. Is a switch to connect to.

Next, the operation will be described. Here, the operation in the test mode will be described. As shown in FIG. 1, the switch 7 includes a comparison value setting register 8 and a successive approximation register 5
Switch to connect. As a result, the analog part including the analog input pin 2, the digital / analog converter 3 and the comparator 4 and the digital part including the successive approximation register 5 and the comparison value setting register 8 can be separated from each other, and the comparison value setting register 8 can be separated. 1 bit can be freely set by software as the output of the comparator 4.

As described above, since the comparison value corresponding to the comparison result of the comparator 4 can be set in the comparison value setting register 8 by software, the comparison values are written to the comparison value setting register 8 by the number of test resolutions. For example, the expected value can be written in all the bits of the successive approximation register 5. Further, since the value written in the comparison value setting register 8 is retained until the next writing, when writing the same value in all the bits of the successive approximation register 5, the writing in the comparison value setting register 8 only needs to be performed once. Further, since the configuration is exactly the same as the conventional one except that the switch 7 for switching in the test mode is provided, the tests in various modes can be performed with the same image as when an analog signal is externally applied.

In the above embodiment, since the control signal of the control circuit 1 is used as it is as the timing signal of the successive approximation register 5, it is necessary to consider the write timing to the comparison value setting register 8. If the writing signal to 8 is used to write to the successive approximation register 5, it is not necessary to consider the timing of writing to the comparison value setting register 8 and continuous writing is performed to perform actual analog / digital conversion. The test can be significantly speeded up compared to the case where

[0012]

As described above, according to the present invention, in the test mode, the comparison value corresponding to the output of the comparator is set in the comparison value setting register by software, and the comparison value of the comparison value setting register is set to the successive approximation register. Since it is configured to switch the switch so as to give to, the digital part can be tested without giving an analog signal for testing from the outside, and the expected value can be freely written to the successive approximation register by software. As a result, the controllability of the test is improved, the defect detection rate is significantly increased, and the efficiency at the time of defect analysis is improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an analog / digital conversion apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a conventional analog / digital conversion device.

[Explanation of symbols]

 2 Analog input pin 3 Digital / Analog converter 4 Comparator 5 Successive approximation register 7 Switch 8 Comparison value setting register

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[Procedure amendment]

[Submission date] August 21, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] Explanation of code

[Correction method] Change

[Correction content]

[Description of reference symbols] 1 control circuit 2 analog input pin 3 digital / analog converter 4 comparator 5 successive approximation register 6 test digital / analog converter 7 switch 8 comparison value setting register

Claims (1)

[Claims] 1. An analog input pin for inputting an analog signal from the outside, a digital / analog converter for converting a digital signal of the successive approximation register into an analog signal, an analog signal from the analog input pin and the digital signal. In an analog / digital conversion device provided with a comparator for successively comparing the analog signal from the analog / analog converter and a successive approximation register for successively storing the digital signal of the comparison result from the comparator, this corresponds to the output of the comparator. A comparison value setting register for setting a comparison value; and a switch for selecting one of the output end of the comparator and the output end of the comparison value setting register and connecting the input end of the successive approximation register. The output end of the comparison value setting register is An analog / digital conversion device characterized by being connected to an input terminal of a next comparison register.