JP2581431B2 - Method for manufacturing multilayer wiring board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a multilayer wiring board in which each layer is formed by using a laminating method of bonding substrates.

[0002]

2. Description of the Related Art As an example of a wiring board on which an LSI chip is mounted, Japanese Patent Application Laid-Open No. 2-228095 can be referred to as an example of a conventional method of manufacturing a multilayer printed wiring board. One example of a multilayer printed wiring board is configured by using a copper-clad laminate as a core material and a prepreg as an adhesive for the core material, and the core material and the prepreg are alternately laminated and integrated using a hot press. In the electrical connection between the laminated plates, a through-hole is formed by a drill after the core material and the prepreg are integrated, and the inner wall of the through-hole is plated with copper. Further, in recent years, a multilayer wiring board using a polyimide resin for interlayer insulation on a ceramic substrate has been used as a wiring board for a large computer which requires a higher wiring density than a multilayer printed wiring board. The method for manufacturing the polyimide / ceramic multilayer wiring board includes a polyimide resin insulating layer forming step of applying and drying a polyimide precursor varnish on a ceramic substrate and forming a via hole in the coating film, and a photolithography, vacuum evaporation and plating method. And a series of steps are repeated to form a polyimide multilayer wiring layer.

In addition to the above-described method for forming a polyimide / ceramic multilayer wiring board, a polyimide multilayer wiring pattern formed on a large number of auxiliary substrates is simultaneously positioned on a ceramic substrate, temporarily laminated, and then heated and pressed to form a multilayer wiring. There is also a method of forming a substrate. In this case, the auxiliary substrate includes a type that is left in the polyimide multilayer wiring layer and a type that is separated. This method makes it possible to conduct an electrical inspection for each auxiliary substrate, to select and stack auxiliary substrates without defects, to increase the manufacturing yield compared to the above-described sequential lamination method, and to perform parallel processing on the auxiliary substrate. As a result, the number of days for manufacturing the polyimide multilayer wiring layer can be reduced.

[0004]

In the above-mentioned multilayer printed wiring board, electrical connection between the laminated boards is performed by through-holes formed by drilling, so that fine through-holes cannot be formed. Therefore, the number of wirings that can be formed between through holes is limited. In addition, one through-hole is required for connection between one laminated board. As the number of laminated boards increases, the signal wiring accommodating property decreases, and it becomes difficult to form a multilayer printed wiring board having a high wiring density. There was a disadvantage of coming.

In order to compensate for the above-mentioned drawbacks of the conventional multilayer printed wiring board, a recently developed polyimide-ceramic multilayer wiring board uses a polyimide precursor on a ceramic substrate as many times as the number of laminated polyimide insulating layers. It is necessary to repeat the steps of varnish application, drying, formation of via holes, and curing. Therefore, it takes a very long time for the lamination process of the multilayer wiring board. Further, since the process of forming the polyimide insulating layer is repeated, the polyimide resin in the lower layer portion of the multilayer wiring layer is subjected to thermal stress in the curing process many times, and thus the polyimide resin is deteriorated. Further, since this polyimide multilayer wiring layer is of a sequential lamination type, there is a drawback that it is difficult to improve the production yield.

Further, as a method of manufacturing a multilayer wiring board for improving the manufacturing yield and shortening the number of days for manufacturing the board, a lamination method using an auxiliary board does not reduce the number of steps for manufacturing the board. Since the lamination is performed, the amount of waste of polyimide varnish and resist coating and the amount of other materials used is large compared with the sequential lamination method.

[0007]

According to a first method of manufacturing a multilayer wiring board, a pattern of each layer required for one multilayer wiring board is formed on a large-sized substrate having an area at least four times or more that of the substrate. Forming step, a cutting step of cutting the large substrate created in this forming step for each layer pattern, and cutting on the substrate having a conductive layer inside serving as a base of the multilayer wiring board, in the cutting step The substrate on which the pattern of the lowermost layer has been formed is aligned with the substrate that has been formed, temporarily laminated, and then the laminating and peeling step of peeling off only the substrate, and the lower layer pattern is formed on the laminated substrate formed in the laminating and peeling step A positioning process, a temporary fixing lamination, and a repeated process of repeating the substrate peeling until a predetermined number of layers are formed from the substrate, and pressing the laminated substrate formed in the repetitive process under a predetermined pressure and temperature, Between layers Electrical, characterized in that it comprises a step of obtaining a mechanical connection.

According to a second method of manufacturing a multilayer wiring board of the present invention, a pattern of the same lowermost layer required for a plurality of multilayer wiring boards is formed on a large-sized substrate having at least four times or more the area of the substrate. Forming step, a cutting step of cutting the large substrate formed in this forming step for each pattern, and cutting the substrate having a conductive layer inside as a base of a plurality of multilayer wiring boards in the cutting step The substrate on which the pattern of the lowermost layer is formed is aligned and temporarily fixed and laminated, and then, only the substrate is peeled off, and the upper layer is formed on the plurality of laminated substrates formed in the laminating step. A repetitive process of repeatedly performing positioning, temporary lamination, and substrate peeling of each substrate having the pattern formed thereon until a predetermined number of layers are reached, and subjecting the laminated substrate formed in this repetitive process to a predetermined pressure and temperature. so Resushi, electrical of the layers, characterized in that it comprises a step of obtaining a mechanical connection

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows a first embodiment of the present invention.
This will be described in detail with reference to (1) to FIG.

Referring to FIG. 1A, first, a quartz glass substrate 10 that transmits an excimer laser is prepared. In the first embodiment, a substrate having a size of 210 mm × 210 mm is used.

Referring to FIG. 1B, a polyimide precursor is applied on the quartz glass substrate 10, followed by pre-curing and curing to form a 0.2 μm-thick polyimide resin layer 11 (FIG. 1B). Hereinafter, a polyimide resin layer forming step). Since the polyimide resin layer 11 is etched when the quartz glass substrate 10 is peeled off in a later step, a thick film thickness is not required.

Referring to FIG. 1C, four types of metal patterns are formed on the polyimide resin 11. In the case of one embodiment, the four types of metal patterns are an LSI mounting pad 12, a first signal wiring pattern 13, a second signal wiring pattern 118, a power supply and a ground pattern 14.
It is. The metal pattern is patterned by photolithography using a photoresist, and formed in a layer structure of gold Au / nickel Ni / gold Au by electrolytic plating.
The thickness of each layer is 4 for gold Au / nickel Ni / gold Au.
μm / 2 μm / 4 μm. Nickel Ni is a barrier layer for a solder metal used in a later step. Also, at this time, X used for positioning during the temporary lamination
, Y, and θ are simultaneously formed at three locations for each metal pattern.

Referring to FIG. 1D, a polyimide adhesive 16 is applied on the metal pattern, and baking and curing are performed. Film thickness after cure is 10μ
m. A polyimide resin is a high-quality insulator having high insulating properties and a low dielectric constant, and is often used as an insulating material for a thin-film multilayer wiring portion of a multilayer wiring board.

Referring to FIG. 1 (5), a photoresist 17 is applied on a polyimide-based adhesive 16, and patterning is performed at a predetermined position using a photolithography technique. At this time, the thickness of the polyimide-based adhesive is 10
A film thickness more than twice as large as μm is required. A KrF excimer laser is used as the excimer laser 19, and scanning is performed at 200 oscillations at one place at an oscillation frequency of 200 Hz and an energy density of 0.8 J / cm ² . Excimer lasers are about to be used for a wide range of applications as high-power lasers despite their oscillation in the ultraviolet region.

Referring to FIG. 2A, after excimer laser scanning, the resist is stripped with methyl ethyl ketone.
The soot remaining on the bottom of the via hole of the polyimide adhesive is removed by oxygen plasma ashing. Thus, a via hole 110 made of a polyimide-based adhesive is formed. The via hole system of the first embodiment is 150 μm.

Referring to FIG. 2B, a connection bump 111 is formed by plating on a metal portion of the polyimide adhesive exposed at the bottom of the via hole. The bumps are patterned by photolithography using a photoresist, and are formed by multilayer plating of electrolytic nickel plating, electrolytic gold plating, electrolytic tin plating, and electrolytic gold plating. Nickel plating is a layer for preventing gold / tin solder metal from diffusing into the gold wiring layer. Each plating thickness is nickel 3μm, gold 8μm, tin 11μ
m, and gold 8 μm, and the bump system is 100 μm. At this time, the weight percentage of gold and tin is 4: 1.

Referring to FIG. 2C, the substrate formed in the above process is cut for each pattern by using a blade of a dicing saw, that is, a blade 112 (hereinafter, a cutting step). In the case of this embodiment, the substrate is divided into four parts because it is composed of four types of metal patterns.

Referring to FIG. 2D, a first signal wiring pattern is formed on a multilayer wiring board 115 including a conductor layer therein and having a power supply layer and a ground wiring layer on its surface, which is cut in the above cutting step. 13 are temporarily laminated. At this time, the alignment is performed using the alignment mark 15, and the entire surface of the spray type temporary fixing adhesive 1 is used.
At 14, the substrates are fixed. Temporary lamination is 1kg / c at room temperature
It takes about 2 minutes under a pressure of m ^2. The KrF excimer laser 19 is irradiated onto the laminated body obtained through the quartz glass substrate. At this time, the polyimide layer formed in the polyimide resin layer forming step is etched through the quartz glass substrate, and the quartz glass substrate 10 is separated from the laminate. The KrF excimer laser has an oscillation frequency of 200 Hz and a frequency of 0.2 Hz.
Scanning is performed at an energy density of 8 J / cm ² at one place and two shots.

Referring to FIG. 2 (5), next, after the quartz glass substrate is peeled off, soot on the surface of the laminated body is removed by oxygen plasma ashing, and the surface of the metal pattern is exposed.

Referring to FIG. 3A, a substrate having a second signal wiring pattern 118 is temporarily laminated on the surface of the laminated body cut by the cutting step under the same conditions as those after the cutting step. The quartz glass substrate is peeled off.

Referring to FIG. 3B, the temporary lamination and the substrate peeling are similarly repeated in the order of a substrate having a power supply and a ground pattern on the surface of the laminated body and a substrate having an LSI mounting pad on the surface. One laminate is obtained.

Referring to FIG. 3 (3), the laminate formed in such a process is pressurized and heated under vacuum using an autoclave apparatus, and the polyimide-based adhesives between the temporarily fixed layers are bonded to each other. The actual bonding between the electrodes is performed. The actual bonding is performed using a press profile that is held at 350 ° C. under a pressure of 20 kg / cm ² for about 30 minutes. At this time, the polyimide-based adhesive exhibits fluidity and the polyimide-based adhesives are integrated with each other, so that good adhesion between the layers can be obtained. At the same time, the bumps formed by multi-layer plating of gold and tin are melted at the eutectic point of 280 ° C. and connected to the other metal metal, so that good electrical connection between the layers can be obtained after pressing. Become. Adhesive for temporary fixing is 3
It is completely thermally decomposed at 50 ° C. and does not disturb the electrical connection between layers.

Referring to FIG. 3D, finally, input / output signal pins and power supply pins 11 are assembled at predetermined positions on the back surface of the base multilayer wiring board.

Next, a second embodiment of the present invention will be described with reference to FIG.
This will be described in detail with reference to (1) to FIG.

Referring to FIG. 4A, first, a quartz glass substrate 20 that transmits an excimer laser is prepared. In the second embodiment, a substrate having a size of 210 mm × 210 mm is used.

Referring to FIG. 4B, a polyimide precursor is applied on the quartz glass substrate 20, precured and cured to form a 0.2 μm thick polyimide resin layer 21 (hereinafter referred to as a polyimide layer). Forming step).
This polyimide resin layer 21 is used for the quartz glass substrate 2 in a later process.
Since it is etched at the time of separation of 0, a thick film thickness is not required.

Referring to FIG. 4C, one type of metal pattern is formed on the polyimide resin 21 for four layers. In the case of the second embodiment, the metal pattern to be formed is first the first signal wiring pattern 22. The metal pattern is patterned by photolithography using a photoresist, and is formed in a layer structure of gold Au / nickel Ni / gold Au by electrolytic plating. The thickness of each layer is gold A
u / nickel Ni / gold Au = 4 μm / 2 μm / 4 μm. Nickel Ni is a barrier layer for a solder metal used in a later step. Further, at this time, three alignment marks 23 for positioning X, Y, and θ, which are used for alignment at the time of temporary lamination in a subsequent process, are simultaneously formed for each metal pattern of one layer.

Referring to FIG. 4D, a polyimide adhesive is applied on the metal pattern, and baking and curing are performed. The film thickness after curing is 10 μm. A polyimide resin is a high-quality insulator having high insulating properties and a low dielectric constant, and is often used as an insulating material for a thin-film multilayer wiring portion of a multilayer wiring board.

Referring to FIG. 4 (5), a photoresist 25 is applied on the polyimide adhesive 24, and patterning is performed at a predetermined position by using a photolithography technique. At this time, the thickness of the polyimide-based adhesive is 10
A film thickness more than twice as large as μm is required. The excimer laser 27 uses a KrF excimer laser and has an oscillation number of 200.
Hz, energy density of 0.8 J / cm ² at one location 20
Scan under the condition of 0 shot. Excimer laser
As a high power laser despite oscillating in the ultraviolet range,
It is currently being used for a wide range of purposes.

Referring to FIG. 5A, the methyl ethyl ketone is peeled off after the excimer laser scan, and the soot remaining on the bottom of the via hole of the polyimide adhesive is removed by oxygen plasma ashing. Thus, a via hole 28 of the polyimide-based adhesive is formed. The via hole system of the second embodiment is 150 μm.

Referring to FIG. 5B, a connection bump 29 is formed by plating on a metal portion of the polyimide adhesive exposed at the bottom of the via hole. The bumps are patterned by photolithography using photoresist,
It is formed by multilayer plating of electrolytic nickel plating, electrolytic gold plating, electrolytic tin plating, and electrolytic gold plating. Nickel plating is a layer for preventing gold / tin solder metal from diffusing into the gold wiring layer. Each plating layer is nickel 3μm, gold 8μm, tin 11μ
m, and gold 8 μm, and the bump system is 100 μm. At this time, the weight percentage of gold and tin is 4: 1.

Referring to FIG. 5C, the substrate formed in the above-described process is cut for each one-layer pattern using a dicing saw blade and a blade 211 (hereinafter, a cutting step). In the case of the second embodiment, the substrate is divided into four parts because the substrate is composed of four metal patterns.

Referring to FIG. 5D, on the four multilayer wiring boards 212 each including a conductor layer inside and having a power supply layer and a ground wiring layer on the surface, the signal wiring is cut inside by the cutting step. The substrates having the patterns 122 are temporarily laminated. At this time, the alignment is performed using the positioning alignment mark 23, and the entire surface spray type temporary fixing adhesive 214 is fixed between the substrates. Temporary lamination requires about 2 minutes at room temperature under a pressure of 1 kg / cm ² . The laminated body obtained in this manner is subjected to K over a quartz glass substrate.
Irradiate the rF excimer laser 27. At this time, the polyimide layer formed in the polyimide layer forming step is etched through the quartz glass substrate, and the quartz glass substrate is peeled off from the laminate (hereinafter, a temporary lamination and peeling step). Kr
The F excimer laser has an oscillation frequency of 200 Hz and 0.8 J / c.
Scanning is performed at an energy density of m ² and two shots at one place.

Referring to FIG. 5 (5), after the quartz glass substrate is separated, soot on the surface of the laminate is removed by oxygen plasma ashing, and the surface of the metal pattern is exposed.

Referring to FIG. 6A, a substrate having the first signal wiring pattern 22 therein is formed in the steps from the first step to the cutting step of the second embodiment, and at the same time, the internal Then, a substrate having a second signal line pattern 218, a power supply and ground pattern 215, and an LSI mounting pad 216 is prepared. In the same manner as in the temporary laminating and peeling steps, a substrate having a signal wiring pattern 2 inside, a substrate having a power supply and a ground pattern inside, and an LSI mounting pad inside are provided on the surface of the above four laminates. Align in the order of the substrates,
The temporary lamination and the substrate peeling are repeated to obtain four laminated bodies.

Referring to FIG. 6 (2), the four laminates were pressed and heated under vacuum using an autoclave apparatus, and the polyimide adhesives between the layers temporarily fixed and the electrodes between the electrodes were temporarily fixed. Bonding is performed. The actual bonding is 350 ° C,
It is carried out using a press profile which is held under a pressure of 20 kg / cm ² for about 30 minutes. At this time, the polyimide-based adhesive exhibits fluidity and the polyimide-based adhesives are integrated with each other, so that good adhesion between the layers can be obtained. At the same time, the bumps formed by the multilayer plating of gold and tin melt at 280 ° C., which is their eutectic point, and are connected to the counterpart metal metal, and good electrical connection between the layers is obtained after pressing. The temporary fixing adhesive is completely thermally decomposed at 350 ° C. and does not disturb the electrical connection between the layers.

Referring to FIG. 6 (3), finally, input / output signal pins and power supply pins 217 are assembled at predetermined positions on the back surface of the base multilayer wiring board, and four multilayer wiring boards are obtained.

In this embodiment, a method of simultaneously forming four types of metal patterns or four layers of metal patterns on a single quartz glass substrate is employed. Alternatively, the number of divisions can be changed according to the number of layers. In addition, a metal layer formed on a quartz glass substrate can be multi-layered. For example, a connection bump can be formed after a power supply and a ground pattern and a signal pattern are stacked.

[0039]

According to the method for manufacturing a multilayer wiring board of the present invention, four or more polyimide wiring layers are simultaneously formed on one substrate, and this is cut and laminated for each layer to form one polyimide multilayer wiring. By forming the substrate or the first layer of the four or more multilayer wiring boards, it is possible to greatly reduce the number of steps in the method for manufacturing a multilayer wiring board in which sequential lamination is performed. Also, in the manufacturing method in which each of the polyimide wiring layers is formed using a large number of auxiliary substrates, there is an effect that the number of steps can be significantly reduced and the material used can be reduced.

[Brief description of the drawings]

FIG. 1 is a diagram showing a first embodiment of the present invention.

FIGS. 2 (1) to (5) are diagrams showing a first embodiment of the present invention.

FIGS. 3 (1) to 3 (3) are views showing a first embodiment of the present invention.

FIG. 4 is a diagram showing a second embodiment of the present invention.

FIGS. 5 (1) to (5) are views showing a second embodiment of the present invention.

FIG. 6 is a diagram showing a second embodiment of the present invention.

[Explanation of symbols]

 Reference Signs List 10 quartz glass substrate 11 polyimide resin 12 LSI mounting pad 13 first signal wiring pattern 14 power supply and ground pattern 15 alignment mark 16 polyimide adhesive 17 resist mask 18 resist patterning part 19 excimer laser 20 quartz glass substrate 21 polyimide resin Reference Signs List 22 signal wiring pattern 23 alignment mark 24 polyimide adhesive 25 resist mask 26 resist patterning portion 27 excimer laser 28 adhesive via hole 29 interlayer connection bump 110 adhesive via hole 111 interlayer connection bump 112 blade 113 after cutting 114 temporary Stopping adhesive 115 Multilayer wiring board with inner layer 116 Power supply and ground layer 117 Input / output signal pins 118 Second signal wiring pattern 210 Blade 211 after cutting 212 inner-cored multilayer wiring board 213 power and ground layers 214 temporary fixing adhesive 215 power supply and the ground pattern 216 LSI mounting pad 217 input and output signals and power pins 218 second signal wiring pattern

Claims (2)

(57) [Claims] A step of forming a pattern of each layer required for one multilayer wiring board on a large-sized substrate having at least four times the area of the substrate; and a step of forming the large-sized substrate formed in the forming step. A cutting step of cutting each of the patterns of each layer, and positioning a substrate on which a lowermost layer pattern is formed with the cut substrate in the cutting step on a substrate having a conductor layer inside serving as a base of the multilayer wiring board Then, a temporary lamination is performed, and then a laminating and peeling step of peeling only the substrate, and positioning from the substrate having the lower layer pattern formed on the laminated substrate formed in the laminating and peeling step, temporarily laminating, and peeling the substrate are performed. A repetition step of repeating until a predetermined number of layers is reached, and a step of pressing the laminated substrate formed in the repetition step under a predetermined pressure and temperature to obtain an electrical and mechanical connection between the respective layers To Method for manufacturing a multilayer wiring board according to symptoms. 2. A forming step of forming a pattern of the same lowermost layer required for a plurality of multilayer wiring boards on a large-sized substrate having an area at least four times or more that of the substrate; A cutting step of cutting the large substrate for each pattern; and a substrate having a conductor layer inside serving as a base of a plurality of multilayer wiring boards, a lowermost layer pattern is formed on the substrate cut in the cutting step. The respective substrates are aligned and temporarily fixed and laminated, and thereafter, only a substrate is separated, and a laminating / separating step, and the alignment of each substrate having an upper layer pattern formed on a plurality of laminated substrates formed in the laminating / separating step is performed. A repetition step of repeatedly stopping and laminating and peeling the substrate until a predetermined number of layers are reached, and pressing the laminated substrate formed in the repetition step under a predetermined pressure and temperature, and electrically and mechanically between the respective layers. Connection Method for manufacturing a multilayer wiring board which comprises a step of obtaining.