JP3016292B2 - Polyimide multilayer wiring board and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure and a manufacturing method of a polyimide multilayer wiring board having a multilayer wiring layer using a polyimide resin for interlayer insulation on a ceramic substrate or a hard organic resin substrate, and more particularly to a structure of a folded resin layer. And a lamination method.

[0002]

2. Description of the Related Art A multilayer printed wiring board has conventionally been used as a wiring board on which an LSI chip is mounted.
The multilayer printed wiring board is configured by using a copper-clad laminate as a core material and a prepreg as an adhesive for the core material, alternately laminating the core material and the prepreg, and integrating them using a hot press.
The electrical connection between the laminated plates is performed by integrating the core agent and the prepreg, forming a through-hole by drilling, and plating the inner wall of the through-hole with copper.

In recent years, a multilayer wiring board using a polyimide resin for interlayer insulation on a ceramic substrate has been used as a wiring board for a large computer which requires a higher wiring density than a multilayer printed wiring board. This polyimide / ceramic multilayer wiring board uses a polyimide resin insulating layer forming step of applying and drying a polyimide precursor varnish on a ceramic substrate and forming a via hole in the coated film, and uses photolithography, vacuum evaporation and plating. And a series of steps are repeated to form a polyimide multilayer wiring layer.

In addition to the above-described method for forming a polyimide / ceramic multilayer wiring substrate, a wiring pattern is formed on a polyimide sheet, and the sheet is positioned on the ceramic substrate and sequentially laminated under pressure to form a multilayer wiring. There is also a method of forming a substrate. In this method, since the signal layer is formed in sheet units, it is possible to select and stack sheets having no defect, thereby increasing the production yield compared with the above-described sequential stacking method.

[0005]

In the above-mentioned multilayer printed wiring board, electrical connection between the laminated boards is performed by through-holes formed by drilling, so that fine through-holes cannot be formed. Therefore, the number of wirings that can be formed between through holes is limited. Further, one through-hole is required for connection between one laminated board, and as the number of laminated layers increases, the signal wiring accommodating property decreases, and it becomes difficult to form a multilayer printed wiring board with a high wiring density. There was a disadvantage.

In order to compensate for the above-mentioned disadvantages of the conventional multilayer printed wiring board, a recently developed polyimide-ceramic multilayer wiring board has a polyimide precursor on the ceramic substrate as many times as the number of laminated polyimide insulating layers. It is necessary to repeat the steps of varnish application, drying, formation of via holes, and curing. Therefore, it takes a very long time for the lamination process of the multilayer wiring board. In addition, since the process of forming the polyimide insulating layer is repeatedly performed, the thermal stress of the curing process performed many times is applied to the polyimide resin in the lower layer portion of the multilayer wiring layer, so that the polyimide resin is deteriorated. . Further, since this polyimide multilayer wiring layer is of a sequential lamination type, there is a drawback that it is difficult to improve the production yield.

Also, in the sheet-based lamination method developed as a method for improving the manufacturing yield, since the pressure lamination is performed sequentially one layer at a time, the higher the number of layers, the more the thermal stress is applied to the lower layer of the polyimide resin and the lower the polyimide resin. The disadvantages of degradation and long substrate manufacturing days are not improved.

[0008] The object of the present invention is to solve these problems,
It is an object of the present invention to provide a polyimide multilayer wiring board capable of forming a high quality multilayer high wiring density polyimide multilayer wiring board with a short manufacturing time and a high manufacturing yield, and a method for manufacturing the same.

[0009]

The polyimide multilayer wiring board of the present invention is a multilayer wiring board having a polyimide multilayer wiring layer on a ceramic substrate or a hard organic resin substrate, wherein the polyimide multilayer wiring layer is formed by laminating a plurality of wiring layers. The body is one block, and a plurality of stacked structures of this block are connected, and the connection between each block is performed by brazing solder bumps formed on the surface of the stacked body of each block,
It is characterized by using a polyimide resin having a glass transition point .

In the method for manufacturing a polyimide multilayer wiring board according to the present invention, a polyimide multilayer wiring layer having a laminate of a plurality of wiring layers as one block is formed on a hard flat plate, and at least the polyimide multilayer wiring layer is formed. A first step of using a polyimide resin having a glass transition point for the upper layer, forming a solder bump electrically connected to the wiring layer inside the laminate through a via hole on the surface of the polyimide multilayer wiring layer, A polyimide multilayer wiring layer having a laminate of a plurality of wiring layers as one block is formed on a rigid substrate such as a hard substrate, and the wiring layer inside the laminate is electrically connected to the surface of the polyimide multilayer wiring layer via via holes. A second step of forming electrically connected solder bumps, a polyimide surface of the polyimide multilayer wiring layer formed in the first step, and a polish layer formed in the second step. After aligning and superimposing the surface of the imide multilayer wiring layer, under pressure and heating conditions, the polyimide surface of the polyimide multilayer wiring layer formed in the first step and the polyimide multilayer formed in the second step The polyimide surface of the wiring layer is adhered by self-adhesion of a polyimide resin having a glass transition point, and at the same time, solder bumps are brazed together to electrically connect the laminates. The hard flat plate used for forming the wiring layer is peeled off from the polyimide multilayer wiring layer, and a solder bump electrically connected to the wiring layer inside the laminate through a via hole is formed on the newly exposed polyimide surface. Third
Step, the polyimide surface of another polyimide multilayer wiring layer formed by the same method as the first step, and the surface of the polyimide multilayer wiring layer formed by the third step, using the same method as the third step And a fifth step of forming a polyimide multilayer wiring layer laminated structure by repeating the fourth step a plurality of times.

[0011] In the method for manufacturing a polyimide multilayer wiring board of the present invention, a polyimide multilayer wiring layer having a laminate of a plurality of wiring layers as one block is formed on a hard flat plate,
A melt-curing or melting adhesive is used as the uppermost layer of the polyimide multilayer wiring layer, and solder bumps are formed on the surface of the adhesive layer via a via hole and electrically connected to the wiring layer inside the laminate. The first step is to form a polyimide multilayer wiring layer having a laminate of a plurality of wiring layers as one block on a hard substrate such as a ceramic, and to laminate the via hole on the surface of the polyimide multilayer wiring layer. Forming a solder bump electrically connected to the wiring layer inside the body;
After aligning and aligning the adhesive layer of the polyimide multilayer wiring layer formed in the first step and the surface of the polyimide multilayer wiring layer formed in the second step,
Under pressure and heat conditions, the adhesive surface of the polyimide multilayer wiring layer formed in the first step and the polyimide surface of the polyimide multilayer wiring layer formed in the second step are bonded with an adhesive, and the solder bumps are simultaneously formed. To electrically connect the laminates, then peel off the rigid flat plate used in forming the polyimide multilayer wiring layer in the first step from the polyimide multilayer wiring layer, and newly expose the polyimide. A third step of forming a solder bump electrically connected to the wiring layer inside the laminate via a via hole on the surface, and an adhesive for another polyimide multilayer wiring layer formed by the same method as the first step A fourth step of forming a polyimide multilayer wiring layer laminated structure by using the same method as in the third step by combining the layer and the surface of the polyimide multilayer wiring layer formed in the third step with a plurality of fourth steps. Repeat it Accordingly, characterized in that it comprises a fifth step of forming a polyimide multilayer wiring layers stacked structure.

Further, the method of manufacturing a polyimide multilayer wiring board according to the present invention is characterized in that a melt-curable or melt-type adhesive is used on both sides of the polyimide surface to be aligned and superposed.

[0013]

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of one embodiment of the polyimide multilayer wiring board of the present invention. The ceramic substrate used in this embodiment is a co-fired alumina ceramic substrate 9 having input / output pins 8 on the back surface of the substrate and having an internal wiring layer of molybdenum metal. The structure of the polyimide multilayer wiring layer portion is as follows. The signal wiring layer 5 has a line width of 25 μm and a wiring thickness of 7 μm.
m gold-plated wiring. The signal wiring is a set of the X direction and the Y direction, and the upper and lower portions are sandwiched between ground wiring layers to adjust impedance and reduce crosstalk noise.
The polyimide resin used is a polyimide having a glass transition point (for non-photosensitive, PI manufactured by Hitachi Chemical Co., Ltd.
Q, PYRALIN made by Dupont Japan Limited,
For each photosensitivity, such as Semico Fine manufactured by Toray Industries, Inc., PL-1200 manufactured by Hitachi Chemical Co., Ltd., PI-2702D manufactured by Dupont Japan Limited, Photo Nice manufactured by Toray Industries, PIMEL manufactured by Asahi Chemical Industry Co., Ltd.) The film thickness between the wiring layers is 20 μm. The number of signal wiring layers is eight (four sets). One set of signal wiring layers and one ground wiring layer were used as the basic configuration of the block 24 used for lamination. Therefore, this embodiment is composed of four blocks. When each block is completed, an electrical inspection is performed to select non-defective blocks, and the process proceeds to the next step of connecting blocks. The electrical connection between the blocks is made by brazing the gold-tin solder bumps 7, 28. The size of the solder bump is, for example, 50 to 500 μm square, 10 to 50 μm.
It is formed with the thickness of. On the uppermost layer of the formed polyimide multilayer wiring board, connection pads 19 for soldering the LSI chip are formed by copper plating. In FIG. 1, reference numeral 2 denotes a ground and connection layer, and reference numeral 23 denotes polyimide having a glass transition point.

FIGS. 2 to 5 show a first embodiment of a method for manufacturing a polyimide multilayer wiring board according to the present invention in the order of steps. The structure of the polyimide multilayer wiring layer portion of the polyimide multilayer wiring board manufactured in this embodiment is the same as that of the embodiment of FIG. Glass transition point about 270 ° C for polyimide resin
And gold for the wiring metal.

The manufacturing steps of the polyimide multilayer wiring board of this embodiment are as follows.

First, a set of signal wiring layers and one grounding and connection layer are formed on a flat aluminum plate (hereinafter abbreviated as aluminum flat plate) by the following method.

(1) As shown in FIG. 2A, a grounding and connection wiring layer is patterned on a flat aluminum plate 1 by photolithography using a photoresist, and electrolytic gold plating is performed to form a grounding and connection wiring layer 2. I do.

(2) As shown in FIG. 2 (b), a photosensitive polyimide varnish 4 is applied on an aluminum flat plate on which a grounding and connection layer is formed in step (1), and is exposed and developed to a predetermined position. A via hole 3 is formed and curing is performed.

(3) As shown in FIG. 2C, a pair of signal wiring layers 5 are formed using photosensitive polyimide for interlayer insulation. The signal wiring layer is formed by the method of forming the ground and connection layers in the step (1),
, A signal interlayer insulating layer is formed by the method of forming an insulating layer.

(4) As shown in FIG. 2D, a polyimide varnish is applied on the signal wiring layer formed in step (3), and exposure and development are performed to form via holes 6 at predetermined positions. Do the cure.

(5) As shown in FIG. 2E, the uppermost layer of the multilayer wiring layer formed in the step (4) is electrically connected to the multilayer wiring layer formed in the following steps (6) and thereafter. The connection gold-tin solder bumps 7 are formed at the positions. The gold-tin solder bumps are patterned by photolithography using a photoresist. First, a 3 μm-thick electrolytic nickel plating is formed, and then a multi-layer plating of electrolytic tin plating and electrolytic gold plating is formed. Nickel plating is a layer for preventing the diffusion of gold-tin solder into the gold wiring layer. The multi-layer plating of gold and tin is melted by heat in a later step of bonding a polyimide layer to form a gold-tin alloy solder. The multilayer plating of gold and tin has a film thickness ratio of 10: 7 so that the weight ratio of gold to tin is 4: 1. Each film thickness is 1 μm for gold plating and 0.7 μm for tin plating, for a total of 6 μm.
A layer (gold-tin multi-layer plating portion total thickness 10.2 μm) is formed.

Next, a set of signal wiring layers and a set of ground and connection layers sandwiching the signal wiring layers are formed on a ceramic substrate having input / output pins on the back surface separately from the above.

(6) As shown in FIG. 3A, a ceramic substrate 9 having input / output signal pins and power supply pins 8 on the back surface
The ground and connection wiring layer 10 is patterned by photolithography using a photoresist, and electrolytic gold plating is performed thereon to form the ground and connection wiring layer.

(7) As shown in FIG. 3 (b), a photosensitive polyimide varnish 11 is applied on the ceramic substrate on which the grounding and connection layers have been formed in step (6), and exposed and developed to a predetermined position. A via hole 12 is formed and curing is performed.

(8) As shown in FIG. 3C, a pair of signal wiring layers 13 are formed using photosensitive polyimide for interlayer insulation. As a forming method, a signal wiring layer is formed by a method in which a ground and a connection layer are formed in step (1), and a signal interlayer insulating layer is formed by a method in which an insulating layer is formed in step (2).

(9) As shown in FIG. 3D, a photosensitive polyimide varnish is applied on the signal wiring formed in the step (8), exposed and developed to form a via hole at a predetermined position. Do the cure.

(10) As shown in FIG. 3E, the method using the grounding and connection layer 15 in the step (6)
It is formed on the polyimide layer formed in the step (9).

(11) As shown in FIG. 4F, a polyimide layer having a via hole 16 formed thereon is formed on the second grounding and connection layer 15 in the same manner as in the step (9).

(12) As shown in FIG. 4 (g), the gold-tin solder bump 1 is formed on the polyimide layer formed in the step (11).
7 is formed. The formation method is the same as the above-mentioned step (5).

(13) As shown in FIG. 5A, the polyimide layer having the solder bumps formed in the step (5) of the polyimide multilayer wiring layer 25 on the aluminum flat plate formed in the steps (1) to (5) And the polyimide multi-layer wiring layer 26 having solder bumps on the ceramic substrate formed in the steps (6) to (12) is aligned, then superposed, pressed and heated to a temperature exceeding the glass transition point of the polyimide resin. Then, the polyimide film is bonded and fixed. At this time,
The multi-layer plating of gold and tin is melted to form a gold-tin alloy solder, and the solder bumps formed in step (5) are simultaneously melted and joined to electrically connect the two laminates. The pressurizing and heating methods are as follows. Pressurization and heating use an autoclave type vacuum press device, pressurized gas uses nitrogen gas, pressurization is 3 kg / cm ^{2 up to} a substrate temperature of 250 ° C., and 14 kg / cm ^{2 from} a substrate temperature of 250 ° C. to 350 ° C. Perform in ² . At this time, the substrate is placed on a platen, sealed using a polyimide film, and a vacuum pump is connected to make the inside
Reduce the pressure to 0 Torr or less.

(14) As shown in FIG.
The aluminum plate portion of the bonded substrate is immersed in a hydrochloric acid aqueous solution to dissolve and remove the aluminum plate 1.

(15) A photosensitive polyimide varnish is applied on the ground and connection wiring layer 2 formed in the step (1) newly exposed in the step (14), exposed and developed to form a via hole at a predetermined position. Form and cure.

(16) A gold-tin solder bump 18 is formed on the polyimide layer formed in the step (15). The formation method is the same as the step (5).

(17) As shown in FIG. 5C, another polyimide wiring formed in steps (1) to (5) is formed on the polyimide wiring layer laminate formed in steps (1) to (16). The layers are laminated and integrated by the method of steps (13) to (16).

(18) The process is repeated until the number of wiring layers becomes eight.

(19) Finally, a connection electrode layer 19 for connecting the multilayer wiring board and the wiring of the LSI chip is formed. This step corresponds to steps (13) to (15) in step (18).
Then, on the polyimide layer formed in the step (15), connection electrode pads 19 for performing solder connection with bumps of a chip carrier in which an LSI chip is sealed are formed. At this time, the bumps of the LSI chip carrier and the connection electrode pads 1
Tin-lead eutectic solder is used as the solder connecting the connection electrodes 9, and the connection electrode pads 19 are formed by copper plating that does not erode the tin-lead solder.

FIGS. 6 and 7 show a second embodiment of the method for manufacturing a polyimide multilayer wiring board according to the present invention in the order of steps. The structure of the polyimide multilayer wiring layer portion of the polyimide multilayer wiring board manufactured according to this embodiment is the same as that of the embodiment of FIG. The polyimide resin is a low thermal expansion coefficient photosensitive polyimide having no glass transition point (for example, TL (E) X1 manufactured by Asahi Kasei Corporation), the adhesive is a melt-curable maleimide resin, and the wiring metal is copper. I'm using Note that the photosensitive group of the photosensitive polyimide used in the present embodiment does not easily react with metallic copper, so that the wiring layer can be formed only of copper.

First, a set of signal wiring layers and one grounding and connection layer are formed on an aluminum flat plate by the following method.

(1) As shown in FIG. 6A, the ground and connection wiring layers are patterned on the aluminum flat plate 1 by photolithography using a photoresist, and electrolytic copper plating is performed to form the ground and connection wiring layers 2. Form.

(2) A photosensitive polyimide varnish is applied on the aluminum flat plate on which the grounding and connection layer 2 has been formed in the step (1), exposed and developed to form a via hole at a predetermined position, and curing is performed.

(3) A pair of signal wiring layers 5 are formed using photosensitive polyimide for interlayer insulation. As a forming method, a signal wiring layer is formed by the method of forming the ground and connection layers in the step (1), and a signal interlayer insulating layer is formed by a method of forming an insulating layer in the step (2).

(4) A polyimide varnish is applied on the signal wiring layer formed in the step (3), exposure and development are performed to form via holes at predetermined positions, and curing is performed.

(5) A connection bump 27 is formed on the uppermost layer of the multilayer wiring layer formed in the step (4) at a position where electrical connection with the multilayer wiring layer formed in the following step (6) is made. Tin-lead-bismuth-based low-temperature solder is used for the connection bumps. The tin-lead-bismuth-based low-temperature solder bump is formed by a lift-off method using a photolithography process using a photoresist and a tin-lead-bismuth alloy deposition process by vacuum evaporation. At this time, the thickness of the solder layer is 10 μm.

(6) As shown in FIG. 6 (b), a maleimide resin varnish 20 is applied to the uppermost layer of the multilayer wiring layer formed in the step (5), and dried by hot air circulation open.

(7) The maleimide resin 20 on the bumps formed in the step (5) is removed. The removal process is as follows. By a photolithography process using a photoresist and a lift-off method using a copper thin film formation process by sputtering, a 0.5 μm thick copper thin film layer is formed on the maleimide resin other than on the bumps formed in the step (5),
Next, the exposed maleimide resin is removed by plasma etching using oxygen gas, the connection bumps formed in step (5) are exposed, and then the copper thin film on the maleimide resin is removed by wet etching. .

Next, a set of signal wiring layers and a set of grounding and connection layers sandwiching the signal wiring layers are formed on a ceramic substrate having input / output pins on the back surface separately from the above by the following steps.

(8) As shown in FIG. 6C, a ceramic substrate 9 having signal input / output pins and power supply pins 8 on the back surface
The ground and connection wiring layer 10 is patterned by photolithography using a photoresist, and electrolytic copper plating is performed to form a ground and connection wiring layer.

(9) A photosensitive polyimide varnish is applied on the ceramic substrate on which the grounding and connection layer 10 has been formed in step (8), exposed and developed to form via holes at predetermined positions, and curing is performed.

(10) A pair of signal wiring layers 13 are formed by using photosensitive polyimide for interlayer insulation. The formation method is
A signal wiring layer is formed by the method of forming the ground and connection layers in the step (1), and a signal interlayer insulating layer is formed by the method of forming the insulating layer in the step (2).

(11) A photosensitive polyimide varnish is applied on the signal wiring formed in the step (10), exposed and developed to form a via hole at a predetermined position, and cured.

(12) The ground and connection layer 15 is formed on the polyimide layer formed in the step (11) by the method used in the step (8).

(13) A polyimide layer having a via hole formed thereon is formed on the second grounding and connection layer 15 in the same manner as in the step (11).

(14) A tin-lead-bismuth-based low-temperature solder bump 21 is formed on the polyimide layer formed in the step (13). The tin-lead-bismuth-based low-temperature solder bump is formed by the method of step (5). At this time, the thickness of the solder layer is 10 μm.

(15) As shown in FIG. 7 (d), a polyimide multilayer wiring layer 25 having a connection solder bump and a maleimide resin adhesive layer 20 on an aluminum flat plate formed in steps (1) to (7), The polyimide multilayer wiring layers 26 having the solder bumps on the ceramic substrate formed in the steps (8) to (14) are aligned, then superposed, pressed, and heated to the flow temperature of the maleimide resin to perform mutual polyimide multilayering. The wiring layer is bonded and fixed. At this time, the tin-lead-bismuth-based low-temperature solder bumps 21 and 27 are melted and joined,
The two laminates are electrically connected. The pressurizing and heating methods are as follows. Pressurization and heating use an autoclave type vacuum press device, pressurized gas uses nitrogen gas,
Pressurization is performed at 3 kg / cm ^{2 up to} a substrate temperature of 130 ° C., and 14 kg / cm ² at a substrate temperature of 130 ° C. to 180 ° C. At this time, the substrate is placed on a platen, sealed using a polyimide film, and a vacuum pump is connected to make the inside
The pressure is reduced to Torr or less.

(16) The aluminum plate portion of the bonded substrate is immersed in a 16% hydrochloric acid aqueous solution to dissolve and remove the aluminum plate 1.

(17) A photosensitive polyimide varnish is applied on the ground and connection wiring layer 2 formed in the step (1) newly exposed in the step (16), and is exposed and developed to form a via hole at a predetermined position. Form and cure.

(18) A tin-lead-bismuth-based low-temperature solder bump is formed on the polyimide layer formed in the step (17). The forming method is the same as in step (5).

(19) Another polyimide wiring layer formed in the steps (1) to (7) is formed on the folded wiring layer laminate formed in the steps (1) to (18) by the steps (15) to (18). The lamination and integration process is repeated until the number of wiring layers becomes eight by the method described in (1). Finally, as shown in FIG.
A connection electrode layer for connecting to the wiring of the SI chip is formed.
This step is the same as step (19) of the first embodiment.
In the present embodiment, a melt-curable maleimide resin is used as the adhesive. However, it is also possible to use a molten ethylene fluoride and a perfluoroalkyl perfluorovinyl ether copolymer.

In the first and second embodiments, the adhesive is applied or laminated only on one surface layer of the two polyimide multilayer wiring layers to be bonded. However, the unevenness of the polyimide surface layer is large. In this case, a manufacturing method is used in which an adhesive is applied or laminated to both surface layers in the same manner as in the above-described embodiment of the manufacturing method, and the influence of unevenness on the bonding surface is reduced to perform bonding.

In the above-described embodiment, the polyimide multilayer wiring layer is formed on the ceramic substrate. However, a hard organic resin substrate, for example, a polyimide resin molded substrate can be used in addition to the ceramic substrate. In this case, the input / output pins are formed by forming through-holes in the polyimide resin molded substrate and driving the input / output pins. FIG. 8 is a cross-sectional view of a polyimide multilayer wiring board using this polyimide resin molded board.

The input / output pins 34 are
Is being driven into. Other configurations are the same as those of the polyimide multilayer wiring board of FIG. 1, and the same elements are denoted by the same reference numerals. The multilayer wiring board of the present embodiment includes a polyimide resin molded board 33 serving as a base and a wiring layer 5.
It is possible to accurately match the thermal expansion coefficient of the polyimide multi-layer wiring layer having the above, and it is particularly suitable for manufacturing a large-area high-layer wiring board.

[0063]

As described above, in the polyimide multilayer wiring board of the present invention, the structure of the polyimide multilayer wiring layer is a multiple block laminated structure in which a laminate including a plurality of wiring layers is formed as one block. The electrical connection between the blocks is characterized by being performed by brazing the solder bumps, and the following effects are obtained.

(1) Through-holes required in a conventional multilayer printed wiring board are not required, and a fine wiring pattern can be formed in a signal wiring layer portion. High density wiring can be realized.

(2) Conventional sequential lamination type polyimide
The ceramic multi-layer wiring board requires the number of curing steps of the number of laminated layers, and therefore, the curing step was performed many times on the polyimide layer formed in the initial laminating step of the sequential laminating step, and the polyimide resin was thermally degraded. However, in the manufacturing method of the present invention, since the curing step is only a step of forming a laminate including a plurality of wiring layers, it is possible to prevent the polyimide resin from being thermally degraded due to curing many times. This is as follows, taking the polyimide multilayer wiring board of FIG. 1 as an example.

The number of curing steps in the conventional sequential lamination method = 12 times The number of curing steps in the method of the present invention = 3 effects Effect: the number of curing steps is 1/4 of the conventional method. Since the number of curing steps is three regardless of the number, the effect increases as the number of signal wiring layers increases.

(3) In the case of the conventional sequential multi-layered polyimide multilayer wiring board, if a defect occurs during the manufacturing process, it is discarded including the lower wiring layer portion formed up to that time, and the number of signal wiring layers increases. Although the manufacturing yield was significantly reduced, the polyimide multilayer wiring board of the present invention can perform electrical inspection of wiring layers in units of a laminate block including a plurality of wiring layers, so that non-defective blocks can be selected and laminated. As a result, it is possible to suppress a decrease in manufacturing yield with respect to an increase in the number of signal wiring layers. This is as follows, taking the polyimide multilayer wiring board of FIG. 1 as an example.

Assuming that the yield per layer in the signal or ground wiring forming step = 95%, the yield per cycle in the laminated block bonding step = 95%, the manufacturing yield in the conventional sequential lamination method The number of wiring layers to be formed = signal 8 layers + 5 ground layers = 13 layers Manufacturing yield = (0.95) ¹³ = 0.51 Therefore, the manufacturing yield is 51%.

Manufacturing Yield in the Manufacturing Method of the Present Invention One laminated block configuration = two signal layers + ground layer 1
Layer = 3 layers Yield of one laminated block = (0.95) ³ =
0.86 Number of times laminate block bonding = 3 Yield of three times laminate block bonding process = (0.95)
³ = 0.86 Manufacturing yield = 0.86 × 0.86 = 0.74 Therefore, the manufacturing yield is 74%.

Effect The production yield is improved by 23%.

It is clear from the above-mentioned example that the effect of the manufacturing method of the present invention increases as the number of signal wiring layers increases.

(4) In the conventional sequential multi-layered polyimide multi-layer wiring board, the manufacturing period increases in proportion to the number of wiring layers. However, in the manufacturing method of the present invention, the lamination including a plurality of wiring layers is performed. Since it can be manufactured only during the period of manufacturing the body block and the period of the step of bonding the laminated body block, the number of days for manufacturing the multilayer wiring board can be greatly reduced. This is as follows, taking the polyimide multilayer wiring board of FIG. 1 as an example.

The number of manufacturing days required to form one wiring layer = 1 day The number of manufacturing days required to form one insulating layer = 1 day The number of manufacturing days required for one laminate block bonding step = 1 day, the number of manufacturing days in the conventional sequential lamination method Number of wiring layers to be formed = 8 signal layers + 5 ground layers = 13 layers Number of days required for forming wiring layers = 13 days Number of insulating layers to be formed = 13 layers The number of days required for forming the insulating layer = 13 days. Therefore, the number of manufacturing days = 13 days + 13 days = 26 days.

Manufacturing Days in the Manufacturing Method of the Present Invention Number of Wiring Layers in One Stack Block = 2 Signal Layers + 1 Ground Layer = 3 Layers Number of Insulating Layers in One Stack Block = 3 Layers One Stack Number of days required for block formation = 6 days Number of times of lamination block bonding = 3 times Days required for three lamination block bonding steps = 3 days Therefore, the number of manufacturing days = 6 days + 3 days = 9 days.

Effect The production days are reduced by 65%. It is clear from the above example that the effect of the folded multilayer wiring board and the method of manufacturing the same according to the present invention increases as the number of signal wiring layers increases.

As described above, the present invention provides a high-quality, high-multilayer, high-wiring-density polyimide multilayer wiring board in a short number of production days.
In addition, there is an effect that it can be formed with a high production yield.

[Brief description of the drawings]

FIG. 1 shows a first structure of a polyimide multilayer wiring board according to the present invention.
1 illustrates the embodiment of FIG.

FIG. 2 illustrates a first embodiment of the manufacturing method of the present invention in the order of the manufacturing steps.

FIG. 3 shows a first embodiment of the manufacturing method of the present invention in the order of the manufacturing steps.

FIG. 4 illustrates a first embodiment of the manufacturing method of the present invention in the order of the manufacturing steps.

FIG. 5 illustrates a first embodiment of the manufacturing method of the present invention in the order of the manufacturing steps.

FIG. 6 shows a second embodiment of the manufacturing method of the present invention in the order of the manufacturing steps.

FIG. 7 shows a second embodiment of the manufacturing method of the present invention in the order of the manufacturing steps.

FIG. 8 shows the second structure of the polyimide multilayer wiring board of the present invention.
1 illustrates the embodiment of FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Aluminum flat plate 2,10 Grounding and connection wiring layer 3,6,12,14,16 Via hole 4,11 Polyimide varnish 5,13 Signal wiring layer 7,17,18 Gold tin solder bump 8 Input / output pin 9 Ceramic substrate 15 Second grounding and connection layer 19 LSI connection pad 20 Maleimide resin 21, 27 Tin-lead-bismuth-based solder bump 23 Polyimide with glass transition point 24 Block 25 Polyimide multilayer wiring layer on aluminum flat plate 26 Polyimide multilayer wiring layer on ceramic substrate 26 33 Polyimide molded substrate 34 Input / output pins driven into polyimide molded substrate

Claims (4)

(57) [Claims] 1. A multilayer wiring board having a polyimide multilayer wiring layer on a ceramic substrate or a hard organic resin substrate, wherein the polyimide multilayer wiring layer forms a laminate of a plurality of wiring layers into one block, It is a laminated structure, the connection between each block is the brazing of solder bumps formed on the surface of the laminate of each block,
A polyimide multilayer wiring board made of a polyimide resin having a glass transition point . 2. A polyimide multilayer wiring layer having a laminate of a plurality of wiring layers as one block is formed on a hard flat plate, and at least the uppermost layer of the polyimide multilayer wiring layer is made of a polyimide resin having a glass transition point. A first step of forming a solder bump electrically connected to a wiring layer inside the laminate through a via hole on the surface of the polyimide multilayer wiring layer; Forming a polyimide multilayer wiring layer having the laminate of wiring layers as one block, and forming solder bumps electrically connected to the wiring layer inside the laminate via via holes on the surface of the polyimide multilayer wiring layer. Step 2, the polyimide surface of the polyimide multilayer wiring layer formed in the first step is aligned with the surface of the polyimide multilayer wiring layer formed in the second step. Then, under pressure and heating conditions, the polyimide surface of the polyimide multilayer wiring layer formed in the first step and the polyimide surface of the polyimide multilayer wiring layer formed in the second step are polyimide having a glass transition point. The hard flat plate used when forming the polyimide multilayer wiring layer in the first step is formed by bonding the resin with self-adhesive properties, brazing the solder bumps at the same time, and electrically connecting the laminates. The third step of peeling off the polyimide multilayer wiring layer and forming solder bumps electrically connected to the wiring layer inside the laminate through via holes on the newly exposed polyimide surface, the same as the first step The polyimide surface of another polyimide multi-layer wiring layer formed by the method and the surface of the polyimide multi-layer wiring layer formed in the third step are formed by using the same method as in the third step. A fourth step of forming a multi-layer wiring layer laminated structure; and a fifth step of forming a polyimide multi-layer wiring layer laminated structure by repeating the fourth step a plurality of times. Substrate manufacturing method. 3. A polyimide multilayer wiring layer having a laminate of a plurality of wiring layers as one block is formed on a hard flat plate, and a melt-curable or molten adhesive is formed on the uppermost layer of the polyimide multilayer wiring layer. A first step of forming a solder bump electrically connected to a wiring layer inside the laminate through a via hole on the surface of the adhesive layer, and forming a plurality of wirings on a hard substrate such as a ceramic. Forming a polyimide multi-layer wiring layer having the layer stack as one block, and forming solder bumps on the surface of the polyimide multi-layer wiring layer, which are electrically connected to the wiring layer inside the stack through via holes. And positioning the adhesive layer of the polyimide multi-layer wiring layer formed in the first step and the surface of the polyimide multi-layer wiring layer formed in the second step so as to overlap with each other. Article Below, the adhesive surface of the polyimide multilayer wiring layer formed in the first step and the polyimide surface of the polyimide multilayer wiring layer formed in the second step are bonded with an adhesive, and the solder bumps are simultaneously brazed. Then, the laminate was electrically connected, and then the hard flat plate used in forming the polyimide multilayer wiring layer in the first step was peeled off from the polyimide multilayer wiring layer to form a via hole on the newly exposed polyimide surface. A third step of forming a solder bump electrically connected to the wiring layer inside the laminate through the third step; an adhesive layer of another polyimide multilayer wiring layer formed by the same method as the first step; By repeating the fourth step and the fourth step of forming the polyimide multilayer wiring layer laminated structure by using the same method as the third step on the surface of the polyimide multilayer wiring layer formed in the step Po Method for manufacturing a polyimide multilayer wiring substrate characterized by comprising a fifth step of forming an imide multilayer wiring layer stacked structure. 4. A method for producing a polyimide multilayer wiring board according to claim 3, wherein a melt-curing type or a melting type adhesive is used on both sides of the polyimide surface to be aligned and superposed.