JP2577639Y2 - Semiconductor device having circuit board - Google Patents
Semiconductor device having circuit boardInfo
- Publication number
- JP2577639Y2 JP2577639Y2 JP1993040984U JP4098493U JP2577639Y2 JP 2577639 Y2 JP2577639 Y2 JP 2577639Y2 JP 1993040984 U JP1993040984 U JP 1993040984U JP 4098493 U JP4098493 U JP 4098493U JP 2577639 Y2 JP2577639 Y2 JP 2577639Y2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- support plate
- recesses
- semiconductor device
- concave portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3205—Shape
- H01L2224/32057—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
- Die Bonding (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本考案は樹脂封止体のクラックの
発生を防止できる回路基板を有する半導体装置に関連す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a circuit board capable of preventing a crack in a resin sealing body.
【０００２】[0002]
【従来の技術】アルミナ等のセラミック材から成る回路
基板を固着した金属製の支持板を絶縁性樹脂で一体に樹
脂封止した半導体装置が公知である。回路基板及び支持
板のいずれに対しても接着性が比較的良好なエポキシ系
接着性樹脂によって回路基板が支持板に固着される。2. Description of the Related Art A semiconductor device is known in which a metal support plate to which a circuit board made of a ceramic material such as alumina is fixed with an insulating resin. The circuit board is fixed to the support plate by an epoxy-based adhesive resin having relatively good adhesion to both the circuit board and the support plate.
【０００３】[0003]
【考案が解決しようとする課題】ところで、多数回のヒ
ートサイクルを反復する厳しい耐環境試験を受けると、
前記半導体装置では接着性樹脂と支持板の界面で剥離が
生じるため、前記界面の延長上近傍で樹脂封止体にクラ
ックが生じることがあった。[Problems to be solved by the invention] By the way, when subjected to severe environmental resistance tests in which a number of heat cycles are repeated,
In the semiconductor device, since peeling occurs at the interface between the adhesive resin and the support plate, cracks may occur in the resin sealing body near the extension of the interface.
【０００４】そこで、本考案は回路基板を支持板に固定
する接着性樹脂を支持板に強固に固着できる半導体装置
を提供することを目的とする。Accordingly, an object of the present invention is to provide a semiconductor device capable of firmly fixing an adhesive resin for fixing a circuit board to a support plate to the support plate.
【０００５】[0005]
【課題を解決するための手段】この考案による半導体装
置は、金属製の支持板と、支持板に固着される回路基板
とを備え、回路基板と対向する金属製の支持板の主面に
複数の凹部を溝状に形成し、凹部の底面から離間して内
側に突出する突起を凹部の側面に設け、突起間の間隔を
側面の幅より小さくし、凹部内に充填した接着剤により
支持板の主面と回路基板とを接着する。この半導体装置
では、隣接する凹部の間隔を回路基板の端部側で小さく
して凹部の数を相対的に密に形成し、回路基板の中央側
で凹部の間隔を大きくして凹部の数を相対的に粗に形成
する。A semiconductor device according to the present invention includes a metal support plate and a circuit board fixed to the support plate, and a plurality of metal support plates are provided on a main surface of the metal support plate facing the circuit board. The recesses are formed in a groove shape, projections are provided on the side surfaces of the recesses and are spaced apart from the bottom surface of the recesses, the spacing between the projections is made smaller than the width of the side surfaces, and the support plate is filled with an adhesive filled in the recesses. Is bonded to the circuit board. In this semiconductor device, the interval between adjacent recesses is reduced on the end side of the circuit board to form a relatively dense number of recesses, and the interval between recesses is increased on the center side of the circuit board to reduce the number of recesses. Form relatively coarse.
【０００６】[0006]
【作用】溝状の凹部を回路基板の端部側で密に形成する
と共に、中央側で粗に形成するので、支持板の凹部内に
充填される接着剤により回路基板を支持板に強固に固定
すると共に、回路基板の端部側で発生し易い樹脂封止体
のクラックを有効に防止することができ、回路基板の中
央側で放熱性の低下を防止することができる。Since the groove-shaped recesses are formed densely at the end portions of the circuit board and are formed roughly at the center side, the circuit board is firmly attached to the support plate by an adhesive filled in the recesses of the support plate. In addition to fixing, cracks in the resin sealing body, which are likely to occur on the end side of the circuit board, can be effectively prevented, and a decrease in heat dissipation on the center side of the circuit board can be prevented.
【０００７】[0007]
【実施例】次に、本考案による半導体装置の実施例を図
１〜図６について説明する。1 to 6 show an embodiment of a semiconductor device according to the present invention.
【０００８】図１及び図２は本考案による半導体装置の
実施例を示す。本実施例の半導体装置は、回路基板
（2）及び半導体素子（3）を上面に固着した放熱板を兼
ねる金属製の支持板（1）を樹脂封止体（4）によって一
体に樹脂封止した構造を備えている。図１は、説明の便
宜上、回路基板（2）及び半導体素子（3）を除去した支
持板（1）を示す。実際の半導体装置では、回路基板
（2）と半導体素子（3）と外部リード（5）とを図示し
ないリード細線によって電気的に接続する。図２に示す
ように、回路基板（2）はエポキシ系樹脂等の接着剤
（6）によって支持板（1）に固着されている。FIGS. 1 and 2 show an embodiment of a semiconductor device according to the present invention. In the semiconductor device of the present embodiment, a metal support plate (1) also serving as a heat sink having a circuit board (2) and a semiconductor element (3) fixed to an upper surface is integrally resin-sealed by a resin sealing body (4). It has a unique structure. FIG. 1 shows a support plate (1) from which a circuit board (2) and a semiconductor element (3) are removed for convenience of explanation. In an actual semiconductor device, the circuit board (2), the semiconductor element (3), and the external leads (5) are electrically connected by thin lead wires (not shown). As shown in FIG. 2, the circuit board (2) is fixed to the support plate (1) with an adhesive (6) such as an epoxy resin.
【０００９】図１及び図２に示すように、本実施例は、
回路基板（2）を固着すべき支持板（1）の接着領域
（7）に回路基板（2）の短辺方向に延伸する細長い溝状
に凹部（8）を形成した点で従来技術と異なる。回路基
板（2）と対向する支持板（1）の主面（1a）に形成され
た複数の溝状の凹部（8）は、支持板（1）の主面（1a）
とほぼ並行な底面（9）と、底面（9）に対してほぼ直角
な側面（10）とを有する。複数の溝状の凹部（8）の側
面（10）には、図４に示すように、底面（9）とほぼ並
行に且つ内側に突出する突起（11）が形成される。側面
（10）は、突起（11）の内側に形成された「あり型断
面」の内側室（12）と、突起（11）の外側に形成された
「溝型断面」の外側室（13）を形成する。いずれにして
も、突起（11）間の間隔は側面（10）の幅より小さく、
内側室（12）と外側室（13）との間でネック部を形成す
る。As shown in FIG. 1 and FIG.
It differs from the conventional technology in that a concave portion (8) is formed in an elongated groove shape extending in the short side direction of the circuit board (2) in the bonding area (7) of the support plate (1) to which the circuit board (2) is to be fixed. . The plurality of groove-shaped recesses (8) formed on the main surface (1a) of the support plate (1) facing the circuit board (2) are formed on the main surface (1a) of the support plate (1).
And a side surface (10) substantially perpendicular to the bottom surface (9). On the side surface (10) of the plurality of groove-shaped concave portions (8), as shown in FIG. 4, a projection (11) projecting substantially parallel to and inward from the bottom surface (9) is formed. The side surface (10) has an inner chamber (12) having a "shaped cross section" formed inside the projection (11) and an outer chamber (13) having a "grooved cross section" formed outside the projection (11). To form In any case, the distance between the protrusions (11) is smaller than the width of the side (10),
A neck is formed between the inner chamber (12) and the outer chamber (13).
【００１０】溝状の凹部（8）を形成する場合、図３及
び図４に示すよう、金型（14）をポンチングして内側室
（12）を形成し、次に、内側室（12）を含む支持板
（1）上面に前記金型（14）より幅の広い金型（15）を
ポンチングして外側室（13）及び突出部分（11）を形成
することにより、支持板（1）の上面に細長い溝状の凹
部（8）を形成する。幅の広い金型（15）で形成される
外側室（13）の側面（10b）間の幅は、内側室（12）の
側面（10a）間の幅よりも広い。When forming the groove-shaped concave portion (8), as shown in FIGS. 3 and 4, the mold (14) is punched to form the inner chamber (12), and then the inner chamber (12) is formed. The support plate (1) is formed by punching a mold (15) wider than the mold (14) on the upper surface of the support plate (1) to form the outer chamber (13) and the protruding portion (11). An elongated groove-shaped recess (8) is formed on the upper surface of the substrate. The width between the side surfaces (10b) of the outer chamber (13) formed by the wide mold (15) is wider than the width between the side surfaces (10a) of the inner chamber (12).
【００１１】複数の溝状に形成されかつ隣接する凹部
（8）の間隔を回路基板（2）の端部側で小さくして凹部
（8）の数を相対的に密に形成し、回路基板（2）の中央
側で大きくして凹部（8）の数を相対的に粗に形成す
る。これにより、支持板（1）の凹部（8）内に充填され
る接着剤（6）により、剥離を生ずることなく溝状の凹
部（8）内のネック部で突起（11）に係止し、回路基板
（2）を支持板（1）に強固に固定するとともに、回路基
板（2）の端部側で発生し易い樹脂封止体（4）のクラッ
ク、反り及び割れを有効に防止することができ、回路基
板（2）の中央側で放熱性の低下を防止することができ
る。The distance between the recesses (8) formed in a plurality of grooves and adjacent to each other is reduced on the end side of the circuit board (2) so that the number of the recesses (8) is formed relatively densely. The number of the concave portions (8) is made relatively large by increasing the size on the center side of (2). As a result, the adhesive (6) filled in the concave portion (8) of the support plate (1) locks the projection (11) at the neck portion in the groove-shaped concave portion (8) without peeling. In addition to firmly fixing the circuit board (2) to the support plate (1), it effectively prevents cracks, warpage, and cracks in the resin sealing body (4), which is likely to occur at the end of the circuit board (2). Therefore, it is possible to prevent a decrease in heat radiation on the center side of the circuit board (2).
【００１２】本考案の実施態様は前記の実施例に限定さ
れず、溝状の凹部（8）の形状は、種々の変更が可能で
ある。例えば、図５のように、溝状の凹部（8）の開口
部分に突出部分（11）を設けても良い。図５の溝状の凹
部（8）は、図３の溝状の凹部（8）の近傍の支持板
（1）上面を軽くたたいて、凹部（8）形成によって盛り
上がった山状部分を凹部（8）の内側に押し込んで形成
される。支持板（1）の上面に形成される溝状の凹部
（8）は、クラックが生じ易い回路基板（2）の周縁側に
密に設けられ、中央側に粗に設けられる。図６に示すよ
うに、溝状の凹部（8）は、内側室（12）の側面（10a）
と外側室（13）の側面（10b）とを同一角度又は異なる
角度で傾斜状態に形成してもよい。The embodiment of the present invention is not limited to the above embodiment, and the shape of the groove-shaped recess (8) can be variously changed. For example, as shown in FIG. 5, a projecting portion (11) may be provided at the opening of the groove-shaped concave portion (8). The groove-shaped recess (8) in FIG. 5 is obtained by lightly tapping the upper surface of the support plate (1) near the groove-shaped recess (8) in FIG. It is formed by pushing inside (8). The groove-shaped recesses (8) formed on the upper surface of the support plate (1) are densely provided on the peripheral side of the circuit board (2) where cracks are likely to occur, and are coarsely provided on the center side. As shown in FIG. 6, the groove-shaped recess (8) is provided on the side surface (10a) of the inner chamber (12).
And the side surface (10b) of the outer chamber (13) may be inclined at the same angle or different angles.
【００１３】[0013]
【考案の効果】前記のように、回路基板は支持板に強固
に固定されるとともに、樹脂封止体のクラックの発生を
防止し且つ反り及び割れを防止する。また、回路基板の
放熱性の低下を防止する。これにより、半導体装置の寿
命を延長でき、信頼性の高い半導体装置を得ることがで
きる。As described above, the circuit board is firmly fixed to the support plate, and at the same time, the occurrence of cracks in the resin sealing body and the prevention of warpage and cracking are prevented. Further, the heat radiation of the circuit board is prevented from lowering. Thus, the life of the semiconductor device can be extended, and a highly reliable semiconductor device can be obtained.
【図１】 回路基板及び半導体素子を除去した本考案に
よる半導体装置の平面図FIG. 1 is a plan view of a semiconductor device according to the present invention from which a circuit board and a semiconductor element are removed.
【図２】 図１のＩＩ−ＩＩ線に沿うの部分断面図FIG. 2 is a partial cross-sectional view taken along the line II-II of FIG.
【図３】 凹部の内側室を形成する状態を示す部分断面
図FIG. 3 is a partial cross-sectional view showing a state in which an inner chamber of a recess is formed.
【図４】 凹部の外側室を形成する状態を示す部分断面
図FIG. 4 is a partial cross-sectional view showing a state in which an outer chamber of a recess is formed.
【図５】 凹部の他の実施例を示す部分断面図FIG. 5 is a partial sectional view showing another embodiment of the concave portion.
【図６】 凹部の更に別の実施例を示す部分断面図FIG. 6 is a partial sectional view showing still another embodiment of the recess.
【符号の説明】 （1）・・支持板、 （1a）・・主面、 （2）・・回路
基板、 （6）・・接着剤、 （8）・・凹部、 （9）
・・底面、 （10）・・側面、 （11）・・突起、[Description of Signs] (1) Support plate, (1a) Main surface, (2) Circuit board, (6) Adhesive, (8) Concave part, (9)
・ ・ Bottom, (10) ・ ・ Side, (11) ・ ・ Protrusion,
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6，ＤＢ名) H01L 21/52──────────────────────────────────────────────────の Continued on the front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 21/52
Claims (1)
る回路基板とを備え、該回路基板と対向する前記支持板
の主面に複数の凹部を溝状に形成し、該凹部の底面から
離間して内側に突出する突起を前記凹部の側面に設け、
前記突起間の間隔を前記側面の幅より小さくし、前記凹
部内に充填した接着剤により前記支持板の主面と前記回
路基板とを接着した半導体装置において、 隣接する前記凹部の間隔を前記回路基板の端部側で小さ
くして前記凹部の数を相対的に密に形成し、前記回路基
板の中央側で前記凹部の間隔を大きくして前記凹部の数
を相対的に粗に形成したことを特徴とする回路基板を有
する半導体装置。A metal support plate and a circuit board fixed to the support plate, wherein a plurality of recesses are formed in a groove shape on a main surface of the support plate facing the circuit board; Protrusions are provided on the side surfaces of the concave portion, the protrusions projecting inward away from the bottom surface of the concave portion,
In a semiconductor device in which the distance between the protrusions is smaller than the width of the side surface and the main surface of the support plate and the circuit board are bonded to each other with an adhesive filled in the concave portion, the distance between the adjacent concave portions is set to the circuit width. The number of the recesses is relatively densely formed by reducing the number of the recesses on the end side of the board, and the number of the recesses is relatively coarsely formed by increasing the interval between the recesses on the center side of the circuit board. A semiconductor device having a circuit board, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1993040984U JP2577639Y2 (en) | 1993-07-28 | 1993-07-28 | Semiconductor device having circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1993040984U JP2577639Y2 (en) | 1993-07-28 | 1993-07-28 | Semiconductor device having circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0710939U JPH0710939U (en) | 1995-02-14 |
| JP2577639Y2 true JP2577639Y2 (en) | 1998-07-30 |
Family
ID=12595697
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1993040984U Expired - Fee Related JP2577639Y2 (en) | 1993-07-28 | 1993-07-28 | Semiconductor device having circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2577639Y2 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0274315U (en) * | 1988-11-18 | 1990-06-06 | ||
| JP2009302209A (en) * | 2008-06-11 | 2009-12-24 | Nec Electronics Corp | Lead frame, semiconductor device, manufacturing method of lead frame, and manufacturing method of semiconductor device |
| JP5544694B2 (en) * | 2008-09-10 | 2014-07-09 | 株式会社リコー | Optical element fixing mechanism, optical scanning device, and image forming apparatus |
| JP2014029909A (en) * | 2012-07-31 | 2014-02-13 | Kyocera Corp | Electronic device |
| JP7139286B2 (en) * | 2019-05-29 | 2022-09-20 | 株式会社 日立パワーデバイス | semiconductor equipment |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63178342U (en) * | 1987-05-12 | 1988-11-18 | ||
| JPH02246359A (en) * | 1989-03-20 | 1990-10-02 | Fujitsu Ltd | Semiconductor device |
| JPH04312932A (en) * | 1991-01-30 | 1992-11-04 | Hitachi Ltd | Semiconductor device and brazing method thereof |
-
1993
- 1993-07-28 JP JP1993040984U patent/JP2577639Y2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0710939U (en) | 1995-02-14 |
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