JPH0710939U - Semiconductor device having circuit board - Google Patents

Semiconductor device having circuit board

Info

Publication number
JPH0710939U
JPH0710939U JP4098493U JP4098493U JPH0710939U JP H0710939 U JPH0710939 U JP H0710939U JP 4098493 U JP4098493 U JP 4098493U JP 4098493 U JP4098493 U JP 4098493U JP H0710939 U JPH0710939 U JP H0710939U
Authority
JP
Japan
Prior art keywords
circuit board
support plate
recess
semiconductor device
adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4098493U
Other languages
Japanese (ja)
Other versions
JP2577639Y2 (en
Inventor
和美 高畠
智行 井原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP1993040984U priority Critical patent/JP2577639Y2/en
Publication of JPH0710939U publication Critical patent/JPH0710939U/en
Application granted granted Critical
Publication of JP2577639Y2 publication Critical patent/JP2577639Y2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205Shape
    • H01L2224/32057Shape in side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mounting Of Printed Circuit Boards And The Like (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】 【目的】 半導体装置の回路基板を支持板に固定するた
めの接着性樹脂を支持板に強固に固着する。 【構成】 複数の凹部を回路基板(2)と対向する支持
板(1)の主面(1a)に形成する。凹部の側面(10)に
は内側に突出する突起(11)を形成し、突起(11)間の
間隔は側面(10)の幅より小さく、接着剤(6)は凹部
内に充填され且つ支持板(1)の主面(1a)と回路基板
(2)とを接着する。支持板(1)の凹部内に充填され且
つ固化される接着剤(6)は、凹部内の突起(11)に係
止するから、支持板(1)に対して強固に接着され、回
路基板(2)を支持板(1)に固定する。
(57) [Abstract] [Purpose] An adhesive resin for fixing a circuit board of a semiconductor device to a supporting plate is firmly fixed to the supporting plate. [Structure] A plurality of recesses are formed on a main surface (1a) of a support plate (1) facing a circuit board (2). Protrusions (11) protruding inward are formed on the side surface (10) of the recess, the spacing between the protrusions (11) is smaller than the width of the side surface (10), and the adhesive (6) is filled and supported in the recess. The main surface (1a) of the plate (1) and the circuit board (2) are bonded together. Since the adhesive (6) filled and solidified in the recess of the support plate (1) is locked to the protrusion (11) in the recess, it is firmly adhered to the support plate (1) and the circuit board. Fix (2) to the support plate (1).

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案は樹脂封止体のクラックの発生を防止できる回路基板を有する半導体装 置に関連する。 The present invention relates to a semiconductor device having a circuit board that can prevent cracking of a resin encapsulant.

【0002】[0002]

【従来の技術】[Prior art]

アルミナ等のセラミック材から成る回路基板を固着した金属製の支持板を絶縁 性樹脂で一体に樹脂封止した半導体装置が公知である。回路基板及び支持板のい ずれに対しても接着性が比較的良好なエポキシ系接着性樹脂によって回路基板が 支持板に固着される。 A semiconductor device is known in which a metal support plate to which a circuit board made of a ceramic material such as alumina is fixed is integrally sealed with an insulating resin. The circuit board is fixed to the support plate by an epoxy adhesive resin, which has relatively good adhesiveness to either the circuit board or the support plate.

【0003】[0003]

【考案が解決しようとする課題】[Problems to be solved by the device]

ところで、多数回のヒートサイクルを反復する厳しい耐環境試験を受けると、 前記半導体装置では接着性樹脂と支持板の界面で剥離が生じるため、前記界面の 延長上近傍で樹脂封止体にクラックが生じることがあった。 By the way, when subjected to a strict environmental resistance test in which a number of heat cycles are repeated, peeling occurs at the interface between the adhesive resin and the support plate in the semiconductor device, so cracks develop in the resin encapsulant near the interface extension. It happened.

【0004】 そこで、本考案は回路基板を支持板に固定する接着性樹脂を支持板に強固に固 着できる半導体装置を提供することを目的とする。Therefore, an object of the present invention is to provide a semiconductor device in which an adhesive resin for fixing a circuit board to a support plate can be firmly adhered to the support plate.

【0005】[0005]

【課題を解決するための手段】[Means for Solving the Problems]

接着剤により回路基板を金属製の支持板に固着した本考案による半導体装置で は、複数の凹部が回路基板と対向する支持板の主面に形成される。凹部の側面に は内側に突出する突起が形成される。突起間の間隔は側面の幅より小さい。接着 剤は凹部内に充填され且つ支持板の主面と回路基板とを接着する。凹部は支持板 の主面に点在して円筒状に形成されるか又は溝状に形成され、溝状に形成される 場合、凹部は回路基板の端部側で相対的に密に形成され、中央側で粗に形成され る。 In the semiconductor device according to the present invention in which the circuit board is fixed to the metal support plate with the adhesive, a plurality of recesses are formed on the main surface of the support plate facing the circuit board. A protrusion protruding inward is formed on the side surface of the recess. The distance between the protrusions is smaller than the width of the side surface. The adhesive is filled in the recess and bonds the main surface of the support plate and the circuit board together. The recesses are formed on the main surface of the support plate in a cylindrical shape or in the shape of a groove. When the recesses are formed, the recesses are formed relatively densely on the end side of the circuit board. , Coarsely formed on the center side.

【0006】[0006]

【作用】[Action]

支持板の凹部内に充填され且つ固化される接着剤は、剥離を生ずることなく凹 部内の突起に係止して、支持板に対して強固に接着され、回路基板を支持板に固 定する。また、支持板の表面上で規則的に点在して凹部を形成すると、回路基板 に反りや割れが生じない。また、溝状の凹部を回路基板の端部側で密に、中央側 で粗に形成するので、クラックの発生を有効に防止できるとともに、放熱性の点 でも有利である。 The adhesive that is filled and solidified in the recess of the support plate is locked to the protrusion in the recess without peeling and is firmly adhered to the support plate to fix the circuit board to the support plate. . Further, when the recesses are regularly formed on the surface of the support plate to form the recesses, the circuit board does not warp or crack. Further, since the groove-shaped recesses are densely formed on the end side of the circuit board and coarsely formed on the center side, it is possible to effectively prevent the generation of cracks, and it is also advantageous in terms of heat dissipation.

【0007】[0007]

【実施例】【Example】

次に、本考案による半導体装置の実施例を図1〜図8について説明する。 Next, an embodiment of the semiconductor device according to the present invention will be described with reference to FIGS.

【0008】 図1〜図4は本考案による半導体装置の第1の実施例を示す。本実施例の半導 体装置は、回路基板(2)及び半導体素子(3)を上面に固着した放熱板を兼ねる 金属製の支持板(1)を樹脂封止体(4)によって一体に樹脂封止した構造を備え ている。図1は、説明の便宜上、回路基板(2)及び半導体素子(3)を除去した 支持板(1)を示す。実際の半導体装置では、回路基板(2)と半導体素子(3) と外部リード(5)とを図示しないリード細線によって電気的に接続する。図2 に示すように、回路基板(2)はエポキシ系樹脂等の接着剤(6)によって支持板 (1)に固着されている。1 to 4 show a first embodiment of a semiconductor device according to the present invention. In the semiconductor device of this embodiment, a metal support plate (1) also serving as a heat dissipation plate having a circuit board (2) and a semiconductor element (3) fixed to the upper surface is integrally resin-molded by a resin sealing body (4). It has a sealed structure. FIG. 1 shows the support plate (1) from which the circuit board (2) and the semiconductor element (3) are removed for convenience of explanation. In an actual semiconductor device, the circuit board (2), the semiconductor element (3), and the external lead (5) are electrically connected by a lead wire (not shown). As shown in FIG. 2, the circuit board (2) is fixed to the support plate (1) with an adhesive (6) such as epoxy resin.

【0009】 図1及び図2に示すように、本実施例は、回路基板(2)を固着すべき支持板 (1)の接着領域(7)に多数の円筒状の凹部(8)を形成した点で従来技術と異 なる。回路基板(2)と対向する支持板(1)の主面(1a)に形成された各凹部( 8)は、支持板(1)の主面(1a)とほぼ並行な底面(9)と、底面(9)に対して ほぼ直角な側面(10)とを有する。平面円形状の凹部(8)の側面(10)には、 図4に示すように、底面(9)とほぼ並行に且つ内側で環状に突出する突起(11 )が形成される。側面(10)は突起(11)の内側に形成された小径部(10a)と 、突起(11)の外側に形成された大径部(10b)とを備え、小径部(10a)は「あ り型断面」の内側室(12)を形成し、大径部(10b)は「溝型断面」の外側室(1 3)を形成する。いずれにしても、突起(11)間の間隔は側面(10)の幅より小 さく、内側室(12)と外側室(13)との間でネック部を形成する。As shown in FIGS. 1 and 2, in this embodiment, a large number of cylindrical recesses (8) are formed in the bonding area (7) of the support plate (1) to which the circuit board (2) is to be fixed. This is different from the conventional technology. Each recess (8) formed on the main surface (1a) of the support plate (1) facing the circuit board (2) has a bottom surface (9) substantially parallel to the main surface (1a) of the support plate (1). , And a side surface (10) substantially perpendicular to the bottom surface (9). As shown in FIG. 4, a protrusion (11) is formed on the side surface (10) of the flat circular recess (8) so as to project in an annular shape substantially parallel to the bottom surface (9) and inside. The side surface (10) has a small diameter portion (10a) formed inside the protrusion (11) and a large diameter portion (10b) formed outside the protrusion (11), and the small diameter portion (10a) is An inner chamber (12) having a "cross section" is formed, and a large diameter portion (10b) forms an outer chamber (13) having a "groove cross section". In any case, the interval between the protrusions (11) is smaller than the width of the side surface (10), and forms a neck portion between the inner chamber (12) and the outer chamber (13).

【0010】 凹部(8)を形成する場合、図3及び図4に示すよう、支持板(1)の上面に円 柱状の小径金型(14)をポンチングして内側室(12)を形成する。次に、内側室 (12)を含む支持板(1)上面に円柱状の大径金型(15)をポンチングして外側 室(13)及び突出部分(11)を形成する。大径金型(15)で形成される外側室( 13)は、内側室(12)よりも径が大きい。When forming the concave portion (8), as shown in FIGS. 3 and 4, a cylindrical small-diameter mold (14) is punched on the upper surface of the support plate (1) to form the inner chamber (12). . Next, a cylindrical large-diameter die (15) is punched on the upper surface of the support plate (1) including the inner chamber (12) to form the outer chamber (13) and the protruding portion (11). The outer chamber (13) formed by the large-diameter mold (15) has a larger diameter than the inner chamber (12).

【0011】 接着剤(6)は凹部(8)内に充填され且つ支持板(1)の主面(1a)と回路基 板(2)とを接着する。支持板(1)の凹部(8)内に充填され且つ固化される接 着剤(6)は、剥離を生ずることなく凹部(8)内のネック部で突起(11)に係止 するから、支持板(1)に対して強固に接着される。支持板(1)に対する密着性 が向上した接着剤(6)によって回路基板(2)を支持板(1)に固定することが できる。また、支持板(1)の表面上で規則的に独立して点在する凹部(8)を形 成すると、接着剤(6)に亀裂が生じてもそれが成長し難く、樹脂封止体(4)に クラックが生じない。この点において凹部(8)を図5及び図6のように溝状に 形成した場合よりも有利である。The adhesive (6) is filled in the recess (8) and bonds the main surface (1a) of the support plate (1) and the circuit board (2) together. The adhesive (6), which is filled and solidified in the recess (8) of the support plate (1), locks on the protrusion (11) at the neck of the recess (8) without causing separation, It is firmly adhered to the support plate (1). The circuit board (2) can be fixed to the support plate (1) by the adhesive (6) having improved adhesion to the support plate (1). Further, when the recesses (8) regularly and independently scattered on the surface of the support plate (1) are formed, it is difficult for the adhesive (6) to grow even if cracks occur in the adhesive (6). No crack occurs in (4). In this respect, it is more advantageous than the case where the concave portion (8) is formed in a groove shape as shown in FIGS.

【0012】 凹部(8)の形状は種々の変更が可能であり、例えば、回路基板(2)の短辺方 向に延伸する細長い溝状に凹部(8)を形成した本考案の第2の実施例を図5及 び図6に示す。複数本の溝凹部(8)は回路基板(2)の端部側で相対的に密に配 置され、中央側で相対的に粗に配置される。The shape of the recess (8) can be variously changed, and for example, the second recess of the present invention in which the recess (8) is formed in an elongated groove shape extending in the short side direction of the circuit board (2). Examples are shown in FIGS. 5 and 6. The plurality of groove recesses (8) are arranged relatively densely on the end side of the circuit board (2) and relatively coarsely arranged on the center side.

【0013】 本考案の実施態様は前記の実施例に限定されず、変更が可能である。凹部(8 )の形状は、種々の変更が可能である。例えば、図7のように、凹部(8)の開 口部分に突出部分(11)を設けても良い。図7の凹部(8)は、図3の凹部(8) の近傍の支持板(1)上面を軽くたたいて、凹部(9)形成によって盛り上がった 山状部分を凹部(8)の内側に押し込んで形成される。支持板(1)の上面に点在 させる凹部(8)は、クラックが生じ易い回路基板(2)の周縁側に密、中央側に 粗に設けてもよい。図8に示すように内側室(12)の側面を形成する小径部(10 a)及び外側室(13)の側面を形成する大径部(10b)を同一角度又は異なる角度 で傾斜状態に形成してもよい。The embodiment of the present invention is not limited to the above-mentioned embodiments, and can be modified. The shape of the recess (8) can be variously changed. For example, as shown in FIG. 7, a protruding portion (11) may be provided at the opening of the recess (8). The concave part (8) in FIG. 7 is tapped on the upper surface of the support plate (1) in the vicinity of the concave part (8) in FIG. 3 so that the mountain portion raised by forming the concave part (9) is placed inside the concave part (8). It is formed by pushing. The recesses (8) scattered on the upper surface of the support plate (1) may be provided densely on the peripheral side of the circuit board (2) where cracks are likely to occur and roughly on the center side. As shown in FIG. 8, the small diameter portion (10a) forming the side surface of the inner chamber (12) and the large diameter portion (10b) forming the side surface of the outer chamber (13) are formed in an inclined state at the same angle or different angles. You may.

【0014】[0014]

【考案の効果】[Effect of device]

前記のように、接着剤は凹部内の突起に係止して剥離を生ずることなく支持板 に対して強固に接着される。このため、樹脂封止体でのクラックの発生を防止し 且つ回路基板の反り及び割れを防止して、半導体装置の信頼性を向上することが できる。 As described above, the adhesive is firmly adhered to the supporting plate without being separated from the projections in the recesses. Therefore, it is possible to prevent the occurrence of cracks in the resin encapsulant, prevent warpage and breakage of the circuit board, and improve the reliability of the semiconductor device.

【図面の簡単な説明】[Brief description of drawings]

【図1】 回路基板及び半導体素子を除去した本考案に
よる半導体装置の平面図
FIG. 1 is a plan view of a semiconductor device according to the present invention in which a circuit board and a semiconductor element are removed.

【図2】 図1のI−I線に沿うの部分断面図FIG. 2 is a partial cross-sectional view taken along the line II of FIG.

【図3】 凹部の内側室を形成する状態を示す部分断面
FIG. 3 is a partial cross-sectional view showing a state where an inner chamber of a recess is formed.

【図4】 凹部の外側室を形成する状態を示す部分断面
FIG. 4 is a partial cross-sectional view showing a state in which an outer chamber of a recess is formed.

【図5】 本考案の他の実施例を示す平面図FIG. 5 is a plan view showing another embodiment of the present invention.

【図6】 図5のII−II線に沿う断面図6 is a sectional view taken along line II-II in FIG.

【図7】 凹部の他の実施例を示す部分断面図FIG. 7 is a partial cross-sectional view showing another embodiment of the recess.

【図8】 凹部の更に別の実施例を示す部分断面図FIG. 8 is a partial cross-sectional view showing still another embodiment of the recess.

【符号の説明】[Explanation of symbols]

(1)・・支持板、(1a)・・主面、(2)・・回路基
板、(6)・・接着剤、(8)・・凹部、(9)・・底
面、(10)・・側面、(11)・・突起、
(1) ・ ・ Support plate, (1a) ・ ・ Main surface, (2) ・ ・ Circuit board, (6) ・ ・ Adhesive, (8) ・ ・ Concave, (9) ・ ・ Bottom surface, (10) ・・ Side, (11)

Claims (3)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】 接着剤により回路基板を金属製の支持板
に固着した半導体装置において、 複数の凹部を前記回路基板と対向する前記支持板の主面
に形成し、前記凹部の側面には内側に突出する突起を形
成し、該突起間の間隔は前記側面の幅より小さく、前記
接着剤は前記凹部内に充填され且つ前記支持板の主面と
前記回路基板とを接着することを特徴とする回路基板を
有する半導体装置。
1. A semiconductor device in which a circuit board is fixed to a metal support plate with an adhesive, and a plurality of recesses are formed on a main surface of the support plate facing the circuit board, and a side surface of the recess has an inner side. Protruding portions are formed in the concave portion, a space between the protruding portions is smaller than a width of the side surface, the adhesive is filled in the concave portion, and the main surface of the support plate and the circuit board are bonded to each other. Device having a printed circuit board.
【請求項2】 前記凹部は前記支持板の主面に点在して
円筒状に形成される「請求項1」に記載の回路基板を有
する半導体装置。
2. The semiconductor device having the circuit board according to claim 1, wherein the recesses are scattered in the main surface of the support plate and are formed into a cylindrical shape.
【請求項3】 前記凹部は溝状に形成され、前記凹部は
前記回路基板の端部側で相対的に密に形成され、中央側
で粗に形成された「請求項1」に記載の回路基板を有す
る半導体装置。
3. The circuit according to claim 1, wherein the recess is formed in a groove shape, the recess is relatively densely formed on an end side of the circuit board, and is roughly formed on a center side. A semiconductor device having a substrate.
JP1993040984U 1993-07-28 1993-07-28 Semiconductor device having circuit board Expired - Fee Related JP2577639Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1993040984U JP2577639Y2 (en) 1993-07-28 1993-07-28 Semiconductor device having circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1993040984U JP2577639Y2 (en) 1993-07-28 1993-07-28 Semiconductor device having circuit board

Publications (2)

Publication Number Publication Date
JPH0710939U true JPH0710939U (en) 1995-02-14
JP2577639Y2 JP2577639Y2 (en) 1998-07-30

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Country Link
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0274315U (en) * 1988-11-18 1990-06-06
JP2009302209A (en) * 2008-06-11 2009-12-24 Nec Electronics Corp Lead frame, semiconductor device, manufacturing method of lead frame, and manufacturing method of semiconductor device
JP2010066514A (en) * 2008-09-10 2010-03-25 Ricoh Co Ltd Optical element fixing mechanism, optical scanning device, and image forming device
JP2014029909A (en) * 2012-07-31 2014-02-13 Kyocera Corp Electronic device
JP2020194911A (en) * 2019-05-29 2020-12-03 株式会社 日立パワーデバイス Semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63178342U (en) * 1987-05-12 1988-11-18
JPH02246359A (en) * 1989-03-20 1990-10-02 Fujitsu Ltd Semiconductor device
JPH04312932A (en) * 1991-01-30 1992-11-04 Hitachi Ltd Semiconductor device and brazing method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63178342U (en) * 1987-05-12 1988-11-18
JPH02246359A (en) * 1989-03-20 1990-10-02 Fujitsu Ltd Semiconductor device
JPH04312932A (en) * 1991-01-30 1992-11-04 Hitachi Ltd Semiconductor device and brazing method thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0274315U (en) * 1988-11-18 1990-06-06
JP2009302209A (en) * 2008-06-11 2009-12-24 Nec Electronics Corp Lead frame, semiconductor device, manufacturing method of lead frame, and manufacturing method of semiconductor device
JP2010066514A (en) * 2008-09-10 2010-03-25 Ricoh Co Ltd Optical element fixing mechanism, optical scanning device, and image forming device
JP2014029909A (en) * 2012-07-31 2014-02-13 Kyocera Corp Electronic device
JP2020194911A (en) * 2019-05-29 2020-12-03 株式会社 日立パワーデバイス Semiconductor device

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