JP2541938B2 - Syndrome generation circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to the field of error correction, and more particularly to a syndrome generation circuit required in a BCH code encoding / decoding circuit.

[Prior art]

When the received word J represented by the equation (2) in which the error E is added to the code word I is received, the decoder first detects the syndrome S.
Generate In the case of double error correction encoding, the syndrome is generated by taking the product of the check matrix H represented by equation (1) and the received word J. From the equation (3), it can be seen that the syndrome generated in this way is the product of the check matrix H and the error E.

Usually, the syndrome generation circuit has Si = α ^{i (n-1)}・ j1 + α ^{i (n-2)}・ j2 + ・ ・ ・ + α ・ jn-1 + jn = ((((α ⁱ・ j1) + j2) ・Since it can be expressed as α ⁱ ) + ... jn−1) · α ⁱ + jn, the circuit on the Galois field GF (2 ^q ) can be configured as shown in FIG. Here, the α ⁱ circuit is the α ⁱ circuit of FIG.
It can be achieved by stacking the i-circuits (in the case of the primitive polynomial ^{p (x) = x 8 +} x 4 + x 3 + x 2 +1). Therefore, in order to realize S0 to S3 represented by the equation (1), the configuration is as shown in FIG. Here, CK is a clock for each received word ji, and CL is a clear for each code length.

However, the configuration of Figure 3 is largely the original number of the Galois field, when the number of elements S _i of the syndrome often, each S _i
In order to obtain the above, it is necessary to provide each α ⁱ circuit in which α circuits are stacked in i stages, which causes a problem that the circuit configuration becomes large.

Further, when it is desired to serially input each S _i into one circuit, there is a problem that the output S _i collide with each other as they are.

Decoder Whether or not there is an error can be determined by generating a syndrome.

Therefore, the syndrome S is represented by the product of the error E and the check matrix H by the equation (3).

Now consider the case where there are errors ei and ej at the positions of i and j.

1) Syndrome generation (Object) To eliminate the above-mentioned drawbacks of the conventional example, an object of the present invention is to provide a syndrome generation circuit in which the circuit scale of the syndrome generation circuit is as small as possible and the bus line configuration of S0 to S3 is facilitated. I am trying.

It is another object of the present invention to provide a device such as a miniaturized optical disk equipped with the circuit.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the above formulas and drawings. Previously, the applicant was Japanese Patent Application Sho 60-79674.
Since an application for error correction has been filed by, details are omitted.

FIG. 4 is a diagram showing a circuit configuration of the present invention. The circuit of FIG. 4 can be obtained by using the equation (1) without separately forming the α ⁱ circuits.
Using the fact that the root α ^{i of the} BCH code is sequentially raised from α ^r (r: arbitrary, here, r = 0) to α ^{r + 1} , α ^{r + 2} , the circuit scale is small and S0 to S3 Is a bus line configuration. Because S0 to S3 have a bus line configuration
CK and OE (output enable) must be used in a competitive manner between S0 and S3. Therefore, CK and OE used for each of S0 to S3 are controlled by the signals shown in FIG. Note that
CKB1,3,5,7 are inversion signals H → LL → H of CK1,3,5,7). Therefore, it is necessary to input the input J in synchronization with CK1 for each ji. Further, SCL is a signal which becomes L when the first received word j1 is input. By this, S
Then, S0 to S3 are output every 4 cycles and a final answer is generated for each SCL.

 However, SPCL is always H in decoding.

The equation (1) above is calculated by the digital Fourier transform DFT.
It can be applied to the problem of. In advance α ^r
When multiplying by, an α ^r circuit may be inserted between the register outputting J and EXOR.

Alternatively, an α ^rl circuit (an arbitrary positive number for l) may be inserted between the register that outputs J and EXOR, and an α ^l circuit may be inserted before the EXOR and So registers and the α circuit. Then α
^The case where ^r is required is shown in FIG. The α ^x circuit is the α of FIG.
It can be realized by stacking x stages of circuits.

〔effect〕

As described above, according to the present invention, it is possible to generate a syndrome at a high speed with a small circuit scale even when the number of elements in the Galois field is large and the number of elements S _i of the syndrome is large. effective.

Further, there is an effect that each element of the generated syndrome can be output without colliding with one bus line.

As described above, by using the circuit of the present invention for the optical disc, the optical card, the magneto-optical disc, and the DAT, the device can be extremely miniaturized.

[Brief description of drawings]

 FIG. 1 shows a syndrome Si generation circuit. FIG. 2 shows an α circuit. FIG. 3 shows a conventional syndrome generation circuit. FIG. 4 shows a syndrome generation circuit of the present invention. FIG. 5 shows timing. FIG. 6 shows a signal. FIG. 6 shows another example of the syndrome generation circuit of the present invention. CK ... Clock S ... Syndrome α ... Root of BCH code

Claims (2)

(57) [Claims] 1. An EXOR circuit for obtaining an exclusive OR of a received word and a bus line output, which are sequentially input, and an output of the EXOR circuit for a primitive element α of a Galois field is α
ⁱ (i = 1,2, ..., m) times m connected in series with the α-times circuit, the output of the EXOR circuit, and each output of the m-connected α-times circuits in series And m + 1 registers for outputting to the bus line, the contents of the m + 1 registers latched to the bus line at different timings during one input cycle of the sequentially input received word. by controlling so as to output a received word j _1, j _2, which are sequentially input, ..., with respect to j _n, Syndrome S _o, S ₁ consisting, ..., to generate a S _m, the syndrome generating circuit and outputting to the bus line. 2. A received word prior to the input of the EXOR circuit, or an EXOR prior to the input to the α times circuit and the register.
By including a circuit that multiplies the output of the circuit by α ^r , The syndrome generating circuit according to claim 1, wherein the syndromes S _o , S ₁ , ..., S _m are generated and output to the bus line.