JP2531002B2 - Electronic component manufacturing method - Google Patents

Electronic component manufacturing method

Info

Publication number
JP2531002B2
JP2531002B2 JP62222370A JP22237087A JP2531002B2 JP 2531002 B2 JP2531002 B2 JP 2531002B2 JP 62222370 A JP62222370 A JP 62222370A JP 22237087 A JP22237087 A JP 22237087A JP 2531002 B2 JP2531002 B2 JP 2531002B2
Authority
JP
Japan
Prior art keywords
substrate
plating
electronic component
silane coupling
coupling agent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62222370A
Other languages
Japanese (ja)
Other versions
JPS6464302A (en
Inventor
和則 増山
智之 小川
広次 谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP62222370A priority Critical patent/JP2531002B2/en
Publication of JPS6464302A publication Critical patent/JPS6464302A/en
Application granted granted Critical
Publication of JP2531002B2 publication Critical patent/JP2531002B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Adjustable Resistors (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、チップボリューム,チップインダクタ,チ
ップコイル,筒形コンデンサ等の電子部品の製造方法に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing electronic components such as a chip volume, a chip inductor, a chip coil and a cylindrical capacitor.

従来の技術とその問題点 従来、チップボリューム等の電子部品では、ターミナ
ル電極の半田付け耐熱特性を向上させるため、あるいは
半田による銀くわれを防止するため、銀等からなる下地
電極にニッケル,錫又はこれらを含む合金をメッキして
いた。このメッキ処理は、抵抗体等の回路機能部分を含
めて基板表面にメッキレジストを塗布した状態でバレル
メッキにて行ない、メッキ処理後にはメッキレジストを
除去していた。
Conventional technology and its problems Conventionally, in electronic parts such as a chip volume, in order to improve the soldering heat resistance of the terminal electrode or to prevent silver cracking due to solder, the base electrode made of silver or the like has nickel or tin. Alternatively, an alloy containing these was plated. This plating treatment is performed by barrel plating in a state in which a plating resist is applied to the surface of the substrate including a circuit function portion such as a resistor, and the plating resist is removed after the plating treatment.

しかしながら、従来の製造方法では、メッキレジスト
と基板表面とは単に物理的な作用で密着しているため、
密着性が悪く、バレルの衝突によってレジストの欠損,
剥離が生じ、この不良部分よりメッキ析出が発生し、特
性を損なうという問題点を有している。
However, in the conventional manufacturing method, since the plating resist and the substrate surface are in close contact with each other merely by a physical action,
Poor adhesion, chipping of resist due to barrel collision,
There is a problem that peeling occurs, plating deposition occurs from this defective portion, and the characteristics are impaired.

発明の構成 そこで、本発明に係る電子部品の製造方法は、バレル
メッキ処理の前工程として、回路機能部分を含めて基板
表面を、シランカップリング剤又はシリコンプライマで
処理し、その上にメッキレジストを塗布することを特徴
とする。
Therefore, in the method for manufacturing an electronic component according to the present invention, the substrate surface including the circuit functional portion is treated with a silane coupling agent or a silicon primer as a pre-process of the barrel plating treatment, and a plating resist is applied thereon. Is applied.

シランカップリング剤はその分子中に2個以上の異な
った反応基を有する有機けい素単量体であり、一つの反
応基はガラス,金属,けい砂等の無機質と化学結合する
反応基、例えば、メトキシ基、エトキシ基,シラノール
基等である。いま一つの反応基は種々の有機質材料と化
学結合する反応基、例えば、ビニール基,エポキシ基,
アミノ基等である。この様なシランカップリング剤は、
メタノール,エタノール,トルエン,アセント等の溶液
に希釈された状態で用いられる。
A silane coupling agent is an organic silicon monomer having two or more different reactive groups in its molecule, and one reactive group is a reactive group that chemically bonds with an inorganic substance such as glass, metal, and silica, for example, , Methoxy group, ethoxy group, silanol group and the like. Another reactive group is a reactive group that chemically bonds with various organic materials, such as vinyl group, epoxy group,
An amino group and the like. Such a silane coupling agent is
It is used in a state diluted with a solution of methanol, ethanol, toluene, ascent or the like.

また、シリコンプライマはその成分がシランカップリ
ング剤,塗膜形成剤,溶剤,触媒等が含まれている化合
物で、被着体表面に付与することにより、空気中の湿気
と反応して被着体表面と結合し、水素結合による結合と
脱水縮合による結合との効果が存するとされており、レ
ジスト膜の硬化機構に適した官能基を持つプライマーを
選択することで効果的な接着が得られる。
Silicone primer is a compound whose components include silane coupling agent, coating film forming agent, solvent, catalyst, etc. When applied to the surface of the adherend, it reacts with moisture in the air and adheres to it. It is said that there is an effect of binding to the body surface by hydrogen bonding and dehydration condensation, and effective adhesion can be obtained by selecting a primer having a functional group suitable for the curing mechanism of the resist film. .

被処理材としての基板は、無機質絶縁性のもの、例え
ば、アルミナ,ガラス,ジルコニア,フォルステライト
等が用いられる。
As the substrate to be processed, an inorganic insulating material such as alumina, glass, zirconia or forsterite is used.

作 用 以上の如き、シランカップリング剤又はシリコンプラ
イマにて回路機能部分を含む基板表面を処理することに
より、基板表面とメッキレジストとが強固に結合され、
メッキレジストの基板に対する密着性が向上する。
By treating the substrate surface including the circuit functional portion with the silane coupling agent or the silicon primer as described above, the substrate surface and the plating resist are firmly bonded,
The adhesion of the plating resist to the substrate is improved.

特に、シランカップリング剤にあっては、基板や回路
機能部分の無機質と、メッキレジストの有機質とが反応
基と化学結合され、物理的な結合と相俟って強固に結合
されることとなる。
In particular, in the case of the silane coupling agent, the inorganic substance of the substrate or the circuit functional portion and the organic substance of the plating resist are chemically bonded to the reactive group, and are strongly bonded together with the physical bond. .

実施例 第1図はチップボリュームの抵抗体基板を示し、基板
1はアルミナを焼成したものである。基板1の表面には
抵抗体2,コレクタ電極3がスクリーン印刷等の方法で設
けられ、基板1上に焼付けられる。
Example FIG. 1 shows a resistor substrate of a chip volume, and the substrate 1 is made by firing alumina. A resistor 2 and a collector electrode 3 are provided on the surface of the substrate 1 by a method such as screen printing and baked on the substrate 1.

また、基板1の端部には、ターミナル電極を構成する
ための下地電極5,5,6が銀ペーストを印刷,焼付けるこ
とにより形成されている。
Further, base electrodes 5, 5, 6 for forming a terminal electrode are formed on the end portion of the substrate 1 by printing and baking a silver paste.

下地電極5,5,6に対するバレルメッキ処理の前工程と
して、基板1を0.01〜2%に希釈したシランカップリン
グ剤(例えば、γ−グリシドキシプロピルトリメトキシ
シラン、希釈液はエタノール)に浸漬し、乾燥させた。
その後、基板1の表面に、下地電極5,5,6を残して、第
2図に斜線を付した部分にメッキレジストを塗布し、抵
抗体2,コレクタ電極3をマスキングした。
As a pre-process of barrel plating for the base electrodes 5, 5, 6, the substrate 1 is immersed in a silane coupling agent diluted to 0.01 to 2% (for example, γ-glycidoxypropyltrimethoxysilane, the diluting solution is ethanol). And dried.
Thereafter, a plating resist was applied to the shaded portion of FIG. 2 on the surface of the substrate 1 while leaving the underlying electrodes 5, 5, and 6 to mask the resistor 2 and the collector electrode 3.

この様にメッキレジストでマスキングした基板1をバ
レルメッキ容器内に入れ、ニッケルを2μmの厚さに、
次いで錫を3〜4μmの厚さに、合わせて90分間バレル
メッキを行ない、下地電極5,5,6上に2層のメッキ層を
設けてターミナル電極とした。
The substrate 1 thus masked with the plating resist is placed in a barrel plating container, and nickel is deposited to a thickness of 2 μm.
Then, tin was plated to a thickness of 3 to 4 μm for a total of 90 minutes, and two plating layers were provided on the base electrodes 5, 5, 6 to form terminal electrodes.

一方、他の実施例として、第1図に示した基板1を0.
01〜2%に希釈したシリコンプライマに浸漬し、乾燥さ
せた。その後、同様にメッキレジストで回路機能部分を
マスキングし、前記同様のバレルメッキを行なった。
On the other hand, as another embodiment, the substrate 1 shown in FIG.
It was dipped in a silicone primer diluted to 01 to 2% and dried. Thereafter, the circuit functional portion was masked with a plating resist in the same manner, and barrel plating was performed in the same manner as described above.

以上の工程を経て製造されたチップボリュームの抵抗
体基板1について、メッキ析出等の不良品発生率を調べ
た結果、不良品発生率はシランカップリング剤による前
処理を行なった場合は0.2%、シリコンプライマによる
前処理を行なった場合は0.4%であった。なお、これら
の処理を行なわない場合、100%の製品に不良が発生し
た。
With respect to the resistor substrate 1 of the chip volume manufactured through the above steps, the defective product occurrence rate such as plating deposition was examined. As a result, the defective product occurrence rate was 0.2% when pretreatment with a silane coupling agent was performed, It was 0.4% when pretreatment with a silicon primer was performed. If these treatments were not performed, 100% of the products had defects.

これは、シランカップリング剤,シリコンプライマに
よるメッキレジストの基板表面に対する密着性が向上
し、バレルメッキ処理中におけるレジストの欠損,剥離
が皆無であることによる。
This is because the adhesion of the plating resist by the silane coupling agent and the silicon primer to the substrate surface is improved, and there is no defect or peeling of the resist during barrel plating.

また、前記前処理によって抵抗体2,コレクタ電極3の
機能障害,特性劣化、さらには下地電極5,5,6の機能劣
化は全く見られなかった。
Further, the pretreatment did not show any functional impairment of the resistor 2 and the collector electrode 3, deterioration of characteristics, and further no functional deterioration of the base electrodes 5, 5, 6.

発明の効果 本発明によれば、バレルメッキ処理の前工程として基
板表面にシランカップリング剤又はシリコンプライマで
処理する様にしたため、基板表面あるいは抵抗体等の回
路機能部分に対するメッキレジストの密着性が格段に向
上し、バレルメッキ時におけるレジストの欠損,剥離の
発生が防止され、電子部品としての特性の劣化が解消さ
れる。
EFFECTS OF THE INVENTION According to the present invention, since the substrate surface is treated with a silane coupling agent or a silicon primer as a pre-process of barrel plating treatment, the adhesion of the plating resist to the circuit surface portion such as the substrate surface or the resistor is improved. This is remarkably improved, resist defects and peeling are prevented from occurring during barrel plating, and deterioration of characteristics as an electronic component is eliminated.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明に係る製造方法においてシランカップリ
ング処理又はシリコンプライマ処理を行なう前の基板の
平面図、第2図は前記処理後バレルメッキ処理を行なう
ときの基板の平面図である。 1……基板、2……抵抗体、3……コレクタ電極、5,5,
6……下地電極。
FIG. 1 is a plan view of a substrate before performing a silane coupling treatment or a silicon primer treatment in the manufacturing method according to the present invention, and FIG. 2 is a plan view of a substrate when performing a barrel plating treatment after the above treatment. 1 ... Substrate, 2 ... Resistor, 3 ... Collector electrode, 5,5,
6 ... Base electrode.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】抵抗体,電極等の回路機能部分を有する基
板の一部にバレルメッキを施してなる電子部品の製造方
法において、 バレルメッキ処理の前工程として、前記回路機能部分を
含めて基板表面を、シランカップリング剤又はシリコン
プライマで処理し、その上にメッキレジストを塗布する
こと、 を特徴とする電子部品の製造方法。
1. A method of manufacturing an electronic component comprising barrel plating a part of a substrate having a circuit functional portion such as a resistor and an electrode, wherein the substrate including the circuit functional portion is included as a pre-process of barrel plating. A method of manufacturing an electronic component, comprising treating the surface with a silane coupling agent or a silicon primer, and applying a plating resist on the surface.
JP62222370A 1987-09-04 1987-09-04 Electronic component manufacturing method Expired - Lifetime JP2531002B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62222370A JP2531002B2 (en) 1987-09-04 1987-09-04 Electronic component manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62222370A JP2531002B2 (en) 1987-09-04 1987-09-04 Electronic component manufacturing method

Publications (2)

Publication Number Publication Date
JPS6464302A JPS6464302A (en) 1989-03-10
JP2531002B2 true JP2531002B2 (en) 1996-09-04

Family

ID=16781287

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62222370A Expired - Lifetime JP2531002B2 (en) 1987-09-04 1987-09-04 Electronic component manufacturing method

Country Status (1)

Country Link
JP (1) JP2531002B2 (en)

Also Published As

Publication number Publication date
JPS6464302A (en) 1989-03-10

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