JP2519597Y2 - Structure of semiconductor device - Google Patents
Structure of semiconductor deviceInfo
- Publication number
- JP2519597Y2 JP2519597Y2 JP4543891U JP4543891U JP2519597Y2 JP 2519597 Y2 JP2519597 Y2 JP 2519597Y2 JP 4543891 U JP4543891 U JP 4543891U JP 4543891 U JP4543891 U JP 4543891U JP 2519597 Y2 JP2519597 Y2 JP 2519597Y2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- mounting surface
- chip
- wire bonding
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本考案は半導体装置に関し、特に
表面実装タイプの半導体装置の構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a structure of a surface mount type semiconductor device.
【０００２】[0002]
【従来の技術】従来、表面実装タイプの半導体装置は図
２に示すように、リードフレーム１７のチップ搭載面１
７ａに半導体チップ１９が搭載され、半導体チップ１９
の電極とリードフレーム１５，１６のワイヤボンディン
グ面との間がボンディングワイヤ２０で結線され、半導
体チップ１９、ボンディングワイヤ２０及びボンディン
グ箇所の外周が樹脂１８にて被覆されて気密封止されて
おり、樹脂１８からリードフレーム１５，１６，１７の
一部が外部端子１５ａ，１６ａ，１７ｂとして同一平面
上で導出されて表面実装タイプの構造に構成されてい
る。2. Description of the Related Art Conventionally, as shown in FIG. 2, a surface mount type semiconductor device has a chip mounting surface 1 of a lead frame 17, as shown in FIG.
The semiconductor chip 19 is mounted on the semiconductor chip 7a.
The electrodes and the wire bonding surfaces of the lead frames 15 and 16 are connected by the bonding wires 20, and the semiconductor chip 19, the bonding wires 20 and the outer periphery of the bonding portions are covered with the resin 18 and hermetically sealed. A part of the lead frames 15, 16 and 17 is led out from the resin 18 on the same plane as the external terminals 15a, 16a and 17b to form a surface mount type structure.
【０００３】ここで、従来の半導体装置構造では、チッ
プ搭載面１７ａ、ワイヤボンディング面が半導体装置の
実装面２１に対して平行になっている。Here, in the conventional semiconductor device structure, the chip mounting surface 17a and the wire bonding surface are parallel to the mounting surface 21 of the semiconductor device.
【０００４】[0004]
【考案が解決しようとする課題】上述した従来の半導体
装置は、半導体チップ１９とリードフレーム１５，１６
とを接続するボンディングワイヤ２０のたわみ部分の高
さの制限を受け、樹脂１８の厚みの薄形化を実現するこ
とが困難であった。The conventional semiconductor device described above includes the semiconductor chip 19 and the lead frames 15 and 16.
It was difficult to reduce the thickness of the resin 18 due to the limitation of the height of the bending portion of the bonding wire 20 that connects the and.
【０００５】本考案の目的は装置本体の薄形化を実現し
た半導体装置の構造を提供することにある。An object of the present invention is to provide a structure of a semiconductor device which realizes a thinner device body.
【０００６】[0006]
【課題を解決するための手段】前記目的を達成するた
め、本考案に係る半導体装置の構造においては、表面実
装タイプの半導体装置であって、リードフレームのチッ
プ搭載面及びワイヤボンディング面が、該半導体装置の
実装面に対し角度をもって傾斜したものである。In order to achieve the above object, in the structure of a semiconductor device according to the present invention, a semiconductor device of a surface mounting type, in which a chip mounting surface and a wire bonding surface of a lead frame are It is inclined at an angle with respect to the mounting surface of the semiconductor device.
【０００７】[0007]
【作用】本考案では、チップ搭載面及びワイヤボンディ
ング面を半導体装置の実装面に対して角度θをもって傾
斜させ、この傾斜を利用して高さ寸法にｃｏｓθを乗算
した値に高さ寸法が縮小されるようにしたものである。In the present invention, the chip mounting surface and the wire bonding surface are inclined with respect to the mounting surface of the semiconductor device at an angle θ, and the height dimension is reduced to a value obtained by multiplying the height dimension by cos θ using this inclination. It was made to be done.
【０００８】[0008]
【実施例】次に本考案の一実施例を図により説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described with reference to the drawings.
【０００９】図１（ａ）は、本考案の一実施例を示す斜
視図、（ｂ）は、同側面図である。FIG. 1A is a perspective view showing an embodiment of the present invention, and FIG. 1B is a side view of the same.
【００１０】図１（ａ），（ｂ）において、気密封止用
樹脂４内には、チップ搭載面３ａをなすリードフレーム
３、ボンディングワイヤ６を結線するリードフレーム
１，２が含まれており、各リードフレーム１，２，３の
一部が樹脂４外に導出し、これらが外部端子１ａ，２
ａ，３ｂとしての働きをもっている。1A and 1B, a hermetically sealing resin 4 includes a lead frame 3 forming a chip mounting surface 3a and lead frames 1 and 2 connecting a bonding wire 6. , Some of the lead frames 1, 2 and 3 are led out of the resin 4, and these are external terminals 1a and 2
It has the functions of a and 3b.
【００１１】外部端子１ａ，２ａ，３ｂは樹脂４に形成
された半導体装置の実装面７と平行な面内に設けられて
いる。The external terminals 1a, 2a, 3b are provided in a plane parallel to the mounting surface 7 of the semiconductor device formed on the resin 4.
【００１２】本実施例では、リードフレーム３のチップ
搭載面３ａ、リードフレーム１，２のワイヤボンディン
グ面１ｂ，２ｂが半導体装置の実装面７に対して角度θ
をもって傾斜している。ここに、リードフレーム３のチ
ップ搭載面３ａ、リードフレーム１，２のワイヤボンデ
ィング面１ｂ，２ｂが同一方向に向けて傾斜している。In this embodiment, the chip mounting surface 3a of the lead frame 3 and the wire bonding surfaces 1b and 2b of the lead frames 1 and 2 form an angle θ with respect to the mounting surface 7 of the semiconductor device.
Is inclined with. Here, the chip mounting surface 3a of the lead frame 3 and the wire bonding surfaces 1b and 2b of the lead frames 1 and 2 are inclined in the same direction.
【００１３】したがって、本実施例によれば、チップ搭
載面３ａ、ワイヤボンディング面１ｂ，２ｂは、実装面
７に対して角度θをもって傾斜しているため、ボンディ
ングワイヤ６のたわみ部分の高さが実効的にｃｏｓθを
乗算した値となり、その分だけ高さ寸法が低く抑えら
れ、その結果半導体装置の厚さを薄くすることが可能と
なる。Therefore, according to this embodiment, since the chip mounting surface 3a and the wire bonding surfaces 1b and 2b are inclined at the angle θ with respect to the mounting surface 7, the height of the bending portion of the bonding wire 6 is increased. It becomes a value that is effectively multiplied by cos θ, and the height dimension is suppressed to that extent, and as a result, it is possible to reduce the thickness of the semiconductor device.
【００１４】[0014]
【考案の効果】以上説明したように本考案によれば、チ
ップ搭載面、ワイヤボンディング面を実装面に対して傾
斜させたため、その傾斜を利用して半導体装置の実質的
な厚みを薄くすることができる。As described above, according to the present invention, since the chip mounting surface and the wire bonding surface are inclined with respect to the mounting surface, the inclination can be utilized to reduce the substantial thickness of the semiconductor device. You can
【図１】（ａ）は本考案の一実施例を示す斜視図、
（ｂ）は同側面図である。FIG. 1A is a perspective view showing an embodiment of the present invention,
(B) is the same side view.
【図２】従来例を示す斜視図である。FIG. 2 is a perspective view showing a conventional example.
１，２，３ リードフレーム １ｂ，２ｂ リードフレームのワイヤボンディング面 ３ａ リードフレームのチップ搭載面 ５ 半導体チップ ６ ボンディングワイヤ ７ 半導体装置の実装面 1, 2 and 3 Lead frame 1b and 2b Lead wire wire bonding surface 3a Lead frame chip mounting surface 5 Semiconductor chip 6 Bonding wire 7 Semiconductor device mounting surface
Claims (1)
リードフレームのチップ搭載面及びワイヤボンディング
面が、該半導体装置の実装面に対し角度をもって傾斜し
たことを特徴とする半導体装置の構造。1. A surface-mount type semiconductor device, comprising:
A structure of a semiconductor device, wherein a chip mounting surface and a wire bonding surface of a lead frame are inclined at an angle with respect to a mounting surface of the semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4543891U JP2519597Y2 (en) | 1991-06-17 | 1991-06-17 | Structure of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4543891U JP2519597Y2 (en) | 1991-06-17 | 1991-06-17 | Structure of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04137064U JPH04137064U (en) | 1992-12-21 |
| JP2519597Y2 true JP2519597Y2 (en) | 1996-12-04 |
Family
ID=31925298
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4543891U Expired - Fee Related JP2519597Y2 (en) | 1991-06-17 | 1991-06-17 | Structure of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2519597Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001003184A1 (en) * | 1999-07-02 | 2001-01-11 | Rohm Co., Ltd. | Electronic part |
-
1991
- 1991-06-17 JP JP4543891U patent/JP2519597Y2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04137064U (en) | 1992-12-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |