JP2024535267A - 多結晶炭化ケイ素支持基板を製造するためのプロセス - Google Patents

多結晶炭化ケイ素支持基板を製造するためのプロセス Download PDF

Info

Publication number
JP2024535267A
JP2024535267A JP2024516866A JP2024516866A JP2024535267A JP 2024535267 A JP2024535267 A JP 2024535267A JP 2024516866 A JP2024516866 A JP 2024516866A JP 2024516866 A JP2024516866 A JP 2024516866A JP 2024535267 A JP2024535267 A JP 2024535267A
Authority
JP
Japan
Prior art keywords
substrate
initial substrate
manufacturing process
initial
silicon carbide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2024516866A
Other languages
English (en)
Japanese (ja)
Other versions
JP2024535267A5 (https=
Inventor
ヒューゴ ビアード,
メラニー ラグランジュ,
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Publication of JP2024535267A publication Critical patent/JP2024535267A/ja
Publication of JP2024535267A5 publication Critical patent/JP2024535267A5/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901Materials
    • H10P14/2902Materials being Group IVA materials
    • H10P14/2904Silicon carbide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3408Silicon carbide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00Bonding of wafers, substrates or parts of devices
    • H10P10/12Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901Materials
    • H10P14/2902Materials being Group IVA materials
    • H10P14/2903Carbon, e.g. diamond-like carbon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202Materials thereof
    • H10P14/3204Materials thereof being Group IVA semiconducting materials
    • H10P14/3208Silicon carbide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3406Carbon, e.g. diamond-like carbon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/1914Preparing SOI wafers using bonding
    • H10P90/1916Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/181Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Crystals, And After-Treatments Of Crystals (AREA)
JP2024516866A 2021-09-22 2022-09-06 多結晶炭化ケイ素支持基板を製造するためのプロセス Pending JP2024535267A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR2109961A FR3127330B1 (fr) 2021-09-22 2021-09-22 Procede de fabrication d’un substrat support en carbure de silicium poly-cristallin
FR2109961 2021-09-22
PCT/FR2022/051682 WO2023047035A1 (fr) 2021-09-22 2022-09-06 Procede de fabrication d'un substrat support en carbure de silicium poly-cristallin

Publications (2)

Publication Number Publication Date
JP2024535267A true JP2024535267A (ja) 2024-09-30
JP2024535267A5 JP2024535267A5 (https=) 2025-07-16

Family

ID=78770758

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024516866A Pending JP2024535267A (ja) 2021-09-22 2022-09-06 多結晶炭化ケイ素支持基板を製造するためのプロセス

Country Status (8)

Country Link
US (1) US20240379351A1 (https=)
EP (1) EP4406004B1 (https=)
JP (1) JP2024535267A (https=)
KR (1) KR20240056832A (https=)
CN (1) CN117999633A (https=)
FR (1) FR3127330B1 (https=)
TW (1) TW202323603A (https=)
WO (1) WO2023047035A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117690780B (zh) * 2023-12-08 2024-06-14 松山湖材料实验室 氮化铝单晶复合衬底的制备方法
FR3160507B1 (fr) * 2024-03-20 2026-03-27 Soitec Silicon On Insulator Procede de traitement d’un substrat presentant une surface en un materiau semiconducteur
FR3166782A1 (fr) * 2024-09-25 2026-03-27 Alpsemi Procédé de fabrication d’un substrat

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08188408A (ja) * 1994-12-29 1996-07-23 Toyo Tanso Kk 化学蒸着法による炭化ケイ素成形体及びその製造方法
FR2738671B1 (fr) * 1995-09-13 1997-10-10 Commissariat Energie Atomique Procede de fabrication de films minces a materiau semiconducteur
FR2810448B1 (fr) * 2000-06-16 2003-09-19 Soitec Silicon On Insulator Procede de fabrication de substrats et substrats obtenus par ce procede
JP6619874B2 (ja) 2016-04-05 2019-12-11 株式会社サイコックス 多結晶SiC基板およびその製造方法
KR102473088B1 (ko) * 2017-03-02 2022-12-01 신에쓰 가가꾸 고교 가부시끼가이샤 탄화규소 기판의 제조 방법 및 탄화규소 기판

Also Published As

Publication number Publication date
EP4406004C0 (fr) 2025-07-30
CN117999633A (zh) 2024-05-07
US20240379351A1 (en) 2024-11-14
WO2023047035A1 (fr) 2023-03-30
FR3127330A1 (fr) 2023-03-24
EP4406004A1 (fr) 2024-07-31
FR3127330B1 (fr) 2023-09-22
TW202323603A (zh) 2023-06-16
EP4406004B1 (fr) 2025-07-30
KR20240056832A (ko) 2024-04-30

Similar Documents

Publication Publication Date Title
JP7708747B2 (ja) 結晶SiCのキャリア基材上に単結晶SiCの薄層を備える複合構造を作成するプロセス
US20240379351A1 (en) Method for fabricating a polycrystalline silicon carbide carrier substrate
JP7542053B2 (ja) 多結晶炭化ケイ素で作られたキャリア基板上に単結晶炭化ケイ素の薄層を含む複合構造を製造するためのプロセス
KR102862061B1 (ko) SiC로 이루어진 캐리어 기판 상에 단결정 SiC로 이루어진 박층을 포함하는 복합 구조체를 제조하기 위한 방법
TWI850519B (zh) 用於製作複合結構之方法,該複合結構包含一單晶SiC薄層在一SiC支撐底材上
JP7594585B2 (ja) SiCでできたキャリア基材上に単結晶SiCの薄層を備える複合構造を作成するプロセス
JP7620646B2 (ja) 非常に高い温度に対応する剥離可能な仮基板、及び前記基板から加工層を移動させるプロセス
US20240170284A1 (en) Method for producing a silicon carbide-based semiconductor structure and intermediate composite structure
JP2024509679A (ja) 炭化ケイ素ベースの半導体構造体及び中間複合構造体を製造する方法
US20250140602A1 (en) Composite structure and manufacturing method thereof
US12622189B2 (en) Method for manufacturing a composite structure comprising a thin single-crystal semiconductor layer on a carrier substrate
US20240112908A1 (en) Method for manufacturing a composite structure comprising a thin single-crystal semiconductor layer on a carrier substrate
TWI920243B (zh) 用於製作碳化矽基半導體結構及中間複合結構之方法
US20240395603A1 (en) Composite structure comprising a useful monocrystalline sic layer on a polycrystalline sic carrier substrate and method for manufacturing said structure
TWI861253B (zh) 用於製作複合結構之方法,該複合結構包含一單晶SiC薄層在一SiC載體底材上
US20250006492A1 (en) Method for manufacturing a composite structure comprising a thin film of monocrystalline sic on a carrier substrate of polycrystalline sic
TWI915522B (zh) 用於製作碳化矽基半導性結構及中間複合結構之方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20250708

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20250708