JP2024111064A5 - - Google Patents
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- JP2024111064A5 JP2024111064A5 JP2024096368A JP2024096368A JP2024111064A5 JP 2024111064 A5 JP2024111064 A5 JP 2024111064A5 JP 2024096368 A JP2024096368 A JP 2024096368A JP 2024096368 A JP2024096368 A JP 2024096368A JP 2024111064 A5 JP2024111064 A5 JP 2024111064A5
- Authority
- JP
- Japan
- Prior art keywords
- data
- memory
- parallel
- weights
- processing unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Applications Claiming Priority (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2020020954 | 2020-02-10 | ||
| JP2020020954 | 2020-02-10 | ||
| JP2020178364 | 2020-10-23 | ||
| JP2020178364 | 2020-10-23 | ||
| JP2022500317A JP7430425B2 (ja) | 2020-02-10 | 2021-01-29 | 双安定回路および電子回路 |
| PCT/JP2021/003224 WO2021161808A1 (ja) | 2020-02-10 | 2021-01-29 | 双安定回路、電子回路、記憶回路および処理装置 |
| JP2024008592A JP7639247B2 (ja) | 2020-02-10 | 2024-01-24 | 記憶回路 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024008592A Division JP7639247B2 (ja) | 2020-02-10 | 2024-01-24 | 記憶回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2024111064A JP2024111064A (ja) | 2024-08-16 |
| JP2024111064A5 true JP2024111064A5 (https=) | 2024-11-20 |
| JP7735620B2 JP7735620B2 (ja) | 2025-09-09 |
Family
ID=77292128
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022500317A Active JP7430425B2 (ja) | 2020-02-10 | 2021-01-29 | 双安定回路および電子回路 |
| JP2024008592A Active JP7639247B2 (ja) | 2020-02-10 | 2024-01-24 | 記憶回路 |
| JP2024096368A Active JP7735620B2 (ja) | 2020-02-10 | 2024-06-14 | 処理装置 |
Family Applications Before (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022500317A Active JP7430425B2 (ja) | 2020-02-10 | 2021-01-29 | 双安定回路および電子回路 |
| JP2024008592A Active JP7639247B2 (ja) | 2020-02-10 | 2024-01-24 | 記憶回路 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US12183392B2 (https=) |
| EP (1) | EP4105932A4 (https=) |
| JP (3) | JP7430425B2 (https=) |
| CN (1) | CN115053293A (https=) |
| TW (2) | TWI891723B (https=) |
| WO (1) | WO2021161808A1 (https=) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR3128570B1 (fr) * | 2021-10-25 | 2023-10-27 | Commissariat Energie Atomique | Sram a initialisation reconfigurable |
| US12224034B2 (en) | 2022-05-11 | 2025-02-11 | Macronix International Co., Ltd. | Memory device and data approximation search method thereof |
| US12073883B2 (en) | 2022-05-11 | 2024-08-27 | Macronix International Co., Ltd. | Ternary content addressable memory |
| WO2025253953A1 (ja) * | 2024-06-07 | 2025-12-11 | ソニーセミコンダクタソリューションズ株式会社 | メモリ装置及び電子機器 |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3260357B2 (ja) * | 1990-01-24 | 2002-02-25 | 株式会社日立製作所 | 情報処理装置 |
| JP2002109875A (ja) | 2000-09-29 | 2002-04-12 | Nec Corp | 強誘電体容量を用いたシャドーｒａｍセル及び不揮発性メモリ装置並びにその制御方法 |
| JP4459696B2 (ja) | 2004-04-20 | 2010-04-28 | 旭化成エレクトロニクス株式会社 | 半導体記憶装置及びデジタルフィルタ |
| US7164608B2 (en) * | 2004-07-28 | 2007-01-16 | Aplus Flash Technology, Inc. | NVRAM memory cell architecture that integrates conventional SRAM and flash cells |
| DE602006017777D1 (de) | 2005-07-29 | 2010-12-09 | Semiconductor Energy Lab | Halbleiterspeicher und dessen Betriebsverfahren |
| JP4954626B2 (ja) * | 2005-07-29 | 2012-06-20 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| US20070242498A1 (en) * | 2006-04-13 | 2007-10-18 | Anantha Chandrakasan | Sub-threshold static random access memory |
| JP5170706B2 (ja) | 2007-08-31 | 2013-03-27 | 国立大学法人東京工業大学 | スピン注入磁化反転ｍｔｊを用いた不揮発性ｓｒａｍ／ラッチ回路 |
| US20110205787A1 (en) * | 2008-10-22 | 2011-08-25 | Nxp B.V. | Dual-rail sram with independent read and write ports |
| FR2956516B1 (fr) * | 2010-02-15 | 2012-12-07 | St Microelectronics Sa | Cellule de memoire vive sram a dix transistors |
| US8325511B2 (en) * | 2010-04-21 | 2012-12-04 | Texas Instruments Incorporated | Retain-till-accessed power saving mode in high-performance static memories |
| WO2013018156A1 (ja) * | 2011-07-29 | 2013-02-07 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| JP5312715B1 (ja) | 2012-05-18 | 2013-10-09 | 独立行政法人科学技術振興機構 | 双安定回路と不揮発性素子とを備える記憶回路 |
| US20150294991A1 (en) | 2014-04-10 | 2015-10-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, electronic component, and electronic device |
| EP3182414B1 (en) | 2014-08-12 | 2021-01-13 | Japan Science and Technology Agency | Memory circuit |
| CN107408939B (zh) * | 2015-04-01 | 2020-09-25 | 国立研究开发法人科学技术振兴机构 | 电子电路 |
| JP7033507B2 (ja) | 2018-07-31 | 2022-03-10 | 株式会社メガチップス | ニューラルネットワーク用プロセッサ、ニューラルネットワーク用処理方法、および、プログラム |
| WO2020070830A1 (ja) * | 2018-10-03 | 2020-04-09 | 株式会社ソシオネクスト | 半導体記憶装置 |
| CN121122351A (zh) * | 2019-05-30 | 2025-12-12 | 国立研究开发法人科学技术振兴机构 | 电子电路 |
-
2021
- 2021-01-29 JP JP2022500317A patent/JP7430425B2/ja active Active
- 2021-01-29 EP EP21753980.8A patent/EP4105932A4/en active Pending
- 2021-01-29 WO PCT/JP2021/003224 patent/WO2021161808A1/ja not_active Ceased
- 2021-01-29 CN CN202180012857.3A patent/CN115053293A/zh active Pending
- 2021-02-05 TW TW110104542A patent/TWI891723B/zh active
- 2021-02-05 TW TW114128980A patent/TW202549269A/zh unknown
-
2022
- 2022-07-29 US US17/877,452 patent/US12183392B2/en active Active
-
2024
- 2024-01-24 JP JP2024008592A patent/JP7639247B2/ja active Active
- 2024-06-14 JP JP2024096368A patent/JP7735620B2/ja active Active
- 2024-11-14 US US18/947,451 patent/US20250069651A1/en active Pending
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