JP2023502572A - 結晶SiCのキャリア基材上に単結晶SiCの薄層を備える複合構造を作成するプロセス - Google Patents

結晶SiCのキャリア基材上に単結晶SiCの薄層を備える複合構造を作成するプロセス Download PDF

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JP2023502572A
JP2023502572A JP2022523652A JP2022523652A JP2023502572A JP 2023502572 A JP2023502572 A JP 2023502572A JP 2022523652 A JP2022523652 A JP 2022523652A JP 2022523652 A JP2022523652 A JP 2022523652A JP 2023502572 A JP2023502572 A JP 2023502572A
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substrate
donor
layer
deposition
composite structure
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イオヌット ラドゥ,
ヒューゴ ビアード,
クリストフ マルヴィル,
エリック ギオ,
ディティエ ランドル,
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Soitec SA
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    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • H01L21/7813Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate leaving a reusable substrate, e.g. epitaxial lift off
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    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
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    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
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    • C30B33/00After-treatment of single crystals or homogeneous polycrystalline material with defined structure
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    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

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  • Engineering & Computer Science (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
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  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Mechanical Engineering (AREA)
  • Electromagnetism (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Chemical Vapour Deposition (AREA)
  • Recrystallisation Techniques (AREA)
JP2022523652A 2019-11-29 2020-10-26 結晶SiCのキャリア基材上に単結晶SiCの薄層を備える複合構造を作成するプロセス Pending JP2023502572A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR1913553A FR3103962B1 (fr) 2019-11-29 2019-11-29 Procede de fabrication d’une structure composite comprenant une couche mince en sic monocristallin sur un substrat support en sic cristallin
FR1913553 2019-11-29
PCT/FR2020/051928 WO2021105575A1 (fr) 2019-11-29 2020-10-26 Procede de fabrication d'une structure composite comprenant une couche mince en sic monocristallin sur un substrat support en sic cristallin

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JP2023502572A true JP2023502572A (ja) 2023-01-25

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JP2022523652A Pending JP2023502572A (ja) 2019-11-29 2020-10-26 結晶SiCのキャリア基材上に単結晶SiCの薄層を備える複合構造を作成するプロセス

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US (1) US20230260841A1 (ko)
EP (1) EP4066274A1 (ko)
JP (1) JP2023502572A (ko)
KR (1) KR20220107173A (ko)
CN (1) CN114746980A (ko)
FR (2) FR3103962B1 (ko)
TW (1) TW202137284A (ko)
WO (1) WO2021105575A1 (ko)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3127627A1 (fr) * 2021-09-29 2023-03-31 Soitec Procédé de fabrication d’une structure composite comprenant une couche mince en sic monocristallin sur un substrat support en sic polycristallin
CN114075699B (zh) * 2021-11-21 2024-04-12 苏州晶瓴半导体有限公司 一种双层复合碳化硅衬底及其制备方法
CN115595671B (zh) 2022-12-12 2023-08-15 青禾晶元(天津)半导体材料有限公司 一种复合衬底的制备方法
CN115910755A (zh) * 2023-01-09 2023-04-04 宁波合盛新材料有限公司 一种碳化硅外延片及其制备方法

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JP2007273524A (ja) * 2006-03-30 2007-10-18 Mitsui Eng & Shipbuild Co Ltd 複層構造炭化シリコン基板の製造方法
US8436363B2 (en) 2011-02-03 2013-05-07 Soitec Metallic carrier for layer transfer and methods for forming the same
US20130062628A1 (en) * 2011-09-10 2013-03-14 Semisouth Laboratories, Inc. Methods for the epitaxial growth of silicon carbide
US11721547B2 (en) * 2013-03-14 2023-08-08 Infineon Technologies Ag Method for manufacturing a silicon carbide substrate for an electrical silicon carbide device, a silicon carbide substrate and an electrical silicon carbide device
JP6271309B2 (ja) * 2014-03-19 2018-01-31 株式会社東芝 半導体基板の製造方法、半導体基板および半導体装置
EP3168862B1 (en) 2014-07-10 2022-07-06 Sicoxs Corporation Semiconductor substrate and semiconductor substrate production method
JP6582779B2 (ja) * 2015-09-15 2019-10-02 信越化学工業株式会社 SiC複合基板の製造方法
CN108463871A (zh) * 2016-02-10 2018-08-28 住友电气工业株式会社 碳化硅外延衬底及制造碳化硅半导体器件的方法

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FR3103961A1 (fr) 2021-06-04
FR3103962A1 (fr) 2021-06-04
FR3103962B1 (fr) 2021-11-05
KR20220107173A (ko) 2022-08-02
US20230260841A1 (en) 2023-08-17
WO2021105575A1 (fr) 2021-06-03
EP4066274A1 (fr) 2022-10-05
TW202137284A (zh) 2021-10-01
CN114746980A (zh) 2022-07-12
FR3103961B1 (fr) 2021-10-29

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