JP2023070075A - 画素駆動回路を含む電界発光表示装置 - Google Patents
画素駆動回路を含む電界発光表示装置 Download PDFInfo
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- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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Abstract
Description
[式1]
ID=k(Vdata-Vref+VTC1-Vled)2
[式2]
ID=k(Vdata-Vref-Vled)2
Claims (18)
- サブ画素を含み、前記サブ画素が配置されたサブ画素領域及び共通領域を有する画素を含み、
前記サブ画素それぞれは、アノード電極及びカソード電極を含む発光素子を含み、
前記サブ画素領域には、第1画素駆動回路が配置され、
前記共通領域には、第2画素駆動回路が配置され、前記第2画素駆動回路は第1共通配線と第2共通配線とを有し、前記発光素子の前記アノード電極は、前記第1共通配線に電気的に連結され、
前記サブ画素それぞれは、
ソースが第1ノードに、ゲートが第2ノードに、ドレインが第3ノードに電気的に連結された駆動素子;
前記第1ノードに電気的に連結された第4トランジスタ;
前記第2ノードに電気的に連結された第2トランジスタ;
前記第3ノードに電気的に連結された第5トランジスタ;
前記第2ノード及び電気的に前記第3ノードに連結された第3トランジスタ;
前記第2ノードに電気的に連結された第1電極及び前記第2共通配線に電気的に連結された第2電極とを有する第1キャパシタ;
第1キャパシタ電極及び第2キャパシタ電極を有する第2キャパシタであって、前記第1キャパシタ電極は前記第1共通配線に電気的に連結され、前記第2キャパシタ電極は前記第1ノードまたは前記第2ノードに電気的に連結された第2キャパシタ;及び
前記駆動素子の下部に配置された導電層であって、前記第1ノードまたは前記駆動素子の前記ゲートと電気的に連結された導電層、をさらに含む、
電界発光表示装置。 - 前記第2画素駆動回路は、前記第1共通配線に電圧を印加する第1共通スイッチング回路及び前記第2共通配線に電圧を印加する第2共通スイッチング回路を含む、請求項1に記載の電界発光表示装置。
- 前記サブ画素は、前記第1共通配線及び前記第2共通配線を通して互いに電気的に連結された、請求項2に記載の電界発光表示装置。
- 前記第2共通スイッチング回路は、基準電圧を提供する配線に電気的に連結され、前記基準電圧は、前記駆動素子のゲートに提供されて前記駆動素子をターン-オンさせる、請求項2に記載の電界発光表示装置。
- 前記第2画素駆動回路は、第(n-1)スキャン信号、第nスキャン信号、及び第nエミッション信号により制御されるトランジスタで具現され、前記第2画素駆動回路は、n番目の行に位置した画素に含まれ、nは、自然数である、請求項1に記載の電界発光表示装置。
- 前記第4トランジスタは、第nスキャン信号により制御され、データ電圧を前記第1ノードに提供する、請求項1に記載の電界発光表示装置。
- 前記第2トランジスタは、第(n-1)スキャン信号により制御され、低電位電圧が提供される配線と電気的に連結されて前記低電位電圧を前記第2ノードに提供する、請求項1に記載の電界発光表示装置。
- 前記第5トランジスタは、第nエミッション信号により制御され、低電位電圧が提供される配線と電気的に連結されて前記低電位電圧を前記第3ノードに提供する、請求項1に記載の電界発光表示装置。
- 前記第3トランジスタは、第nスキャン信号により制御され、前記第2ノードと前記第3ノードとを電気的に連結する、請求項1に記載の電界発光表示装置。
- アノード電極及びカソード電極を含み、前記アノード電極は、高電位電圧が提供される第1共通配線に連結された発光素子;及び
前記発光素子に駆動電流を提供する画素駆動回路を含むサブ画素を含み、
前記サブ画素は、
ソースが第1ノードに、ゲートが第2ノードに、ドレインが第3ノードに電気的に連結された駆動素子;
前記アノード電極に電気的に連結された第1共通スイッチング回路;
前記第2ノードに電気的に連結された第1電極及び第4ノードに連結された第2電極を含む第1キャパシタ;
前記第2ノードに電気的に連結された第2スイッチング回路;
前記第3ノードに電気的に連結された第3スイッチング回路;
前記第1ノードに電気的に連結された第1スイッチング回路;及び
前記第4ノードに電気的に連結された第2共通スイッチング回路をさらに含む、
電界発光表示装置。 - 前記第1共通スイッチング回路は、第nエミッション信号により制御され、前記第1共通配線に前記高電位電圧を提供し、前記第4ノードと前記第1共通配線を電気的に連結する、請求項10に記載の電界発光表示装置。
- 前記第2スイッチング回路は、第nスキャン信号により制御され、前記第2ノードと前記第3ノードとを電気的に連結し、第(n-1)スキャン信号により制御され、低電位電圧を前記第2ノードに提供する、請求項10に記載の電界発光表示装置。
- 前記第3スイッチング回路は、第nエミッション信号により制御され、低電位電圧を前記第3ノードに提供する、請求項10に記載の電界発光表示装置。
- 前記第1スイッチング回路は、第nスキャン信号により制御され、データ電圧を前記第1ノードに提供する、請求項10に記載の電界発光表示装置。
- 前記第2共通スイッチング回路は、第(n-1)スキャン信号及び第nスキャン信号により制御され、前記高電位電圧より高い電圧を前記第4ノードに提供する、請求項10に記載の電界発光表示装置。
- 前記サブ画素は、前記駆動素子の下部に配置された導電層を含み、
前記導電層は、前記第1ノードまたは前記第2ノードと電気的に連結された、請求項10に記載の電界発光表示装置。 - 前記サブ画素は、前記第2ノードと電気的に連結された一電極及び前記第1ノードと電気的に連結された他電極を含む第2キャパシタを含む、請求項10に記載の電界発光表示装置。
- 前記第2キャパシタの前記一電極及び前記他電極が短絡するとき、前記駆動素子のソースとゲートの電圧差は0Vになり、前記駆動素子は、ターン-オフされる、請求項17に記載の電界発光表示装置。
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