JP2022041588A - 成形装置、成形方法、およびテンプレート - Google Patents
成形装置、成形方法、およびテンプレート Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/0002—Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
- H01L21/0212—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC the material being fluoro carbon compounds, e.g.(CFx) n, (CHxFy) n or polytetrafluoroethylene
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31058—After-treatment of organic layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
Abstract
Description
図1は、成形装置100の構成を示す概略図である。成形装置100は、平坦面を有するテンプレート15を用いて基板11上の硬化性組成物を成形する成形装置で具現化され、本実施形態では、基板上の硬化性組成物を平坦化する。
次に、図2(a)乃至図2(c)を参照して、一般的に行われる平坦化処理について概要を説明する。ここでは、基板全面上に硬化性組成物を滴下して、その硬化性組成物とテンプレートを接触させて、硬化性組成物を平坦化させる処理について説明するが、基板の一部の領域上の硬化性組成物とテンプレートを接触させて、硬化性組成物を平坦化させてもよい。
図3は、テンプレート15の構成を示す概略図である。テンプレート15は、平坦な表面15cを有するテンプレート基板15dを含むことができる。表面15cは、凹部および凸部を有しておらず、ブランクと呼ぶことができる。表面15cは、基板11の面積の少なくとも90%の面積を有することができ、基板11と同じまたはそれより大きい面積を有することができる。一実施形態では、該表面の面積は、少なくとも280cm2、少なくとも700cm2、少なくとも1,100cm2、またはそれより大きく、および別の実施形態では、表面積は最大31,500cm2でありうる。
本実施例について、図3を用いて説明する。
実施例1と同様に、テンプレート15のテンプレート基板15dは、石英ガラスからなり、厚さ700μmとした。テンプレート基板15dのSFQRは、20nmであった。
テンプレート基板15dのSFQRは、50nmであること以外は、実施例1と同様とした。保護層15bの形成後の平坦性は若干改善したものの、SFQR45nmであった。
15 テンプレート
16 テンプレート保持部
15a 保護層の表面
15b 保護層
15c テンプレート基板の表面
15d テンプレート基板
Claims (12)
- 基板上に配置された硬化性組成物にテンプレートを接触させ、該硬化性組成物を硬化させる成形装置であって、
前記テンプレートが、前記硬化性組成物と接触する接触面において、SFQR(Site Front least sQares Range)20nm以下の平坦被覆層を有することを特徴とする成形装置。 - 前記平坦被覆層が、フッ素樹脂を有する請求項1に記載の成形装置。
- 前記接触面のSFQRが、10nm以下である請求項1に記載の成形装置。
- 前記被覆層により被覆された表面の表面粗さが、前記テンプレート基板の表面粗さよりも小さい請求項1から3のいずれか一項に記載の成形装置。
- 前記被覆層により被覆された表面のSFQRが、前記テンプレート基板のSFQRよりも小さいことを特徴とする請求項1から4のいずれか一項に記載の成形装置。
- 前記基板上に前記硬化性組成物の平坦な面を形成する平坦化装置であることを特徴とする請求項1から5のいずれか一項に記載の成形装置。
- 前記基板上に前記硬化性組成物を付与する手段、
前記テンプレートを前記基板上の前記硬化性組成物に接触させる、または引き離す手段、
前記インプリント材を光照射により硬化させる硬化させる手段、
を有する請求項1から6のいずれか一項に記載の成形装置。 - 基板上に硬化性組成物を配置する工程、
前記硬化性組成物にテンプレートを接触させる工程、
該テンプレートを接触させた状態で前記硬化性組成物を硬化させる工程、
を有する成形方法であって、
前記テンプレートが、前記硬化性組成物と接触する接触面において、SFQR(Site Front least sQares Range)20nm以下の平坦被覆層を有することを特徴とする成形方法。 - 前記配置する工程が、前記基板上の表面凹凸に応じて前記硬化性組成物をオンデマンドに配置する工程であり、
前記テンプレートを前記基板上の前記硬化性組成物に接触させる工程、および
前記硬化性組成物を前記テンプレートを介した光照射により硬化させる工程と、
を有し、
前記基板を平坦化することを特徴とする請求項8に記載の成形方法。 - 前記接触面のSFQRが、10nm以下である請求項8または9に記載の成形方法。
- 基板上に配置された硬化性組成物に接触させ、該硬化性組成物を硬化させる平坦化に使用するテンプレートであって、
前記硬化性組成物と接触する接触面において、SFQR(Site Front least sQares Range)20nm以下の平坦被覆層を有することを特徴とするテンプレート。 - 前記接触面のSFQRが、10nm以下である請求項11に記載のテンプレート。
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JP2020146878A JP2022041588A (ja) | 2020-09-01 | 2020-09-01 | 成形装置、成形方法、およびテンプレート |
KR1020210110725A KR20220029413A (ko) | 2020-09-01 | 2021-08-23 | 성형 장치, 성형 방법, 및 템플릿 |
US17/459,590 US20220066316A1 (en) | 2020-09-01 | 2021-08-27 | Molding apparatus, molding method, and template |
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